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Reel/Frame:036622/0065   Pages: 8
Recorded: 09/17/2015
Attorney Dkt #:F158275
Conveyance: FIRST SUPPLEMENT TO INTELLECTUAL PROPERTY SECURITY AGREEMENT
Total properties: 15
1
Patent #:
7918669
Issue Dt:
04/05/2011
Application #:
12841866
Filing Dt:
07/22/2010
Title:
A INTEGRATED CIRCUIT SOCKET WITH A TWO-PIECE CONNECTOR WITH A ROCKER ARM
2
Patent #:
8704542
Issue Dt:
04/22/2014
Application #:
13179341
Filing Dt:
07/08/2011
Publication #:
US20130008628
Pub Dt:
01/10/2013
Title:
THERMAL CHAMBER FOR IC CHIP TESTING
3
Patent #:
8758027
Issue Dt:
06/24/2014
Application #:
13769120
Filing Dt:
02/15/2013
Title:
INTEGRATED CIRCUIT (IC) SOCKET WITH CONTOURED CAPTURE GROOVE
4
Patent #:
9188605
Issue Dt:
11/17/2015
Application #:
14078364
Filing Dt:
11/12/2013
Publication #:
US20150130487
Pub Dt:
05/14/2015
Title:
INTEGRATED CIRCUIT (IC) TEST SOCKET WITH FARADAY CAGE
5
Patent #:
8998621
Issue Dt:
04/07/2015
Application #:
14136931
Filing Dt:
12/20/2013
Publication #:
US20140235096
Pub Dt:
08/21/2014
Title:
SOCKET MOUNT
6
Patent #:
9354251
Issue Dt:
05/31/2016
Application #:
14189787
Filing Dt:
02/25/2014
Publication #:
US20150241474
Pub Dt:
08/27/2015
Title:
INTEGRATED CIRCUIT (IC) TEST SOCKET USING KELVIN BRIDGE
7
Patent #:
9425529
Issue Dt:
08/23/2016
Application #:
14310824
Filing Dt:
06/20/2014
Publication #:
US20150372407
Pub Dt:
12/24/2015
Title:
INTEGRATED CIRCUIT CHIP TESTER WITH AN ANTI-ROTATION LINK
8
Patent #:
NONE
Issue Dt:
Application #:
14701945
Filing Dt:
05/01/2015
Publication #:
US20150316608
Pub Dt:
11/05/2015
Title:
DEBUGGING SYSTEM AND METHOD
9
Patent #:
NONE
Issue Dt:
Application #:
14701971
Filing Dt:
05/01/2015
Publication #:
US20150316609
Pub Dt:
11/05/2015
Title:
DEBUGGING SYSTEM AND METHOD
10
Patent #:
NONE
Issue Dt:
Application #:
14701983
Filing Dt:
05/01/2015
Publication #:
US20150316610
Pub Dt:
11/05/2015
Title:
DEBUGGING SYSTEM AND METHOD
11
Patent #:
NONE
Issue Dt:
Application #:
14701997
Filing Dt:
05/01/2015
Publication #:
US20150316611
Pub Dt:
11/05/2015
Title:
DEBUGGING SYSTEM AND METHOD
12
Patent #:
NONE
Issue Dt:
Application #:
14702012
Filing Dt:
05/01/2015
Publication #:
US20150316614
Pub Dt:
11/05/2015
Title:
DEBUGGING SYSTEM AND METHOD
13
Patent #:
9343830
Issue Dt:
05/17/2016
Application #:
14733314
Filing Dt:
06/08/2015
Title:
INTEGRATED CIRCUIT CHIP TESTER WITH EMBEDDED MICRO LINK
14
Patent #:
10037933
Issue Dt:
07/31/2018
Application #:
14743879
Filing Dt:
06/18/2015
Publication #:
US20150369840
Pub Dt:
12/24/2015
Title:
TEST SOCKET ASSEMBLY AND RELATED METHODS
15
Patent #:
D668625
Issue Dt:
10/09/2012
Application #:
29366291
Filing Dt:
07/22/2010
Title:
INTEGRATED CIRCUIT SOCKET CONNECTOR
Assignors
1
XCERRA CORPORATION
Exec Dt:
09/16/2015
2
EVERETT CHARLES TECHNOLOGIES LLC
Exec Dt:
09/16/2015
Assignee
1
SILICON VALLEY BANK, AS ADMINISTRATIVE AGENT
3003 TASMAN DRIVE
SANTA CLARA, CALIFORNIA 95054
Correspondence name and address
DWAYNE C. HOUSTON
1025 VERMONT AVENUE NW, SUITE 1130
NATIONAL CORPORATE RESEARCH, LTD.
WASHINGTON, DC 20005

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