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Total properties:
13
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Patent #:
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Issue Dt:
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03/28/1995
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Application #:
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07979719
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Filing Dt:
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11/20/1992
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Title:
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BARE DIE CARRIER
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Patent #:
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Issue Dt:
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06/06/1995
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Application #:
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08060406
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Filing Dt:
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05/11/1993
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Title:
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PACKAGING AND INTERCONNECT SYSTEM FOR INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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04/08/1997
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Application #:
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08389905
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Filing Dt:
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02/16/1995
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Title:
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MULTIPLE CHIP MODULE MOUNTING ASSEMBLY AND COMPUTER USING SAME
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Patent #:
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Issue Dt:
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12/07/1999
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Application #:
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08420844
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Filing Dt:
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04/10/1995
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Title:
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PACKAGING AND INTERCONNECT SYSTEM FOR INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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03/17/1998
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Application #:
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08593897
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Filing Dt:
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01/30/1996
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Title:
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MULTIPLE CHIP MODULE ASSEMBLY FOR TOP OF MOTHER BOARD
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Patent #:
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Issue Dt:
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08/18/1998
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Application #:
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08621563
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Filing Dt:
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03/25/1996
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Title:
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PACKAGING AND INTERCONNECT SYSTEM FOR INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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04/22/1997
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Application #:
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08643740
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Filing Dt:
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05/06/1996
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Title:
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MEMBRANE PROBING OF CIRCUITS
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Patent #:
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Issue Dt:
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12/30/1997
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Application #:
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08677178
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Filing Dt:
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07/09/1996
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Title:
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MOUNTING ASSEMBLY FOR MULTIPLE CHIP MODULE WITH MORE THAN ONE SUBSTRATE AND COMPUTER USING SAME
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Patent #:
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Issue Dt:
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11/03/1998
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Application #:
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08696320
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Filing Dt:
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08/13/1996
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Title:
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MODULAR MULTIPLE MICROPROCESSOR SYSTEM
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Patent #:
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Issue Dt:
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03/20/2001
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Application #:
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09127579
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Filing Dt:
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07/31/1998
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Title:
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METHOD FOR CONTROLLING STRESS IN THIN FILM LAYERS DEPOSITED OVER A HIGH DENSITY INTERCONNECT COMMON CIRCUIT BASE
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Patent #:
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Issue Dt:
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12/26/2000
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Application #:
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09127580
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Filing Dt:
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07/31/1998
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Title:
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METHOD OF PLANARIZING THIN FILM LAYERS DEPOSITED OVER A COMMON CIRCUIT BASE
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Patent #:
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Issue Dt:
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08/27/2002
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Application #:
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09172178
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Filing Dt:
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10/13/1998
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Title:
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DEPOSITED THIN FILM BUILD-UP LAYER DISMENSIONS AS A METHOD OF RELIEVING STRESS IN HIGH DENSITY INTERCONNECT PRINTED WIRING BOARD SUBSTRATES
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Patent #:
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Issue Dt:
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07/17/2001
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Application #:
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09191594
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Filing Dt:
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11/13/1998
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Title:
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METHOD AND STRUCTURE FOR DETECTING OPEN VIAS IN HIGH DENSITY INTERCONNECT SUBSTRATES
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