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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:025126/0087   Pages: 15
Recorded: 10/12/2010
Attorney Dkt #:ASSIGNMENT SIXIS TO RTI
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 12
1
Patent #:
Issue Dt:
05/04/2010
Application #:
11952495
Filing Dt:
12/07/2007
Publication #:
Pub Dt:
03/26/2009
Title:
LARGE SUBSTRATE STRUCTURAL VIAS
2
Patent #:
Issue Dt:
11/09/2010
Application #:
11975007
Filing Dt:
10/16/2007
Publication #:
Pub Dt:
03/26/2009
Title:
SEMICONDUCTOR SUBSTRATE ELASTOMERIC STACK
3
Patent #:
Issue Dt:
07/27/2010
Application #:
11975011
Filing Dt:
10/16/2007
Publication #:
Pub Dt:
03/26/2009
Title:
COMB-SHAPED POWER BUS BAR ASSEMBLY STRUCTURE HAVING INTEGRATED CAPACITORS
4
Patent #:
Issue Dt:
08/16/2011
Application #:
11975058
Filing Dt:
10/16/2007
Publication #:
Pub Dt:
03/26/2009
Title:
PREVENTING BREAKAGE OF LONG METAL SIGNAL CONDUCTORS ON SEMICONDUCTOR SUBSTRATES
5
Patent #:
Issue Dt:
05/17/2011
Application #:
11975966
Filing Dt:
10/22/2007
Publication #:
Pub Dt:
03/26/2009
Title:
INTEGRATED SEMICONDUCTOR SUBSTRATE STRUCTURE USING INCOMPATIBLE PROCESSES
6
Patent #:
Issue Dt:
11/09/2010
Application #:
11981853
Filing Dt:
10/31/2007
Publication #:
Pub Dt:
03/26/2009
Title:
LOCAL DEFECT MEMORIES ON SEMICONDUCTOR SUBSTRATES IN A STACK COMPUTER
7
Patent #:
Issue Dt:
05/18/2010
Application #:
11999747
Filing Dt:
12/07/2007
Publication #:
Pub Dt:
03/26/2009
Title:
STACKABLE SELF-ALIGNING INSULATIVE GUIDE TRAY FOR HOLDING SEMICONDUCTOR SUBSTRATES
8
Patent #:
Issue Dt:
03/06/2012
Application #:
12321833
Filing Dt:
01/26/2009
Publication #:
Pub Dt:
07/29/2010
Title:
INTEGRAL METAL STRUCTURE WITH CONDUCTIVE POST PORTIONS
9
Patent #:
Issue Dt:
07/12/2011
Application #:
12387873
Filing Dt:
05/09/2009
Publication #:
Pub Dt:
11/11/2010
Title:
MULTIPLE-LAYER SIGNAL CONDUCTOR
10
Patent #:
NONE
Issue Dt:
Application #:
12387874
Filing Dt:
05/09/2009
Publication #:
Pub Dt:
11/11/2010
Title:
Optical ribbon cable attachment mechanism for the backside of a circuit board
11
Patent #:
Issue Dt:
03/18/2014
Application #:
12798132
Filing Dt:
03/30/2010
Publication #:
Pub Dt:
10/06/2011
Title:
In system reflow of low temperature eutectic bond balls
12
Patent #:
Issue Dt:
08/30/2011
Application #:
12798874
Filing Dt:
04/12/2010
Publication #:
Pub Dt:
08/12/2010
Title:
LARGE SUBSTRATE STRUCTURAL VIAS
Assignor
1
Exec Dt:
08/16/2010
Assignee
1
3040 CORNWALLIS ROAD
RESEARCH TRIANGLE PARK, NORTH CAROLINA 27709
Correspondence name and address
IMPERIUM PATENT WORKS LLP
P.O. BOX 607
PLEASANTON, CA 94566

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