Total properties:
26
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Patent #:
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Issue Dt:
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06/13/2006
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Application #:
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10210858
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Filing Dt:
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07/31/2002
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Title:
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INPUT/OUTPUT CELLS FOR A DOUBLE DATA RATE (DDR) MEMORY CONTROLLER
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Patent #:
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Issue Dt:
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12/16/2003
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Application #:
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10211691
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Filing Dt:
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07/31/2002
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Title:
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PROGRAMMABLE DELAY COMPENSATION CIRCUIT
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Patent #:
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Issue Dt:
|
08/29/2006
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Application #:
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10663327
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Filing Dt:
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09/16/2003
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Publication #:
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Pub Dt:
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03/17/2005
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Title:
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PORT INDEPENDENT DATA TRANSACTION INTERFACE FOR MULTI-PORT DEVICES
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Patent #:
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Issue Dt:
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05/30/2006
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Application #:
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10663328
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Filing Dt:
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09/16/2003
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Publication #:
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Pub Dt:
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03/17/2005
| | | | |
Title:
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METHOD AND APPARATUS FOR MULTI-PORT MEMORY CONTROLLER
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Patent #:
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Issue Dt:
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11/20/2007
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Application #:
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10702916
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Filing Dt:
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11/05/2003
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Publication #:
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Pub Dt:
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05/05/2005
| | | | |
Title:
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REACTIVE PLACEMENT CONTROLLER FOR INTERFACING WITH BANKED MEMORY STORAGE
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Patent #:
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Issue Dt:
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02/08/2011
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Application #:
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11752141
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Filing Dt:
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05/22/2007
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Publication #:
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Pub Dt:
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11/27/2008
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Title:
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SYSTEM AND METHOD FOR BUILDING CONFIGURABLE DESIGNS WITH HARDWARE DESCRIPTION AND VERIFICATION LANGUAGES
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Patent #:
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Issue Dt:
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12/25/2012
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Application #:
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11778433
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Filing Dt:
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07/16/2007
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Publication #:
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Pub Dt:
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01/22/2009
| | | | |
Title:
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SYSTEM AND METHOD FOR PROVIDING DATA INTEGRITY IN A NON-VOLATILE MEMORY SYSTEM
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11840217
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Filing Dt:
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08/17/2007
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Publication #:
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Pub Dt:
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02/19/2009
| | | | |
Title:
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EXECUTE-IN-PLACE IMPLEMENTATION FOR A NAND DEVICE
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Patent #:
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Issue Dt:
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05/10/2011
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Application #:
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11856063
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Filing Dt:
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09/17/2007
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Publication #:
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Pub Dt:
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03/19/2009
| | | | |
Title:
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PROGRAMMABLE SEQUENCE GENERATOR FOR A FLASH MEMORY CONTROLLER
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Patent #:
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Issue Dt:
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08/11/2009
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Application #:
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11869692
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Filing Dt:
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10/09/2007
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Publication #:
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Pub Dt:
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04/17/2008
| | | | |
Title:
|
REACTIVE PLACEMENT CONTROLLER FOR INTERFACING WITH BANKED MEMORY STORAGE
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|
|
Patent #:
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NONE
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Issue Dt:
|
|
Application #:
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11934790
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Filing Dt:
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11/05/2007
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Publication #:
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Pub Dt:
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05/07/2009
| | | | |
Title:
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CONFIGURABLE AND REUSABLE NAND SYSTEM
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Patent #:
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Issue Dt:
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01/25/2011
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Application #:
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11938725
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Filing Dt:
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11/12/2007
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Publication #:
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Pub Dt:
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05/14/2009
| | | | |
Title:
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SYSTEM AND METHOD FOR WEAR LEVELING UTILIZING A RELATIVE WEAR COUNTER
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Patent #:
|
|
Issue Dt:
|
09/18/2012
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Application #:
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12022134
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Filing Dt:
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01/29/2008
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Publication #:
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Pub Dt:
|
07/30/2009
| | | | |
Title:
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SYSTEM AND METHOD FOR PROVIDING COPYBACK DATA INTEGRITY IN A NON-VOLATILE MEMORY SYSTEM
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Patent #:
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|
Issue Dt:
|
05/17/2011
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Application #:
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12022138
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Filing Dt:
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01/29/2008
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Publication #:
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Pub Dt:
|
07/30/2009
| | | | |
Title:
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METHOD AND APPARATUS FOR MEMORY MANAGEMENT IN A NON-VOLATILE MEMORY SYSTEM USING A BLOCK TABLE
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|
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Patent #:
|
|
Issue Dt:
|
05/03/2011
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Application #:
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12022146
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Filing Dt:
|
01/29/2008
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Publication #:
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|
Pub Dt:
|
07/30/2009
| | | | |
Title:
|
READ DISTURBANCE MANAGEMENT IN A NON-VOLATILE MEMORY SYSTEM
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|
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Patent #:
|
|
Issue Dt:
|
10/09/2012
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Application #:
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12040782
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Filing Dt:
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02/29/2008
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Publication #:
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Pub Dt:
|
09/03/2009
| | | | |
Title:
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METHOD AND APPARATUS FOR HIGH SPEED CACHE FLUSHING IN A NON-VOLATILE MEMORY
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|
|
Patent #:
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|
Issue Dt:
|
12/02/2014
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Application #:
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12054391
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Filing Dt:
|
03/25/2008
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Title:
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OPERATION BASED POLLING IN A MEMORY SYSTEM
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|
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Patent #:
|
|
Issue Dt:
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01/07/2014
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Application #:
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12143274
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Filing Dt:
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06/20/2008
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Publication #:
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Pub Dt:
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12/24/2009
| | | | |
Title:
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METHOD AND APPARATUS FOR DYNAMICALLY CONFIGURABLE MULTI LEVEL ERROR CORRECTION
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|
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Patent #:
|
|
Issue Dt:
|
06/12/2012
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Application #:
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12170237
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Filing Dt:
|
07/09/2008
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Publication #:
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Pub Dt:
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01/14/2010
| | | | |
Title:
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METHOD AND APPARATUS FOR PARALLEL ECC ERROR LOCATION
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Patent #:
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|
Issue Dt:
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04/26/2011
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Application #:
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12201937
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Filing Dt:
|
08/29/2008
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Publication #:
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Pub Dt:
|
03/04/2010
| | | | |
Title:
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SYSTEM AND METHOD FOR MANAGING NON-VOLATILE MEMORY BASED ON HEALTH
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|
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Patent #:
|
|
Issue Dt:
|
05/07/2013
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Application #:
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12248690
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Filing Dt:
|
10/09/2008
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Publication #:
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|
Pub Dt:
|
04/15/2010
| | | | |
Title:
|
METHOD AND APPARATUS FOR IMPROVING SMALL WRITE PERFORMANCE IN A NON-VOLATILE MEMORY
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|
|
Patent #:
|
|
Issue Dt:
|
05/26/2015
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Application #:
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12413928
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Filing Dt:
|
03/30/2009
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Publication #:
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Pub Dt:
|
09/30/2010
| | | | |
Title:
|
DOUBLE DATA RATE MEMORY PHYSICAL INTERFACE HIGH SPEED TESTING USING SELF CHECKING LOOPBACK
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|
|
Patent #:
|
|
Issue Dt:
|
01/17/2012
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Application #:
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12413998
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Filing Dt:
|
03/30/2009
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Publication #:
|
|
Pub Dt:
|
09/30/2010
| | | | |
Title:
|
METHOD AND APPARATUS FOR GATE TRAINING IN MEMORY INTERFACES
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|
|
Patent #:
|
|
Issue Dt:
|
05/31/2011
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Application #:
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12414044
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Filing Dt:
|
03/30/2009
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Publication #:
|
|
Pub Dt:
|
09/30/2010
| | | | |
Title:
|
METHOD AND APPARATUS FOR DETERMINING WRITE LEVELING DELAY FOR MEMORY INTERFACES
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|
|
Patent #:
|
|
Issue Dt:
|
04/23/2013
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Application #:
|
12435550
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Filing Dt:
|
05/05/2009
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Publication #:
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Pub Dt:
|
11/11/2010
| | | | |
Title:
|
METHOD AND APPARATUS FOR TRANSFERRING DATA BETWEEN ASYNCHRONOUS CLOCK DOMAINS
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|
|
Patent #:
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|
Issue Dt:
|
01/17/2012
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Application #:
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12534004
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Filing Dt:
|
07/31/2009
|
Publication #:
|
|
Pub Dt:
|
11/26/2009
| | | | |
Title:
|
REACTIVE PLACEMENT CONTROLLER FOR INTERFACING WITH BANKED MEMORY STORAGE
|
|