Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 013758/0096 | |
| Pages: | 7 |
| | Recorded: | 06/25/2003 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
8
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Patent #:
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Issue Dt:
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10/12/1999
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Application #:
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08884377
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Filing Dt:
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06/27/1997
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Title:
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METHOD FOPR COMPILING HIGH LEVEL PROGRAMMING LANGUAGES INTO AN INTEGRATED PROCESSOR WITH RECONFIGURABLE LOGIC
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Patent #:
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Issue Dt:
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10/19/1999
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Application #:
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08884380
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Filing Dt:
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06/27/1997
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Title:
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INTEGRATED PROCESSOR AND PROGRAMMABLE DATA PATH CHIP FOR RECONFIGURABLE COMPUTING
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Patent #:
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Issue Dt:
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06/05/2001
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Application #:
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09264025
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Filing Dt:
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03/08/1999
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Title:
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DIGITAL DATA BIT ORDER CONVERSION USING UNIVERSAL SWITCH MATRIX COMPRISING ROWS OF BIT SWAPPING SELECTOR GROUPS
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Patent #:
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Issue Dt:
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10/02/2001
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Application #:
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09307174
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Filing Dt:
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05/07/1999
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Title:
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BEHAVIORAL SILICON CONSTRUCT ARCHITECTURE AND MAPPING
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Patent #:
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Issue Dt:
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02/12/2002
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Application #:
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09343477
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Filing Dt:
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06/30/1999
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Title:
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LOCAL MEMORY UNIT SYSTEM WITH GLOBAL ACCESS FOR USE ON RECONFIGUALE CHIPS
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Patent #:
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Issue Dt:
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02/19/2002
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Application #:
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09401194
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Filing Dt:
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09/23/1999
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Title:
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CONTROL FABRIC UNIT INCLUDING ASSOCIATED CONFIGURATION MEMORY AND PSOP STATE MACHINE ADAPTED TO PROVIDE CONFIGURATION ADDRESS TO RECONFIGURABLE FUNCTIONAL UNIT
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Patent #:
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Issue Dt:
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02/11/2003
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Application #:
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09507337
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Filing Dt:
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02/18/2000
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Title:
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CONFIGURATION BITS LAYOUT
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Patent #:
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Issue Dt:
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03/25/2003
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Application #:
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09518553
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Filing Dt:
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03/03/2000
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Title:
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SYSTEM AND METHOD FOR CONTROL SYNTHESIS USING A REACHABLE STATES LOOK-UP TABLE
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Assignee
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| 2200 MISSION COLLEGE BLVD. |
| SANTA CLARA, CALIFORNIA 95052 |
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Correspondence name and address
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BLAKELY, SOKOLOFF, TAYLOR & ZAFMAN LLP
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EDWIN H. TAYLOR
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12400 WILSHIRE BLVD., 7TH FLOOR
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LOS ANGELES, CA 90025
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