Patent Assignment Details
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For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 057596/0108 | |
| Pages: | 4 |
| | Recorded: | 09/24/2021 | | |
| Attorney Dkt #: | 126788-0109 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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10/03/2023
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Application #:
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17472172
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Filing Dt:
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09/10/2021
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Publication #:
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Pub Dt:
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09/29/2022
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Title:
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DRAM MEMORY DEVICE WITH OXIDE SEMICONDUCTOR ACCESS TRANSISTOR AND METHOD OF CONTROLLING PLATE LINE POTENTIAL
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Assignee
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| 1-21 SHIBAURA 3-CHOME |
| MINATO-KU, TOKYO, JAPAN |
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Correspondence name and address
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FOLEY & LARDNER LLP
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3000 K STREET N.W.
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SUITE 600
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WASHINGTON, DC 20007-5109
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