skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:049770/0128   Pages: 11
Recorded: 07/16/2019
Attorney Dkt #:TW2085_NO229-248
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 20
1
Patent #:
Issue Dt:
11/13/2012
Application #:
13345765
Filing Dt:
01/09/2012
Publication #:
Pub Dt:
05/03/2012
Title:
TANK-LOCKING DEVICE, SYSTEM FOR MANAGING LIQUID SUPPLY AND METHOD USING THE SAME
2
Patent #:
Issue Dt:
09/24/2013
Application #:
13345766
Filing Dt:
01/09/2012
Publication #:
Pub Dt:
05/03/2012
Title:
TANK-LOCKING DEVICE, SYSTEM FOR MANAGING LIQUID SUPPLY AND METHOD USING THE SAME
3
Patent #:
Issue Dt:
04/29/2014
Application #:
13364252
Filing Dt:
02/01/2012
Publication #:
Pub Dt:
05/30/2013
Title:
METHOD FOR FORMING CONTACT HOLE
4
Patent #:
Issue Dt:
06/23/2015
Application #:
13527251
Filing Dt:
06/19/2012
Publication #:
Pub Dt:
07/11/2013
Title:
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND WRITE-IN METHOD THEREOF
5
Patent #:
Issue Dt:
07/07/2015
Application #:
13549204
Filing Dt:
07/13/2012
Publication #:
Pub Dt:
09/26/2013
Title:
LEVEL SHIFT CIRCUIT AND SEMICONDUCTOR DEVICE USING LEVEL SHIFT CIRCUIT
6
Patent #:
Issue Dt:
11/24/2015
Application #:
13603426
Filing Dt:
09/05/2012
Publication #:
Pub Dt:
10/10/2013
Title:
SEMICONDUCTOR CIRCUIT STRUCTURE AND PROCESS OF MAKING THE SAME
7
Patent #:
Issue Dt:
05/13/2014
Application #:
13610913
Filing Dt:
09/12/2012
Publication #:
Pub Dt:
01/09/2014
Title:
METHOD FOR FORMING CONTACT WINDOW
8
Patent #:
Issue Dt:
11/11/2014
Application #:
13612725
Filing Dt:
09/12/2012
Publication #:
Pub Dt:
10/03/2013
Title:
PROCESS FOR SEMICONDUCTOR CIRCUIT
9
Patent #:
Issue Dt:
07/14/2015
Application #:
13619273
Filing Dt:
09/14/2012
Publication #:
Pub Dt:
10/24/2013
Title:
SEMICONDUCTOR MEMORY DEVICE AND WRITING METHOD OF ID CODES AND UPPER ADDRESSES
10
Patent #:
Issue Dt:
09/02/2014
Application #:
13620730
Filing Dt:
09/15/2012
Publication #:
Pub Dt:
01/02/2014
Title:
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
11
Patent #:
Issue Dt:
06/25/2013
Application #:
13658816
Filing Dt:
10/24/2012
Title:
METHOD OF MANUFACTURING A 3-D VERTICAL MEMORY
12
Patent #:
Issue Dt:
06/17/2014
Application #:
13668866
Filing Dt:
11/05/2012
Publication #:
Pub Dt:
01/02/2014
Title:
INTERNAL VOLTAGE TRIMMING CIRCUIT, METHOD THEREOF AND SEMICONDUCTOR CIRCUIT DEVICE COMPRISING THE SAME
13
Patent #:
Issue Dt:
12/30/2014
Application #:
13674967
Filing Dt:
11/13/2012
Publication #:
Pub Dt:
04/03/2014
Title:
RESISTIVE RANDOM ACCESS MEMORY AND FABRICATION METHOD THEREOF
14
Patent #:
Issue Dt:
09/02/2014
Application #:
13677796
Filing Dt:
11/15/2012
Publication #:
Pub Dt:
01/23/2014
Title:
NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND READOUT METHOD THEREOF
15
Patent #:
Issue Dt:
09/17/2013
Application #:
13745867
Filing Dt:
01/21/2013
Publication #:
Pub Dt:
05/23/2013
Title:
MANUFACTURING METHOD OF VERTICAL CHANNEL TRANSISTOR ARRAY
16
Patent #:
Issue Dt:
11/17/2015
Application #:
13801139
Filing Dt:
03/13/2013
Publication #:
Pub Dt:
02/06/2014
Title:
NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND READING-OUT METHOD THEREFORE
17
Patent #:
Issue Dt:
05/13/2014
Application #:
13831976
Filing Dt:
03/15/2013
Publication #:
Pub Dt:
08/08/2013
Title:
METHOD OF FABRICATING NON-VOLATILE MEMORY DEVICE
18
Patent #:
Issue Dt:
06/03/2014
Application #:
13845106
Filing Dt:
03/18/2013
Publication #:
Pub Dt:
08/22/2013
Title:
FABRICATING METHOD OF NON-VOLATILE MEMORY
19
Patent #:
Issue Dt:
12/15/2015
Application #:
14081222
Filing Dt:
11/15/2013
Publication #:
Pub Dt:
05/22/2014
Title:
PROGRAMMING METHOD FOR NAND FLASH MEMORY DEVICE TO REDUCE ELECTRONS IN CHANNELS
20
Patent #:
Issue Dt:
07/07/2015
Application #:
14182889
Filing Dt:
02/18/2014
Publication #:
Pub Dt:
03/19/2015
Title:
NONVOLATILE SEMICONDUCTOR STORAGE DEVICE AND CONTROL METHOD THEREOF
Assignor
1
Exec Dt:
06/28/2019
Assignee
1
NO. 18, LI-HSIN RD. 1, HSINCHU SCIENCE PARK,
HSINCHU, TAIWAN
Correspondence name and address
JCIPRNET
P.O. BOX 600 TAIPEI GUTING
TAIPEI CITY, 10099 TAIWAN

Search Results as of: 05/24/2024 12:40 AM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT