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Patent Assignment Details
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Reel/Frame:018855/0129   Pages: 450
Recorded: 02/02/2007
Attorney Dkt #:376679
Conveyance: SECURITY AGREEMENT
Total properties: 5503
Page 48 of 56
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56
1
Patent #:
7574219
Issue Dt:
08/11/2009
Application #:
11103521
Filing Dt:
04/12/2005
Publication #:
US20050265503
Pub Dt:
12/01/2005
Title:
METHOD AND SYSTEM FOR ENABLING DEVICE FUNCTIONS BASED ON DISTANCE INFORMATION
2
Patent #:
NONE
Issue Dt:
Application #:
11106797
Filing Dt:
04/15/2005
Publication #:
US20060234436
Pub Dt:
10/19/2006
Title:
Method of forming a semiconductor device having a high-k dielectric
3
Patent #:
NONE
Issue Dt:
Application #:
11106822
Filing Dt:
04/15/2005
Publication #:
US20060234467
Pub Dt:
10/19/2006
Title:
Method of forming trench isolation in a semiconductor device
4
Patent #:
NONE
Issue Dt:
Application #:
11106849
Filing Dt:
04/15/2005
Publication #:
US20060234474
Pub Dt:
10/19/2006
Title:
Method of transferring a thin crystalline semiconductor layer
5
Patent #:
7192855
Issue Dt:
03/20/2007
Application #:
11106970
Filing Dt:
04/15/2005
Publication #:
US20060234434
Pub Dt:
10/19/2006
Title:
PECVD NITRIDE FILM
6
Patent #:
7160755
Issue Dt:
01/09/2007
Application #:
11108220
Filing Dt:
04/18/2005
Publication #:
US20060234421
Pub Dt:
10/19/2006
Title:
METHOD OF FORMING A SUBSTRATELESS SEMICONDUCTOR PACKAGE
7
Patent #:
7196427
Issue Dt:
03/27/2007
Application #:
11108223
Filing Dt:
04/18/2005
Publication #:
US20060231938
Pub Dt:
10/19/2006
Title:
STRUCTURE HAVING AN INTEGRATED CIRCUIT ON ANOTHER INTEGRATED CIRCUIT WITH AN INTERVENING BENT ADHESIVE ELEMENT
8
Patent #:
7098073
Issue Dt:
08/29/2006
Application #:
11108224
Filing Dt:
04/18/2005
Title:
METHOD FOR STACKING AN INTEGRATED CIRCUIT ON ANOTHER INTEGRATED CIRCUIT
9
Patent #:
7221006
Issue Dt:
05/22/2007
Application #:
11110234
Filing Dt:
04/20/2005
Publication #:
US20060237746
Pub Dt:
10/26/2006
Title:
GESOI TRANSISTOR WITH LOW JUNCTION CURRENT AND LOW JUNCTION CAPACITANCE AND METHOD FOR MAKING THE SAME
10
Patent #:
7374971
Issue Dt:
05/20/2008
Application #:
11110283
Filing Dt:
04/20/2005
Publication #:
US20060237850
Pub Dt:
10/26/2006
Title:
SEMICONDUCTOR DIE EDGE RECONDITIONING
11
Patent #:
7205202
Issue Dt:
04/17/2007
Application #:
11111450
Filing Dt:
04/21/2005
Publication #:
US20060240609
Pub Dt:
10/26/2006
Title:
SEMICONDUCTOR DEVICE AND METHOD FOR REGIONAL STRESS CONTROL
12
Patent #:
7271069
Issue Dt:
09/18/2007
Application #:
11111451
Filing Dt:
04/21/2005
Publication #:
US20060240650
Pub Dt:
10/26/2006
Title:
SEMICONDUCTOR DEVICE HAVING A PLURALITY OF DIFFERENT LAYERS AND METHOD THEREFOR
13
Patent #:
7236339
Issue Dt:
06/26/2007
Application #:
11111528
Filing Dt:
04/21/2005
Publication #:
US20050185351
Pub Dt:
08/25/2005
Title:
ELECTROSTATIC DISCHARGE CIRCUIT AND METHOD THEREFOR
14
Patent #:
7291521
Issue Dt:
11/06/2007
Application #:
11113589
Filing Dt:
04/25/2005
Publication #:
US20060240629
Pub Dt:
10/26/2006
Title:
SELF CORRECTING SUPPRESSION OF THRESHOLD VOLTAGE VARIATION IN FULLY DEPLETED TRANSISTORS
15
Patent #:
7469020
Issue Dt:
12/23/2008
Application #:
11114366
Filing Dt:
04/26/2005
Publication #:
US20060239377
Pub Dt:
10/26/2006
Title:
SYSTEMS, METHODS, AND APPARATUS FOR REDUCING DYNAMIC RANGE REQUIREMENTS OF A POWER AMPLIFIER IN A WIRELESS DEVICE
16
Patent #:
7227783
Issue Dt:
06/05/2007
Application #:
11116614
Filing Dt:
04/28/2005
Publication #:
US20060245262
Pub Dt:
11/02/2006
Title:
MEMORY STRUCTURE AND METHOD OF PROGRAMMING
17
Patent #:
NONE
Issue Dt:
Application #:
11116648
Filing Dt:
04/28/2005
Publication #:
US20060248079
Pub Dt:
11/02/2006
Title:
Method and apparatus for finding a perfect hash function and making minimal hash table for a given set of keys
18
Patent #:
7433803
Issue Dt:
10/07/2008
Application #:
11116672
Filing Dt:
04/27/2005
Publication #:
US20060248410
Pub Dt:
11/02/2006
Title:
PERFORMANCE MONITOR WITH PRECISE START-STOP CONTROL
19
Patent #:
NONE
Issue Dt:
Application #:
11116788
Filing Dt:
04/28/2005
Publication #:
US20060288024
Pub Dt:
12/21/2006
Title:
Compressed representations of tries
20
Patent #:
7211852
Issue Dt:
05/01/2007
Application #:
11117349
Filing Dt:
04/29/2005
Publication #:
US20050194593
Pub Dt:
09/08/2005
Title:
STRUCTURE AND METHOD FOR FABRICATING GAN DEVICES UTILIZING THE FORMATION OF A COMPLIANT SUBSTRATE
21
Patent #:
7322000
Issue Dt:
01/22/2008
Application #:
11117777
Filing Dt:
04/29/2005
Publication #:
US20060248419
Pub Dt:
11/02/2006
Title:
METHODS AND APPARATUS FOR EXTENDING SEMICONDUCTOR CHIP TESTING WITH BOUNDARY SCAN REGISTERS
22
Patent #:
7561076
Issue Dt:
07/14/2009
Application #:
11117820
Filing Dt:
04/29/2005
Publication #:
US20060244640
Pub Dt:
11/02/2006
Title:
FRONT-END METHOD FOR NICAM ENCODING
23
Patent #:
7272767
Issue Dt:
09/18/2007
Application #:
11117893
Filing Dt:
04/29/2005
Publication #:
US20060248424
Pub Dt:
11/02/2006
Title:
METHODS AND APPARATUS FOR INCORPORATING IDDQ TESTING INTO LOGIC BIST
24
Patent #:
7282386
Issue Dt:
10/16/2007
Application #:
11117996
Filing Dt:
04/29/2005
Publication #:
US20060246670
Pub Dt:
11/02/2006
Title:
SCHOTTKY DEVICE AND METHOD OF FORMING
25
Patent #:
7158407
Issue Dt:
01/02/2007
Application #:
11118145
Filing Dt:
04/29/2005
Publication #:
US20060245242
Pub Dt:
11/02/2006
Title:
TRIPLE PULSE METHOD FOR MRAM TOGGLE BIT CHARACTERIZATION
26
Patent #:
7109906
Issue Dt:
09/19/2006
Application #:
11118211
Filing Dt:
04/29/2005
Title:
NICAM ENCODER FEATURING SYNCHRONIZATION OF A NICAM PROCESSOR WITH FRONT-END INPUT AND OUTPUT SECTIONS
27
Patent #:
7684518
Issue Dt:
03/23/2010
Application #:
11118230
Filing Dt:
04/28/2005
Publication #:
US20060245520
Pub Dt:
11/02/2006
Title:
LOGIC THRESHOLD ACQUISITION CIRCUITS AND METHODS USING REVERSED PEAK DETECTORS
28
Patent #:
7262655
Issue Dt:
08/28/2007
Application #:
11118283
Filing Dt:
04/28/2005
Publication #:
US20060244526
Pub Dt:
11/02/2006
Title:
HIGH BANDWIDTH RESISTOR
29
Patent #:
7447944
Issue Dt:
11/04/2008
Application #:
11118827
Filing Dt:
04/29/2005
Publication #:
US20060245248
Pub Dt:
11/02/2006
Title:
PREDICTIVE METHODS AND APPARATUS FOR NON-VOLATILE MEMORY
30
Patent #:
7409738
Issue Dt:
08/12/2008
Application #:
11119142
Filing Dt:
04/28/2005
Publication #:
US20060242769
Pub Dt:
11/02/2006
Title:
SYSTEM AND METHOD FOR PREDICTING ROTATIONAL IMBALANCE
31
Patent #:
7272053
Issue Dt:
09/18/2007
Application #:
11120270
Filing Dt:
05/02/2005
Publication #:
US20060104122
Pub Dt:
05/18/2006
Title:
INTEGRATED CIRCUIT HAVING A NON-VOLATILE MEMORY WITH DISCHARGE RATE CONTROL AND METHOD THEREFOR
32
Patent #:
NONE
Issue Dt:
Application #:
11120272
Filing Dt:
05/02/2005
Publication #:
US20060248279
Pub Dt:
11/02/2006
Title:
Prefetching across a page boundary
33
Patent #:
NONE
Issue Dt:
Application #:
11120287
Filing Dt:
05/02/2005
Publication #:
US20060248280
Pub Dt:
11/02/2006
Title:
Prefetch address generation implementing multiple confidence levels
34
Patent #:
7506105
Issue Dt:
03/17/2009
Application #:
11120288
Filing Dt:
05/02/2005
Publication #:
US20060248281
Pub Dt:
11/02/2006
Title:
PREFETCHING USING HASHED PROGRAM COUNTER
35
Patent #:
7239182
Issue Dt:
07/03/2007
Application #:
11122908
Filing Dt:
05/05/2005
Publication #:
US20050280440
Pub Dt:
12/22/2005
Title:
PREDRIVER CIRCUIT
36
Patent #:
7242626
Issue Dt:
07/10/2007
Application #:
11123484
Filing Dt:
05/06/2005
Publication #:
US20060250838
Pub Dt:
11/09/2006
Title:
METHOD AND APPARATUS FOR LOW VOLTAGE WRITE IN A STATIC RANDOM ACCESS MEMORY
37
Patent #:
7193924
Issue Dt:
03/20/2007
Application #:
11123514
Filing Dt:
05/06/2005
Publication #:
US20060250880
Pub Dt:
11/09/2006
Title:
DUAL-PORT STATIC RANDOM ACCESS MEMORY HAVING IMPROVED CELL STABILITY AND WRITE MARGIN
38
Patent #:
7211477
Issue Dt:
05/01/2007
Application #:
11124469
Filing Dt:
05/06/2005
Publication #:
US20060249751
Pub Dt:
11/09/2006
Title:
HIGH VOLTAGE FIELD EFFECT DEVICE AND METHOD
39
Patent #:
7164301
Issue Dt:
01/16/2007
Application #:
11125462
Filing Dt:
05/10/2005
Publication #:
US20060255849
Pub Dt:
11/16/2006
Title:
STATE RETENTION POWER GATING LATCH CIRCUIT
40
Patent #:
7279341
Issue Dt:
10/09/2007
Application #:
11125955
Filing Dt:
05/09/2005
Publication #:
US20050208681
Pub Dt:
09/22/2005
Title:
METHOD FOR FABRICATING A FLUX CONCENTRATING SYSTEM FOR USE IN A MAGNETOELECTRONICS DEVICE
41
Patent #:
7548561
Issue Dt:
06/16/2009
Application #:
11128267
Filing Dt:
05/13/2005
Publication #:
US20060256818
Pub Dt:
11/16/2006
Title:
METHOD OF TRANSMITTING AND RECEIVING DATA
42
Patent #:
7444556
Issue Dt:
10/28/2008
Application #:
11128268
Filing Dt:
05/13/2005
Publication #:
US20060259843
Pub Dt:
11/16/2006
Title:
SYSTEM AND METHOD OF INTERLEAVING TRANSMITTED DATA
43
Patent #:
7570627
Issue Dt:
08/04/2009
Application #:
11128269
Filing Dt:
05/13/2005
Publication #:
US20060203795
Pub Dt:
09/14/2006
Title:
METHOD FOR SHARING BANDWIDTH USING REDUCED DUTY CYCLE SIGNALS AND MEDIA ACCESS CONTROL
44
Patent #:
NONE
Issue Dt:
Application #:
11128281
Filing Dt:
05/13/2005
Publication #:
US20060256907
Pub Dt:
11/16/2006
Title:
Real time clock
45
Patent #:
7305643
Issue Dt:
12/04/2007
Application #:
11128659
Filing Dt:
05/12/2005
Publication #:
US20060259888
Pub Dt:
11/16/2006
Title:
METHOD OF TILING ANALOG CIRCUITS THAT INCLUDE RESISTORS AND CAPACITORS
46
Patent #:
NONE
Issue Dt:
Application #:
11129247
Filing Dt:
05/13/2005
Publication #:
US20060256793
Pub Dt:
11/16/2006
Title:
Efficient multi-bank buffer management scheme for non-aligned data
47
Patent #:
NONE
Issue Dt:
Application #:
11129250
Filing Dt:
05/13/2005
Publication #:
US20070118677
Pub Dt:
05/24/2007
Title:
Packet switch having a crossbar switch that connects multiport receiving and transmitting elements
48
Patent #:
7356628
Issue Dt:
04/08/2008
Application #:
11129600
Filing Dt:
05/13/2005
Publication #:
US20060259671
Pub Dt:
11/16/2006
Title:
PACKET SWITCH WITH MULTIPLE ADDRESSABLE COMPONENTS
49
Patent #:
7245527
Issue Dt:
07/17/2007
Application #:
11130351
Filing Dt:
05/16/2005
Publication #:
US20060256610
Pub Dt:
11/16/2006
Title:
NONVOLATILE MEMORY SYSTEM USING MAGNETO-RESISTIVE RANDOM ACCESS MEMORY (MRAM)
50
Patent #:
7301741
Issue Dt:
11/27/2007
Application #:
11130873
Filing Dt:
05/17/2005
Publication #:
US20060262469
Pub Dt:
11/23/2006
Title:
INTEGRATED CIRCUIT WITH MULTIPLE INDEPENDENT GATE FIELD EFFECT TRANSISTOR (MIGFET) RAIL CLAMP CIRCUIT
51
Patent #:
7295487
Issue Dt:
11/13/2007
Application #:
11132457
Filing Dt:
05/19/2005
Publication #:
US20060262633
Pub Dt:
11/23/2006
Title:
STORAGE CIRCUIT AND METHOD THEREFOR
52
Patent #:
NONE
Issue Dt:
Application #:
11132936
Filing Dt:
05/19/2005
Publication #:
US20060261436
Pub Dt:
11/23/2006
Title:
METHOD FOR FORMING TRENCH ISOLATION STRUCTURE HAVING DEEP AND SHALLOW PORTIONS IN A SEMICONDUCTOR LAYER
53
Patent #:
7496060
Issue Dt:
02/24/2009
Application #:
11134712
Filing Dt:
05/20/2005
Publication #:
US20060262739
Pub Dt:
11/23/2006
Title:
EXTENDING BATTERY LIFE IN COMMUNICATION DEVICES HAVING A PLURALITY OF RECEIVERS
54
Patent #:
7466006
Issue Dt:
12/16/2008
Application #:
11134792
Filing Dt:
05/19/2005
Publication #:
US20060261382
Pub Dt:
11/23/2006
Title:
STRUCTURE AND METHOD FOR RESURF DIODES WITH A CURRENT DIVERTER
55
Patent #:
7233539
Issue Dt:
06/19/2007
Application #:
11135963
Filing Dt:
05/24/2005
Publication #:
US20060268644
Pub Dt:
11/30/2006
Title:
NON-VOLATILE FUSE CIRCUIT
56
Patent #:
7512391
Issue Dt:
03/31/2009
Application #:
11136752
Filing Dt:
05/24/2005
Publication #:
US20060270374
Pub Dt:
11/30/2006
Title:
SELF-ALIGNING RESONATOR FILTER CIRCUIT AND WIDEBAND TUNER CIRCUIT INCORPORATING SAME
57
Patent #:
7276456
Issue Dt:
10/02/2007
Application #:
11136845
Filing Dt:
05/25/2005
Publication #:
US20050221623
Pub Dt:
10/06/2005
Title:
ARTICLE COMPRISING AN OXIDE LAYER ON A GAAS-BASED SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING SAME
58
Patent #:
7015517
Issue Dt:
03/21/2006
Application #:
11137244
Filing Dt:
05/25/2005
Publication #:
US20050205936
Pub Dt:
09/22/2005
Title:
SEMICONDUCTOR DEVICE INCORPORATING A DEFECT CONTROLLED STRAINED CHANNEL STRUCTURE AND METHOD OF MAKING THE SAME
59
Patent #:
NONE
Issue Dt:
Application #:
11137979
Filing Dt:
05/25/2005
Publication #:
US20060270190
Pub Dt:
11/30/2006
Title:
Method of transferring a thin crystalline semiconductor layer
60
Patent #:
7402529
Issue Dt:
07/22/2008
Application #:
11139143
Filing Dt:
05/26/2005
Publication #:
US20050263400
Pub Dt:
12/01/2005
Title:
METHOD OF APPLYING CLADDING MATERIAL ON CONDUCTIVE LINES OF MRAM DEVICES
61
Patent #:
8404594
Issue Dt:
03/26/2013
Application #:
11139765
Filing Dt:
05/27/2005
Publication #:
US20060270239
Pub Dt:
11/30/2006
Title:
REVERSE ALD
62
Patent #:
NONE
Issue Dt:
Application #:
11140161
Filing Dt:
05/27/2005
Publication #:
US20060267113
Pub Dt:
11/30/2006
Title:
Semiconductor device structure and method therefor
63
Patent #:
NONE
Issue Dt:
Application #:
11140162
Filing Dt:
05/27/2005
Publication #:
US20060270234
Pub Dt:
11/30/2006
Title:
Method and composition for preparing a semiconductor surface for deposition of a barrier material
64
Patent #:
7296137
Issue Dt:
11/13/2007
Application #:
11140176
Filing Dt:
05/27/2005
Publication #:
US20060271759
Pub Dt:
11/30/2006
Title:
MEMORY MANAGEMENT CIRCUITRY TRANSLATION INFORMATION RETREIVAL DURING DEBUGGING
65
Patent #:
7299335
Issue Dt:
11/20/2007
Application #:
11140310
Filing Dt:
05/27/2005
Publication #:
US20060271919
Pub Dt:
11/30/2006
Title:
TRANSLATION INFORMATION RETRIEVAL TRANSPARENT TO PROCESSOR CORE
66
Patent #:
7339267
Issue Dt:
03/04/2008
Application #:
11140351
Filing Dt:
05/26/2005
Publication #:
US20060270194
Pub Dt:
11/30/2006
Title:
SEMICONDUCTOR PACKAGE AND METHOD FOR FORMING THE SAME
67
Patent #:
7341915
Issue Dt:
03/11/2008
Application #:
11142057
Filing Dt:
05/31/2005
Publication #:
US20060270164
Pub Dt:
11/30/2006
Title:
METHOD OF MAKING PLANAR DOUBLE GATE SILICON-ON-INSULATOR STRUCTURES
68
Patent #:
7271469
Issue Dt:
09/18/2007
Application #:
11142077
Filing Dt:
05/31/2005
Publication #:
US20060267161
Pub Dt:
11/30/2006
Title:
METHODS OF MAKING INTEGRATED CIRCUITS
69
Patent #:
7329566
Issue Dt:
02/12/2008
Application #:
11142111
Filing Dt:
05/31/2005
Publication #:
US20060267089
Pub Dt:
11/30/2006
Title:
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE
70
Patent #:
7353311
Issue Dt:
04/01/2008
Application #:
11142148
Filing Dt:
06/01/2005
Publication #:
US20060277349
Pub Dt:
12/07/2006
Title:
METHOD OF ACCESSING INFORMATION AND SYSTEM THEREFOR
71
Patent #:
7138686
Issue Dt:
11/21/2006
Application #:
11142433
Filing Dt:
05/31/2005
Publication #:
US20060267133
Pub Dt:
11/30/2006
Title:
INTEGRATED CIRCUIT WITH IMPROVED SIGNAL NOISE ISOLATION AND METHOD FOR IMPROVING SIGNAL NOISE ISOLATION
72
Patent #:
7480837
Issue Dt:
01/20/2009
Application #:
11142639
Filing Dt:
06/01/2005
Publication #:
US20060277447
Pub Dt:
12/07/2006
Title:
METHOD OF MONITORING TIMEOUT CONDITIONS AND DEVICE THEREFOR
73
Patent #:
NONE
Issue Dt:
Application #:
11143295
Filing Dt:
06/02/2005
Publication #:
US20050224455
Pub Dt:
10/13/2005
Title:
Method for making a semiconductor device using treated photoresist as an implant mask
74
Patent #:
7244989
Issue Dt:
07/17/2007
Application #:
11144569
Filing Dt:
06/02/2005
Publication #:
US20060273402
Pub Dt:
12/07/2006
Title:
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE
75
Patent #:
7180158
Issue Dt:
02/20/2007
Application #:
11144570
Filing Dt:
06/02/2005
Publication #:
US20060273428
Pub Dt:
12/07/2006
Title:
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE
76
Patent #:
7385307
Issue Dt:
06/10/2008
Application #:
11145629
Filing Dt:
06/06/2005
Publication #:
US20050269879
Pub Dt:
12/08/2005
Title:
DRIVE ARRANGEMENT FOR ACTIVATING A CAR SAFETY DEVICE ACTIVATION ELEMENT
77
Patent #:
NONE
Issue Dt:
Application #:
11146110
Filing Dt:
06/07/2005
Publication #:
US20060274815
Pub Dt:
12/07/2006
Title:
System and method for selecting a strongest signal across clock domains in an ultra wideband receiver
78
Patent #:
7387946
Issue Dt:
06/17/2008
Application #:
11146825
Filing Dt:
06/07/2005
Publication #:
US20060276004
Pub Dt:
12/07/2006
Title:
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Title:
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Pub Dt:
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Title:
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Pub Dt:
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Title:
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82
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Pub Dt:
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Title:
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Title:
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Title:
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Pub Dt:
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Title:
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Title:
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Title:
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Title:
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Title:
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Pub Dt:
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Title:
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95
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Title:
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Title:
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Pub Dt:
12/28/2006
Title:
METHOD OF MAKING A METAL GATE SEMICONDUCTOR DEVICE
Assignors
1
FREESCALE SEMICONDUCTOR, INC.
Exec Dt:
12/01/2006
2
FREESCALE ACQUISITION CORPORATION
Exec Dt:
12/01/2006
3
FREESCALE ACQUISITION HOLDINGS CORP.
Exec Dt:
12/01/2006
4
FREESCALE HOLDINGS (BERMUDA) III, LTD.
Exec Dt:
12/01/2006
Assignee
1
CITIBANK, N.A. AS COLLATERAL AGENT
390 GREENWICH STREET
NEW YORK, NEW YORK 10013
Correspondence name and address
CBCINNOVIS DBA FEDERAL RESEARCH
1023 FIFTEENTH STREET, NW, STE 401
ATTN: OLEH HERELIUK
WASHINGTON, DC 20005

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