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Reel/Frame:018855/0129   Pages: 450
Recorded: 02/02/2007
Attorney Dkt #:376679
Conveyance: SECURITY AGREEMENT
Total properties: 5503
Page 52 of 56
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56
1
Patent #:
Issue Dt:
03/30/2010
Application #:
11342102
Filing Dt:
01/27/2006
Publication #:
Pub Dt:
08/02/2007
Title:
METHOD OF FORMING A SEMICONDUCTOR ISOLATION TRENCH
2
Patent #:
Issue Dt:
06/09/2009
Application #:
11342155
Filing Dt:
01/27/2006
Publication #:
Pub Dt:
08/02/2007
Title:
SPLIT GATE MEMORY CELL IN A FINFET
3
Patent #:
Issue Dt:
08/26/2008
Application #:
11342747
Filing Dt:
01/30/2006
Publication #:
Pub Dt:
08/02/2007
Title:
SYSTEM AND METHOD FOR REDUCING THE POWER CONSUMPTION OF CLOCK SYSTEMS
4
Patent #:
NONE
Issue Dt:
Application #:
11342868
Filing Dt:
01/31/2006
Publication #:
Pub Dt:
08/31/2006
Title:
System and method for generating shaped ultrawide bandwidth wavelets
5
Patent #:
Issue Dt:
08/16/2011
Application #:
11343454
Filing Dt:
01/31/2006
Publication #:
Pub Dt:
08/02/2007
Title:
DISTRIBUTED RESOURCE ACCESS PROTECTION
6
Patent #:
Issue Dt:
03/31/2009
Application #:
11343623
Filing Dt:
01/30/2006
Publication #:
Pub Dt:
08/02/2007
Title:
MOS DEVICE WITH MULTI-LAYER GATE STACK
7
Patent #:
Issue Dt:
04/20/2010
Application #:
11343624
Filing Dt:
01/30/2006
Publication #:
Pub Dt:
08/02/2007
Title:
MOS DEVICE WITH NANO-CRYSTAL GATE STRUCTURE
8
Patent #:
NONE
Issue Dt:
Application #:
11343781
Filing Dt:
01/31/2006
Publication #:
Pub Dt:
08/16/2007
Title:
Detecting reflections in a communication channel
9
Patent #:
Issue Dt:
10/21/2008
Application #:
11344511
Filing Dt:
01/31/2006
Publication #:
Pub Dt:
08/02/2007
Title:
TEMPERATURE COMPENSATION DEVICE AND METHOD THEREOF
10
Patent #:
Issue Dt:
12/14/2010
Application #:
11346649
Filing Dt:
02/03/2006
Publication #:
Pub Dt:
08/09/2007
Title:
COMMUNICATION SYSTEM WITH MIMO CHANNEL ESTIMATION USING PEAK-LIMITED PILOT SIGNALS
11
Patent #:
Issue Dt:
01/04/2011
Application #:
11347103
Filing Dt:
02/03/2006
Publication #:
Pub Dt:
08/09/2007
Title:
SELECTIVE TRANSACTION REQUEST PROCESSING AT AN INTERCONNECT DURING A LOCKOUT
12
Patent #:
Issue Dt:
05/06/2008
Application #:
11347461
Filing Dt:
02/03/2006
Publication #:
Pub Dt:
08/09/2007
Title:
GROUND SHIELDS FOR SEMICONDUCTORS
13
Patent #:
Issue Dt:
05/19/2009
Application #:
11348021
Filing Dt:
02/06/2006
Publication #:
Pub Dt:
08/09/2007
Title:
RECESSED POLY EXTENSION T-GATE
14
Patent #:
NONE
Issue Dt:
Application #:
11348034
Filing Dt:
02/06/2006
Publication #:
Pub Dt:
08/09/2007
Title:
Stressed-channel CMOS transistors
15
Patent #:
Issue Dt:
11/04/2008
Application #:
11349595
Filing Dt:
02/08/2006
Publication #:
Pub Dt:
08/09/2007
Title:
METHOD OF FORMING A CMOS DEVICE WITH STRESSOR SOURCE/DRAIN REGIONS
16
Patent #:
Issue Dt:
06/03/2008
Application #:
11349608
Filing Dt:
02/08/2006
Publication #:
Pub Dt:
08/09/2007
Title:
EDGE SEAL FOR IMPROVING INTEGRATED CIRCUIT NOISE ISOLATION
17
Patent #:
Issue Dt:
03/16/2010
Application #:
11349874
Filing Dt:
02/08/2006
Publication #:
Pub Dt:
08/09/2007
Title:
ADAPTIVE VARIABLE LENGTH PULSE SYNCHRONIZER
18
Patent #:
Issue Dt:
11/04/2008
Application #:
11349875
Filing Dt:
02/08/2006
Publication #:
Pub Dt:
08/09/2007
Title:
METHOD FOR FORMING A SEMICONDUCTOR-ON-INSULATOR (SOI) BODY-CONTACTED DEVICE WITH A PORTION OF DRAIN REGION REMOVED
19
Patent #:
Issue Dt:
10/24/2006
Application #:
11350305
Filing Dt:
02/08/2006
Publication #:
Pub Dt:
06/15/2006
Title:
TRANSISTOR WITH REDUCED GATE-TO-SOURCE CAPACITANCE AND METHOD THEREFOR
20
Patent #:
NONE
Issue Dt:
Application #:
11350306
Filing Dt:
02/08/2006
Publication #:
Pub Dt:
08/09/2007
Title:
Magnetic alignment of integrated circuits to each other
21
Patent #:
NONE
Issue Dt:
Application #:
11351517
Filing Dt:
02/10/2006
Publication #:
Pub Dt:
08/16/2007
Title:
Semiconductor device and method for incorporating a halogen in a dielectric
22
Patent #:
Issue Dt:
10/23/2007
Application #:
11351518
Filing Dt:
02/10/2006
Publication #:
Pub Dt:
08/16/2007
Title:
METHOD TO SELECTIVELY FORM REGIONS HAVING DIFFERING PROPERTIES AND STRUCTURE
23
Patent #:
Issue Dt:
10/07/2008
Application #:
11351610
Filing Dt:
02/10/2006
Publication #:
Pub Dt:
08/16/2007
Title:
METHOD OF MANUFACTURING A MAGNETOELECTRONIC DEVICE
24
Patent #:
NONE
Issue Dt:
Application #:
11353162
Filing Dt:
02/14/2006
Publication #:
Pub Dt:
08/16/2007
Title:
Method and apparatus for network security
25
Patent #:
Issue Dt:
05/27/2008
Application #:
11354472
Filing Dt:
02/14/2006
Publication #:
Pub Dt:
08/16/2007
Title:
METHODS AND APPARATUS FOR A HIGH-FREQUENCY OUTPUT MATCH CIRCUIT
26
Patent #:
Issue Dt:
10/28/2008
Application #:
11355681
Filing Dt:
02/16/2006
Publication #:
Pub Dt:
11/08/2007
Title:
METHOD AND APPARATUS FOR TESTING A DATA PROCESSING SYSTEM
27
Patent #:
Issue Dt:
08/07/2007
Application #:
11355682
Filing Dt:
02/16/2006
Publication #:
Pub Dt:
12/21/2006
Title:
FUSE CIRCUIT AND ELECTRONIC CIRCUIT
28
Patent #:
Issue Dt:
04/22/2008
Application #:
11355822
Filing Dt:
02/16/2006
Publication #:
Pub Dt:
08/16/2007
Title:
METHOD FOR MAKING AN INTEGRATED CIRCUIT HAVING AN EMBEDDED NON-VOLATILE MEMORY
29
Patent #:
Issue Dt:
03/18/2008
Application #:
11356229
Filing Dt:
02/16/2006
Publication #:
Pub Dt:
08/30/2007
Title:
EMBEDDED SUBSTRATE INTERCONNECT FOR UNDERSIDE CONTACT TO SOURCE AND DRAIN REGIONS
30
Patent #:
Issue Dt:
11/10/2009
Application #:
11359329
Filing Dt:
02/21/2006
Publication #:
Pub Dt:
09/20/2007
Title:
ERROR CORRECTION DEVICE AND METHOD THEREOF
31
Patent #:
Issue Dt:
04/06/2010
Application #:
11360218
Filing Dt:
02/23/2006
Publication #:
Pub Dt:
08/23/2007
Title:
MANAGING PACKETS FOR TRANSMISSION IN A COMMUNICATION SYSTEM
32
Patent #:
Issue Dt:
10/27/2009
Application #:
11360285
Filing Dt:
02/23/2006
Publication #:
Pub Dt:
08/23/2007
Title:
NOISE ISOLATION BETWEEN CIRCUIT BLOCKS IN AN INTEGRATED CIRCUIT CHIP
33
Patent #:
NONE
Issue Dt:
Application #:
11360318
Filing Dt:
02/22/2006
Publication #:
Pub Dt:
08/23/2007
Title:
Method for improving self-aligned silicide extendibility with spacer recess using a stand-alone recess etch integration
34
Patent #:
Issue Dt:
02/02/2010
Application #:
11360336
Filing Dt:
02/23/2006
Publication #:
Pub Dt:
08/23/2007
Title:
CAP LAYER FOR AN ALUMINUM COPPER BOND PAD
35
Patent #:
Issue Dt:
08/03/2010
Application #:
11360724
Filing Dt:
02/23/2006
Publication #:
Pub Dt:
08/23/2007
Title:
ELECTRONIC DEVICE AND METHOD
36
Patent #:
NONE
Issue Dt:
Application #:
11360796
Filing Dt:
02/23/2006
Publication #:
Pub Dt:
08/23/2007
Title:
Poly pre-doping anneals for improved gate profiles
37
Patent #:
Issue Dt:
07/21/2009
Application #:
11360897
Filing Dt:
02/22/2006
Publication #:
Pub Dt:
08/23/2007
Title:
METHOD FOR IMPROVING SELF-ALIGNED SILICIDE EXTENDIBILITY WITH SPACER RECESS USING AN AGGREGATED SPACER RECESS ETCH (ASRE) INTEGRATION
38
Patent #:
Issue Dt:
12/22/2009
Application #:
11360925
Filing Dt:
02/23/2006
Publication #:
Pub Dt:
08/23/2007
Title:
METHOD AND APPARATUS FOR INDICATING DIRECTIONALITY IN INTEGRATED CIRCUIT MANUFACTURING
39
Patent #:
Issue Dt:
05/20/2008
Application #:
11360926
Filing Dt:
02/23/2006
Publication #:
Pub Dt:
08/23/2007
Title:
DATA PROCESSING SYSTEM HAVING ADDRESS TRANSLATION BYPASS AND METHOD THEREFOR
40
Patent #:
Issue Dt:
05/26/2009
Application #:
11361171
Filing Dt:
02/24/2006
Publication #:
Pub Dt:
08/30/2007
Title:
SEMICONDUCTOR PROCESS INTEGRATING SOURCE/DRAIN STRESSORS AND INTERLEVEL DIELECTRIC LAYER STRESSORS
41
Patent #:
Issue Dt:
03/31/2009
Application #:
11361624
Filing Dt:
02/24/2006
Publication #:
Pub Dt:
08/30/2007
Title:
METHOD AND APPARATUS FOR A STEPPED-DRIFT MOSFET
42
Patent #:
Issue Dt:
02/23/2010
Application #:
11361625
Filing Dt:
02/24/2006
Publication #:
Pub Dt:
08/30/2007
Title:
LOW VOLTAGE OUTPUT BUFFER AND METHOD FOR BUFFERING DIGITAL OUTPUT DATA
43
Patent #:
Issue Dt:
04/12/2011
Application #:
11361948
Filing Dt:
02/24/2006
Publication #:
Pub Dt:
08/30/2007
Title:
FLEXIBLE MACROBLOCK ORDERING WITH REDUCED DATA TRAFFIC AND POWER CONSUMPTION
44
Patent #:
Issue Dt:
03/09/2010
Application #:
11362214
Filing Dt:
02/24/2006
Publication #:
Pub Dt:
08/30/2007
Title:
SYNCHRONIZATION FOR OFDM SIGNALS
45
Patent #:
Issue Dt:
10/23/2007
Application #:
11362694
Filing Dt:
02/27/2006
Publication #:
Pub Dt:
08/30/2007
Title:
BIT LINE PRECHARGE IN EMBEDDED MEMORY
46
Patent #:
Issue Dt:
10/27/2009
Application #:
11363463
Filing Dt:
02/27/2006
Publication #:
Pub Dt:
08/30/2007
Title:
RF TRANSMITTER WITH INTERLEAVED IQ MODULATION
47
Patent #:
NONE
Issue Dt:
Application #:
11363622
Filing Dt:
02/28/2006
Publication #:
Pub Dt:
08/30/2007
Title:
Electronic assembly with precise contact formation placement and method for forming the same
48
Patent #:
Issue Dt:
07/07/2009
Application #:
11363791
Filing Dt:
02/28/2006
Publication #:
Pub Dt:
08/30/2007
Title:
PIEZOELECTRIC MEMS SWITCHES AND METHODS OF MAKING
49
Patent #:
Issue Dt:
10/21/2008
Application #:
11363901
Filing Dt:
02/28/2006
Publication #:
Pub Dt:
11/23/2006
Title:
STRUCTURE AND METHOD FOR RESURF LDMOSFET WITH A CURRENT DIVERTER
50
Patent #:
Issue Dt:
11/27/2007
Application #:
11364047
Filing Dt:
02/28/2006
Publication #:
Pub Dt:
08/30/2007
Title:
MULTI-ROW LEAD FRAME
51
Patent #:
NONE
Issue Dt:
Application #:
11364048
Filing Dt:
02/28/2006
Publication #:
Pub Dt:
08/30/2007
Title:
Heat sink for semiconductor package
52
Patent #:
Issue Dt:
10/21/2008
Application #:
11364104
Filing Dt:
02/28/2006
Publication #:
Pub Dt:
08/30/2007
Title:
INTEGRATED CIRCUIT WITH FUNCTIONAL STATE CONFIGURABLE MEMORY AND METHOD OF CONFIGURING FUNCTIONAL STATES OF THE INTEGRATED CIRCUIT MEMORY
53
Patent #:
Issue Dt:
08/03/2010
Application #:
11364128
Filing Dt:
02/28/2006
Publication #:
Pub Dt:
08/30/2007
Title:
METHOD FOR FORMING A DEPOSITED OXIDE LAYER
54
Patent #:
Issue Dt:
12/29/2009
Application #:
11364129
Filing Dt:
02/28/2006
Publication #:
Pub Dt:
08/30/2007
Title:
NON-VOLATILE MEMORY HAVING A MULTIPLE BLOCK ERASE MODE AND METHOD THEREFOR
55
Patent #:
NONE
Issue Dt:
Application #:
11364634
Filing Dt:
02/28/2006
Publication #:
Pub Dt:
08/30/2007
Title:
System and method for implementing ACLs using multiple hash-trie-key tables
56
Patent #:
NONE
Issue Dt:
Application #:
11364769
Filing Dt:
02/28/2006
Publication #:
Pub Dt:
08/30/2007
Title:
Isolated zener diodes
57
Patent #:
Issue Dt:
10/09/2007
Application #:
11364792
Filing Dt:
02/28/2006
Publication #:
Pub Dt:
08/30/2007
Title:
METHOD OF TESTING FOR POWER AND GROUND CONTINUITY OF A SEMICONDUCTOR DEVICE
58
Patent #:
Issue Dt:
10/26/2010
Application #:
11364985
Filing Dt:
02/28/2006
Publication #:
Pub Dt:
08/30/2007
Title:
METHOD FOR SEPARATELY OPTIMIZING SPACER WIDTH FOR TWO TRANSISTOR GROUPS USING A RECESS SPACER ETCH (RSE) INTEGRATION
59
Patent #:
Issue Dt:
03/08/2011
Application #:
11365059
Filing Dt:
02/28/2006
Publication #:
Pub Dt:
08/30/2007
Title:
METHOD FOR SEPARATELY OPTIMIZING SPACER WIDTH FOR TWO OR MORE TRANSISTOR CLASSES USING A RECESS SPACER INTEGRATION
60
Patent #:
Issue Dt:
11/18/2008
Application #:
11365119
Filing Dt:
02/28/2006
Publication #:
Pub Dt:
08/30/2007
Title:
CAPACITOR ATTACHMENT METHOD
61
Patent #:
NONE
Issue Dt:
Application #:
11365120
Filing Dt:
02/28/2006
Publication #:
Pub Dt:
08/30/2007
Title:
Semiconductor packaging method
62
Patent #:
Issue Dt:
10/06/2009
Application #:
11365774
Filing Dt:
03/01/2006
Publication #:
Pub Dt:
09/06/2007
Title:
PRIORITIZATION OF CONNECTION IDENTIFIERS FOR AN UPLINK SCHEDULER IN A BROADBAND WIRELESS ACCESS COMMUNICATION SYSTEM
63
Patent #:
Issue Dt:
10/21/2008
Application #:
11366279
Filing Dt:
03/02/2006
Publication #:
Pub Dt:
09/06/2007
Title:
METAL GATE WITH ZIRCONIUM
64
Patent #:
Issue Dt:
01/27/2009
Application #:
11366286
Filing Dt:
03/02/2006
Publication #:
Pub Dt:
09/20/2007
Title:
APPARATUS AND METHOD FOR ADJUSTING AN OPERATING PARAMETER OF AN INTEGRATED CIRCUIT
65
Patent #:
Issue Dt:
08/19/2008
Application #:
11366928
Filing Dt:
03/01/2006
Publication #:
Pub Dt:
09/06/2007
Title:
METHODS AND APPARATUS FOR THERMAL ISOLATION IN VERTICALLY-INTEGRATED SEMICONDUCTOR DEVICES
66
Patent #:
Issue Dt:
04/07/2009
Application #:
11368720
Filing Dt:
03/06/2006
Publication #:
Pub Dt:
07/26/2007
Title:
COMPOSITE INTEGRATED DEVICE AND METHODS FOR FORMING THEREOF
67
Patent #:
Issue Dt:
07/09/2013
Application #:
11368729
Filing Dt:
03/06/2006
Publication #:
Pub Dt:
11/15/2007
Title:
ENHANCED TONE DETECTOR INCLUDING ADAPTIVE MULTI-BANDPASS FILTER FOR TONE DETECTION AND ENHANCEMENT
68
Patent #:
Issue Dt:
03/02/2010
Application #:
11369513
Filing Dt:
03/06/2006
Publication #:
Pub Dt:
09/06/2007
Title:
TREATMENT FOR REDUCTION OF LINE EDGE ROUGHNESS
69
Patent #:
Issue Dt:
05/10/2011
Application #:
11369648
Filing Dt:
03/07/2006
Publication #:
Pub Dt:
09/13/2007
Title:
ELECTRONIC DEVICE TESTING SYSTEM
70
Patent #:
Issue Dt:
12/29/2009
Application #:
11369737
Filing Dt:
03/07/2006
Publication #:
Pub Dt:
09/13/2007
Title:
ALLOCATING PROCESSING RESOURCES FOR MULTIPLE INSTANCES OF A SOFTWARE COMPONENT
71
Patent #:
Issue Dt:
05/19/2009
Application #:
11370283
Filing Dt:
03/08/2006
Publication #:
Pub Dt:
09/13/2007
Title:
CHARGE STORAGE STRUCTURE FORMATION IN TRANSISTOR WITH VERTICAL CHANNEL REGION
72
Patent #:
NONE
Issue Dt:
Application #:
11370320
Filing Dt:
03/08/2006
Publication #:
Pub Dt:
09/13/2007
Title:
Method for making a multibit transistor
73
Patent #:
Issue Dt:
09/02/2008
Application #:
11370381
Filing Dt:
03/06/2006
Publication #:
Pub Dt:
01/25/2007
Title:
CLOCK GENERATION CIRCUIT
74
Patent #:
Issue Dt:
02/24/2009
Application #:
11370387
Filing Dt:
03/06/2006
Publication #:
Pub Dt:
09/06/2007
Title:
METHOD FOR FORMING REINFORCED INTERCONNECTS ON A SUBSTRATE
75
Patent #:
Issue Dt:
05/11/2010
Application #:
11371142
Filing Dt:
03/08/2006
Publication #:
Pub Dt:
09/13/2007
Title:
DYNAMIC TIMING ADJUSTMENT IN A CIRCUIT DEVICE
76
Patent #:
NONE
Issue Dt:
Application #:
11371658
Filing Dt:
03/08/2006
Publication #:
Pub Dt:
09/13/2007
Title:
Method for planarizing vias formed in a substrate
77
Patent #:
Issue Dt:
10/30/2007
Application #:
11372495
Filing Dt:
03/10/2006
Publication #:
Pub Dt:
09/13/2007
Title:
SEMICONDUCTOR STORAGE DEVICE
78
Patent #:
Issue Dt:
09/09/2014
Application #:
11372666
Filing Dt:
03/10/2006
Publication #:
Pub Dt:
09/13/2007
Title:
WARP COMPENSATED PACKAGE AND METHOD
79
Patent #:
Issue Dt:
12/16/2008
Application #:
11373071
Filing Dt:
03/10/2006
Publication #:
Pub Dt:
09/13/2007
Title:
FROZEN MATERIAL DETECTION USING ELECTRIC FIELD SENSOR
80
Patent #:
Issue Dt:
08/25/2009
Application #:
11373087
Filing Dt:
03/10/2006
Publication #:
Pub Dt:
08/31/2006
Title:
SEMICONDUCTOR DEVICE WITH A PROTECTED ACTIVE DIE REGION AND METHOD THEREFOR
81
Patent #:
Issue Dt:
09/16/2008
Application #:
11373423
Filing Dt:
03/10/2006
Publication #:
Pub Dt:
09/13/2007
Title:
SEMICONDUCTOR DEVICE PACKAGING
82
Patent #:
Issue Dt:
07/22/2008
Application #:
11373532
Filing Dt:
03/10/2006
Publication #:
Pub Dt:
09/13/2007
Title:
SWITCH DEVICE AND METHOD
83
Patent #:
Issue Dt:
01/20/2009
Application #:
11373536
Filing Dt:
03/10/2006
Publication #:
Pub Dt:
09/13/2007
Title:
SEMICONDUCTOR DEVICE WITH STRESSORS AND METHOD THEREFOR
84
Patent #:
NONE
Issue Dt:
Application #:
11373541
Filing Dt:
03/10/2006
Publication #:
Pub Dt:
09/13/2007
Title:
Perforated embedded plane package and method
85
Patent #:
NONE
Issue Dt:
Application #:
11373584
Filing Dt:
03/10/2006
Publication #:
Pub Dt:
09/13/2007
Title:
System and method for operating a memory circuit
86
Patent #:
Issue Dt:
07/14/2009
Application #:
11374372
Filing Dt:
03/13/2006
Publication #:
Pub Dt:
09/13/2007
Title:
PROCESS FOR FORMING AN ELECTRONIC DEVICE INCLUDING SEMICONDUCTOR LAYERS HAVING DIFFERENT STRESSES
87
Patent #:
Issue Dt:
07/22/2008
Application #:
11374870
Filing Dt:
03/14/2006
Publication #:
Pub Dt:
09/20/2007
Title:
HIGH LINEARITY AND LOW NOISE AMPLIFIER WITH CONTINUOUSLY VARIABLE GAIN CONTROL
88
Patent #:
Issue Dt:
05/27/2008
Application #:
11375763
Filing Dt:
03/14/2006
Publication #:
Pub Dt:
09/20/2007
Title:
SELECTIVE SILICON DEPOSITION FOR PLANARIZED DUAL SURFACE ORIENTATION INTEGRATION
89
Patent #:
Issue Dt:
02/17/2009
Application #:
11375768
Filing Dt:
03/15/2006
Publication #:
Pub Dt:
09/20/2007
Title:
UNDOPED GATE POLY INTEGRATION FOR IMPROVED GATE PATTERNING AND COBALT SILICIDE EXTENDIBILITY
90
Patent #:
Issue Dt:
07/13/2010
Application #:
11375796
Filing Dt:
03/14/2006
Publication #:
Pub Dt:
09/20/2007
Title:
SILICON DEPOSITION OVER DUAL SURFACE ORIENTATION SUBSTRATES TO PROMOTE UNIFORM POLISHING
91
Patent #:
Issue Dt:
11/25/2008
Application #:
11375890
Filing Dt:
03/15/2006
Publication #:
Pub Dt:
09/20/2007
Title:
PROCESS FOR FORMING AN ELECTRONIC DEVICE INCLUDING SEMICONDUCTOR FINS
92
Patent #:
Issue Dt:
09/02/2008
Application #:
11375893
Filing Dt:
03/15/2006
Publication #:
Pub Dt:
09/20/2007
Title:
PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING A SEMICONDUCTOR ISLAND OVER AN INSULATING LAYER
93
Patent #:
Issue Dt:
08/19/2008
Application #:
11375894
Filing Dt:
03/15/2006
Publication #:
Pub Dt:
09/20/2007
Title:
PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING A SEMICONDUCTOR FIN
94
Patent #:
Issue Dt:
04/20/2010
Application #:
11376410
Filing Dt:
03/15/2006
Publication #:
Pub Dt:
09/20/2007
Title:
SILICIDED NONVOLATILE MEMORY AND METHOD OF MAKING SAME
95
Patent #:
Issue Dt:
03/11/2008
Application #:
11376411
Filing Dt:
03/15/2006
Publication #:
Pub Dt:
09/20/2007
Title:
METHOD FOR FORMING A NON-VOLATILE MEMORY AND A PERIPHERAL DEVICE ON A SEMICONDUCTOR SUBSTRATE
96
Patent #:
Issue Dt:
04/21/2009
Application #:
11376412
Filing Dt:
03/15/2006
Publication #:
Pub Dt:
09/20/2007
Title:
METHOD OF FORMING A SEMICONDUCTOR DEVICE AND STRUCTURE THEREOF
97
Patent #:
Issue Dt:
10/07/2008
Application #:
11376810
Filing Dt:
03/15/2006
Publication #:
Pub Dt:
09/20/2007
Title:
ELECTRICAL FIELD SENSORS FOR DETECTING FLUID PRESENCE OR LEVEL
98
Patent #:
NONE
Issue Dt:
Application #:
11377996
Filing Dt:
03/17/2006
Publication #:
Pub Dt:
10/19/2006
Title:
Bonding pad for a packaged integrated circuit
99
Patent #:
NONE
Issue Dt:
Application #:
11379598
Filing Dt:
04/21/2006
Publication #:
Pub Dt:
10/25/2007
Title:
MRAM ARRAY WITH REFERENCE CELL ROW AND METHOF OF OPERATION
100
Patent #:
Issue Dt:
04/15/2008
Application #:
11380479
Filing Dt:
04/27/2006
Publication #:
Pub Dt:
11/01/2007
Title:
ACCUMULATED CURRENT COUNTER AND METHOD THEREOF
Assignors
1
Exec Dt:
12/01/2006
2
Exec Dt:
12/01/2006
3
Exec Dt:
12/01/2006
4
Exec Dt:
12/01/2006
Assignee
1
390 GREENWICH STREET
NEW YORK, NEW YORK 10013
Correspondence name and address
CBCINNOVIS DBA FEDERAL RESEARCH
1023 FIFTEENTH STREET, NW, STE 401
ATTN: OLEH HERELIUK
WASHINGTON, DC 20005

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