Patent Assignment Details
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For pending or abandoned applications please consult USPTO staff.
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Reel/Frame: | 049770/0139 | |
| Pages: | 11 |
| | Recorded: | 07/16/2019 | | |
Attorney Dkt #: | TW2085_NO249-250 |
Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
2
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Patent #:
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Issue Dt:
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02/21/2017
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Application #:
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14271400
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Filing Dt:
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05/06/2014
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Publication #:
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Pub Dt:
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09/11/2014
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Title:
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MANUFACTURING METHOD OF VERTICAL CHANNEL TRANSISTOR ARRAY
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Patent #:
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Issue Dt:
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01/26/2016
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Application #:
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14280688
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Filing Dt:
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05/19/2014
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Publication #:
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Pub Dt:
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05/21/2015
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Title:
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MEMORY CIRCUIT STRUCTURE AND SEMICONDUCTOR PROCESS FOR MANUFACTURING THE SAME
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Assignee
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NO. 18, LI-HSIN RD. 1, HSINCHU SCIENCE PARK, |
HSINCHU, TAIWAN |
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Correspondence name and address
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JCIPRNET
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P.O. BOX 600 TAIPEI GUTING
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TAIPEI CITY, 10099 TAIWAN
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