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01/30/2007
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10651128
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08/28/2003
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06/03/2004
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07/19/2005
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10651544
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08/29/2003
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03/03/2005
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03/28/2006
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10652136
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08/29/2003
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03/03/2005
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03/22/2005
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10652406
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08/28/2003
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03/03/2005
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08/28/2007
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10652434
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08/29/2003
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03/03/2005
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06/14/2005
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10652530
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08/29/2003
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03/03/2005
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05/01/2007
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10654922
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09/05/2003
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03/11/2004
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02/15/2005
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10656051
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09/05/2003
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03/10/2005
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02/28/2006
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10657304
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09/08/2003
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04/29/2004
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01/01/2008
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10657331
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09/08/2003
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03/10/2005
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10/27/2009
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10657510
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09/05/2003
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03/10/2005
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09/12/2006
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10657593
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09/08/2003
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03/10/2005
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10/17/2006
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10657609
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09/08/2003
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04/22/2004
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09/25/2007
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10657797
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09/08/2003
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03/10/2005
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01/31/2006
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10659885
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09/11/2003
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03/17/2005
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06/20/2006
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10660446
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09/11/2003
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03/17/2005
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03/14/2006
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10660828
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09/12/2003
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03/17/2005
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03/14/2006
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10660845
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09/12/2003
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03/17/2005
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10/11/2005
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10660847
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09/12/2003
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03/17/2005
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08/23/2005
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10662541
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09/15/2003
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10/07/2004
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INTEGRATED CIRCUIT DIE HAVING A COPPER CONTACT AND METHOD THEREFOR
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06/21/2005
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10662832
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09/15/2003
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03/17/2005
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SEMICONDUCTOR DEVICE HAVING AN INSULATING LAYER AND METHOD FOR FORMING
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10/25/2005
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10663621
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09/16/2003
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03/17/2005
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SEMICONDUCTOR DEVICE WITH NANOCLUSTERS
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07/11/2006
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10668432
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09/23/2003
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03/24/2005
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METHOD FOR FABRICATING A MASK USING A HARDMASK AND METHOD FOR MAKING A SEMICONDUCTOR DEVICE USING THE SAME
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07/18/2006
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10668694
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09/23/2003
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03/24/2005
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SEMICONDUCTOR DEVICE AND MAKING THEREOF
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11/15/2005
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10668714
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09/23/2003
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03/24/2005
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METHOD FOR FORMING A SEMICONDUCTOR DEVICE HAVING ISOLATION REGIONS
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04/18/2006
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10670631
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09/25/2003
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03/31/2005
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METHOD OF FORMING A SEMICONDUCTOR PACKAGE AND STRUCTURE THEREOF
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02/01/2005
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10670634
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09/25/2003
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SEMICONDUCTOR PROCESS FOR DISPOSABLE SIDEWALL SPACERS AND STRUCTURE
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04/04/2006
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10670683
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09/25/2003
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04/01/2004
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MODULE, SYSTEM AND METHOD FOR TESTING A PHASE LOCKED LOOP
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04/18/2006
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10670928
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09/25/2003
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03/31/2005
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08/01/2006
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10672161
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09/26/2003
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03/31/2005
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12/19/2006
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10672487
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09/26/2003
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04/01/2004
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ANALYSIS MODULE, INTEGRATED CIRCUIT, SYSTEM AND METHOD FOR TESTING AN INTEGRATED CIRCUIT
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05/17/2005
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10672959
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09/26/2003
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03/31/2005
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07/12/2005
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10675005
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09/30/2003
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03/31/2005
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09/27/2005
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10677070
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10/01/2003
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04/01/2004
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07/19/2005
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10677573
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10/02/2003
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04/07/2005
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10/09/2007
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10/03/2003
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06/24/2004
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METHOD FOR MAKING A CLEAR CHANNEL ASSESSMENT IN A WIRELESS NETWORK
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12/14/2004
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10677844
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10/02/2003
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SEMICONDUCTOR STRUCTURE WITH DIFFERENT LATTICE CONSTANT MATERIALS AND METHOD FOR FORMING THE SAME
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08/08/2006
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10680489
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10/08/2003
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04/15/2004
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METHOD FOR CONTROLLING A DATA STREAM IN A WIRELESS NETWORK
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07/04/2006
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10680491
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10/08/2003
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04/08/2004
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11/06/2007
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10/08/2003
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04/08/2004
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11/24/2009
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10/09/2003
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04/14/2005
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CELLULAR MODEM PROCESSING
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10/17/2006
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10/10/2003
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04/14/2005
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05/16/2006
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10/10/2003
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04/14/2005
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11/29/2005
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10/10/2003
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04/14/2005
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11/06/2007
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10/14/2003
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04/14/2005
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12/05/2006
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10/16/2003
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04/21/2005
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10/25/2005
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10/14/2003
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04/29/2004
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01/17/2006
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10/16/2003
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04/21/2005
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05/02/2006
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10/20/2003
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04/21/2005
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AMPLIFIER CIRCUIT
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06/07/2005
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10/21/2003
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04/21/2005
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08/23/2005
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10/23/2003
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04/28/2005
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME
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08/23/2005
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10/27/2003
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04/28/2005
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05/10/2005
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10/27/2003
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07/01/2004
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10/04/2005
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10/28/2003
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05/12/2005
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05/09/2006
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10/29/2003
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05/05/2005
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12/05/2006
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11/04/2003
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05/05/2005
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08/09/2005
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11/05/2003
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05/19/2005
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DOMINO COMPARATOR CAPABLE FOR USE IN A MEMORY ARRAY
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01/30/2007
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11/07/2003
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05/12/2005
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07/01/2008
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11/12/2003
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Pub Dt:
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08/12/2004
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Title:
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ULTRA WIDEBAND COMMUNICATION SYSTEM, METHOD, AND DEVICE WITH LOW NOISE PULSE FORMATION
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Patent #:
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Issue Dt:
|
08/29/2006
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Application #:
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10705317
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Filing Dt:
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11/10/2003
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Publication #:
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Pub Dt:
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05/12/2005
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Title:
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TRANSISTOR HAVING THREE ELECTRICALLY ISOLATED ELECTRODES AND METHOD OF FORMATION
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Patent #:
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Issue Dt:
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12/14/2004
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Application #:
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10705504
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Filing Dt:
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11/10/2003
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Title:
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INTEGRATED CIRCUIT HAVING MULTIPLE MEMORY TYPES AND METHOD OF FORMATION
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Patent #:
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Issue Dt:
|
10/25/2005
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Application #:
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10716655
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Filing Dt:
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11/19/2003
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Publication #:
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Pub Dt:
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05/19/2005
| | | | |
Title:
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SEMICONDUCTOR DEVICE WITH MAGNETICALLY PERMEABLE HEAT SINK
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Patent #:
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Issue Dt:
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03/15/2005
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Application #:
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10716955
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Filing Dt:
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11/19/2003
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Title:
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METHOD FOR FORMING A MICROWAVE FIELD EFFECT TRANSISTOR WITH HIGH OPERATING VOLTAGE
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Patent #:
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Issue Dt:
|
09/06/2005
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Application #:
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10716956
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Filing Dt:
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11/19/2003
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Publication #:
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Pub Dt:
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05/19/2005
| | | | |
Title:
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MULTI-BIT NON-VOLATILE INTEGRATED CIRCUIT MEMORY AND METHOD THEREFOR
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Patent #:
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Issue Dt:
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08/28/2007
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Application #:
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10718892
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Filing Dt:
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11/21/2003
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Publication #:
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Pub Dt:
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05/26/2005
| | | | |
Title:
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SEMICONDUCTOR DEVICE WITH SILICIDED SOURCE/DRAINS
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Patent #:
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Issue Dt:
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07/03/2007
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Application #:
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10721196
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Filing Dt:
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11/25/2003
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Publication #:
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Pub Dt:
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05/26/2005
| | | | |
Title:
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NETWORK MESSAGE PROCESSING USING INVERSE PATTERN MATCHING
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Patent #:
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Issue Dt:
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11/03/2009
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Application #:
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10721201
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Filing Dt:
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11/25/2003
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Publication #:
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Pub Dt:
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05/26/2005
| | | | |
Title:
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NETWORK MESSAGE FILTERING USING HASHING AND PATTERN MATCHING
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Patent #:
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Issue Dt:
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03/18/2008
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Application #:
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10721950
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Filing Dt:
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11/25/2003
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Publication #:
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Pub Dt:
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05/26/2005
| | | | |
Title:
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COMMUNICATION RECEIVER
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Patent #:
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NONE
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Issue Dt:
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Application #:
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10722998
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Filing Dt:
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11/26/2003
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Publication #:
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Pub Dt:
|
06/03/2004
| | | | |
Title:
|
System and method for dynamically allocating shared memory within a multiple function device
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Patent #:
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Issue Dt:
|
03/03/2009
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Application #:
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10728398
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Filing Dt:
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12/05/2003
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Publication #:
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Pub Dt:
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06/23/2005
| | | | |
Title:
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APPARATUS AND METHOD FOR TIME ORDERING EVENTS IN A SYSTEM HAVING MULTIPLE TIME DOMAINS
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Patent #:
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Issue Dt:
|
11/29/2005
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Application #:
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10728621
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Filing Dt:
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12/05/2003
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Publication #:
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Pub Dt:
|
06/09/2005
| | | | |
Title:
|
METHOD AND CIRCUIT FOR MULTIPLYING SIGNALS WITH A TRANSISTOR HAVING MORE THAN ONE INDEPENDENT GATE STRUCTURE
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Patent #:
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Issue Dt:
|
05/02/2006
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Application #:
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10728622
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Filing Dt:
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12/05/2003
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Publication #:
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Pub Dt:
|
06/09/2005
| | | | |
Title:
|
DERIVATION OF CIRCUIT BLOCK CONSTRAINTS
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Patent #:
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Issue Dt:
|
02/14/2006
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Application #:
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10729531
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Filing Dt:
|
12/05/2003
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Publication #:
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Pub Dt:
|
06/09/2005
| | | | |
Title:
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INDUCTIVE DEVICE INCLUDING BOND WIRES
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Patent #:
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Issue Dt:
|
07/22/2008
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Application #:
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10730174
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Filing Dt:
|
12/08/2003
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Publication #:
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Pub Dt:
|
06/09/2005
| | | | |
Title:
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HARDWARE FOR PERFORMING AN ARITHMETIC FUNCTION
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Patent #:
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Issue Dt:
|
09/08/2009
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Application #:
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10730230
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Filing Dt:
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12/08/2003
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Publication #:
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Pub Dt:
|
06/09/2005
| | | | |
Title:
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METHOD OF FORMING A SEAL FOR A SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
|
09/18/2007
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Application #:
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10730387
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Filing Dt:
|
12/08/2003
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Publication #:
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Pub Dt:
|
06/09/2005
| | | | |
Title:
|
METHOD AND APPARATUS FOR CONTROLLING THE BANDWIDTH FREQUENCY OF AN ANALOG FILTER
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Patent #:
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|
Issue Dt:
|
10/06/2009
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Application #:
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10730449
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Filing Dt:
|
12/08/2003
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Publication #:
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Pub Dt:
|
06/09/2005
| | | | |
Title:
|
METHOD AND APPARATUS FOR DYNAMICALLY INSERTING GAIN IN AN ADAPTIVE FILTER SYSTEM
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|
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Patent #:
|
|
Issue Dt:
|
05/08/2007
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Application #:
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10731069
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Filing Dt:
|
12/09/2003
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Publication #:
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Pub Dt:
|
06/09/2005
| | | | |
Title:
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ADAPTIVE TRANSMIT POWER CONTROL SYSTEM
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Patent #:
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Issue Dt:
|
06/06/2006
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Application #:
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10731831
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Filing Dt:
|
12/09/2003
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Publication #:
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Pub Dt:
|
06/09/2005
| | | | |
Title:
|
LAND GRID ARRAY PACKAGED DEVICE AND METHOD OF FORMING SAME
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|
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Patent #:
|
|
Issue Dt:
|
11/11/2008
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Application #:
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10731850
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Filing Dt:
|
12/09/2003
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Publication #:
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Pub Dt:
|
06/09/2005
| | | | |
Title:
|
METHOD AND APPARATUS TO IMPLEMENT DC OFFSET CORRECTION IN A SIGMA DELTA CONVERTER
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Patent #:
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Issue Dt:
|
10/11/2005
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Application #:
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10734435
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Filing Dt:
|
12/12/2003
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Publication #:
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Pub Dt:
|
06/16/2005
| | | | |
Title:
|
METHOD AND APPARATUS FOR FORMING AN SOI BODY-CONTACTED TRANSISTOR
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Patent #:
|
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Issue Dt:
|
08/22/2006
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Application #:
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10736393
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Filing Dt:
|
12/15/2003
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Publication #:
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Pub Dt:
|
06/16/2005
| | | | |
Title:
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METHOD AND APPARATUS FOR ALLOCATING ENTRIES IN A BRANCH TARGET BUFFER
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Patent #:
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Issue Dt:
|
04/17/2007
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Application #:
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10736395
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Filing Dt:
|
12/15/2003
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Publication #:
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Pub Dt:
|
06/16/2005
| | | | |
Title:
|
METHOD FOR REDUCING CORROSION OF METAL SURFACES DURING SEMICONDUCTOR PROCESSING
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Patent #:
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|
Issue Dt:
|
06/07/2005
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Application #:
|
10736853
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Filing Dt:
|
12/16/2003
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Publication #:
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Pub Dt:
|
06/16/2005
| | | | |
Title:
|
METHOD OF MAKING A SEMICONDUCTOR DEVICE HAVING A LOW K DIELECTRIC
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Patent #:
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|
Issue Dt:
|
05/23/2006
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Application #:
|
10737058
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Filing Dt:
|
12/16/2003
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Publication #:
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Pub Dt:
|
06/16/2005
| | | | |
Title:
|
LOW-POWER COMPILER-PROGRAMMABLE MEMORY WITH FAST ACCESS TIMING
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Patent #:
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Issue Dt:
|
05/02/2006
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Application #:
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10737115
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Filing Dt:
|
12/16/2003
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Publication #:
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Pub Dt:
|
06/16/2005
| | | | |
Title:
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METHOD FOR ELIMINATION OF EXCESSIVE FIELD OXIDE RECESS FOR THIN SI SOI
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Patent #:
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Issue Dt:
|
01/25/2005
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Application #:
|
10737116
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Filing Dt:
|
12/16/2003
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Publication #:
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Pub Dt:
|
07/01/2004
| | | | |
Title:
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INTEGRATED CIRCUIT DEVICE AND METHOD THEREFOR
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|
Patent #:
|
|
Issue Dt:
|
05/17/2005
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Application #:
|
10738433
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Filing Dt:
|
12/17/2003
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Title:
|
GLITCH REMOVAL CIRCUIT
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Patent #:
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Issue Dt:
|
09/13/2005
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Application #:
|
10738815
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Filing Dt:
|
12/17/2003
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Publication #:
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Pub Dt:
|
06/23/2005
| | | | |
Title:
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SLOTTED PLANAR POWER CONDUCTOR
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Patent #:
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Issue Dt:
|
12/08/2009
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Application #:
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10739505
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Filing Dt:
|
12/18/2003
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Publication #:
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Pub Dt:
|
06/23/2005
| | | | |
Title:
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METHOD AND APPARATUS FOR DEMODULATING A RECEIVED SIGNAL WITHIN A CODED SYSTEM
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Patent #:
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Issue Dt:
|
11/07/2006
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Application #:
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10739605
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Filing Dt:
|
12/18/2003
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Publication #:
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Pub Dt:
|
06/23/2005
| | | | |
Title:
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STACKED SEMICONDUCTOR DEVICE ASSEMBLY AND METHOD FOR FORMING
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Patent #:
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Issue Dt:
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12/13/2005
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Application #:
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10740157
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Filing Dt:
|
12/18/2003
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Publication #:
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Pub Dt:
|
06/23/2005
| | | | |
Title:
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METHOD AND APPARATUS FOR REDUCING INTERRUPT LATENCY BY DYNAMIC BUFFER SIZING
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Patent #:
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Issue Dt:
|
02/06/2007
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Application #:
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10740303
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Filing Dt:
|
12/18/2003
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Publication #:
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Pub Dt:
|
06/23/2005
| | | | |
Title:
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WARPAGE CONTROL OF ARRAY PACKAGING
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Patent #:
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Issue Dt:
|
03/21/2006
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Application #:
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10741055
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Filing Dt:
|
12/19/2003
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Publication #:
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Pub Dt:
|
07/15/2004
| | | | |
Title:
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CIRCUIT AND METHOD FOR SUPPLYING AN ELECTRICAL A.C. LOAD
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Patent #:
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Issue Dt:
|
04/03/2007
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Application #:
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10741065
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Filing Dt:
|
12/19/2003
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Publication #:
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Pub Dt:
|
07/08/2004
| | | | |
Title:
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MULTI-STRAND SUBSTRATE FOR BALL-GRID ARRAY ASSEMBLIES AND METHOD
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Patent #:
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Issue Dt:
|
07/22/2008
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Application #:
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10744619
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Filing Dt:
|
12/23/2003
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Publication #:
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Pub Dt:
|
06/23/2005
| | | | |
Title:
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BTSC ENCODER AND INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
|
02/21/2006
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Application #:
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10747748
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Filing Dt:
|
12/29/2003
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Publication #:
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Pub Dt:
|
07/07/2005
| | | | |
Title:
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LEVEL SHIFTER
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Patent #:
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Issue Dt:
|
03/08/2005
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Application #:
|
10748543
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Filing Dt:
|
12/30/2003
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Title:
|
SIGNALING DEPENDENT ADAPTIVE ANALOG-TO-DIGITAL CONVERTER (ADC) SYSTEM AND METHOD OF USING SAME
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Patent #:
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|
Issue Dt:
|
05/18/2010
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Application #:
|
10748735
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Filing Dt:
|
12/30/2003
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Publication #:
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Pub Dt:
|
07/07/2005
| | | | |
Title:
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SIGNAL GENERATION POWER MANAGEMENT CONTROL SYSTEM FOR PORTABLE COMMUNICATIONS DEVICE AND METHOD OF USING SAME
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Patent #:
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Issue Dt:
|
08/30/2005
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Application #:
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10748878
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Filing Dt:
|
12/30/2003
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Publication #:
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Pub Dt:
|
06/30/2005
| | | | |
Title:
|
OFFSET, DELAY AND PARASITICALLY IMMUNE RESISTER-CAPACITOR (RC) TRACKING LOOP AND METHOD OF USING SAME
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|