Patent Assignment Details
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| Reel/Frame: | 045821/0149 | |
| Pages: | 3 |
| | Recorded: | 05/16/2018 | | |
| Attorney Dkt #: | 251974-1270 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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07/28/2020
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Application #:
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15981270
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Filing Dt:
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05/16/2018
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Publication #:
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Pub Dt:
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09/20/2018
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Title:
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PROCESSOR WITH SELECTIVE DATA STORAGE (OF ACCELERATOR) OPERABLE AS EITHER VICTIM CACHE DATA STORAGE OR ACCELERATOR MEMORY AND HAVING VICTIM CACHE TAGS IN LOWER LEVEL CACHE WHEREIN EVICTED CACHE LINE IS STORED IN SAID DATA STORAGE WHEN SAID DATA STORAGE IS IN A FIRST MODE AND SAID CACHE LINE IS STORED IN SYSTEM MEMORY RATHER THEN SAID DATA STORE WHEN SAID DATA STORAGE IS IN A SECOND MODE
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Assignee
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| ROOM 301, NO.2537, JINKE ROAD, ZHANGJIANG HI-TECH PARK |
| SHANGHAI, CHINA 201203 |
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Correspondence name and address
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MCCLURE, QUALEY & RODACK, LLP
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3100 INTERSTATE NORTH CIRCLE
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SUITE 150
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ATLANTA, GA 30339
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