|
|
Patent #:
|
|
Issue Dt:
|
11/14/2006
|
Application #:
|
10939775
|
Filing Dt:
|
09/13/2004
|
Title:
|
METHOD OF MAKING A SEMICONDUCTOR STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/12/2006
|
Application #:
|
10939897
|
Filing Dt:
|
09/13/2004
|
Title:
|
METHOD OF FORMING COPPER SULFIDE LAYER OVER SUBSTRATE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/18/2006
|
Application #:
|
10945914
|
Filing Dt:
|
09/22/2004
|
Title:
|
METHODS AND SYSTEMS FOR REDUCING ERASE TIMES IN FLASH MEMORY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/02/2006
|
Application #:
|
10946809
|
Filing Dt:
|
09/22/2004
|
Publication #:
|
|
Pub Dt:
|
03/23/2006
| | | | |
Title:
|
READ APPROACH FOR MULTI-LEVEL VIRTUAL GROUND MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
08/19/2008
|
Application #:
|
10946812
|
Filing Dt:
|
09/22/2004
|
Title:
|
PAGE_ EXE ERASE ALGORITHM FOR FLASH MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
04/12/2005
|
Application #:
|
10951370
|
Filing Dt:
|
09/28/2004
|
Publication #:
|
|
Pub Dt:
|
03/03/2005
| | | | |
Title:
|
PHOTOSENSITIVE POLYMERIC MEMORY ELEMENTS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/27/2006
|
Application #:
|
10951410
|
Filing Dt:
|
09/28/2004
|
Title:
|
SYSTEM THAT FACILITATES READING MULTI-LEVEL DATA IN NON-VOLATILE MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
10/03/2006
|
Application #:
|
10957247
|
Filing Dt:
|
10/01/2004
|
Title:
|
SO2 TREATMENT OF OXIDIZED CUO FOR COPPER SULFIDE FORMATION OF MEMORY ELEMENT GROWTH
|
|
|
Patent #:
|
|
Issue Dt:
|
11/13/2007
|
Application #:
|
10958044
|
Filing Dt:
|
10/04/2004
|
Title:
|
MEMORY DEVICE WITH A SELF-ASSEMBLED POLYMER FILM AND METHOD OF MAKING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
04/17/2007
|
Application #:
|
10968414
|
Filing Dt:
|
10/19/2004
|
Title:
|
NON-VOLATILE MEMORY SYSTEM HAVING A PROGRAMMABLY SELECTABLE BOOT CODE SECTION SIZE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/27/2006
|
Application #:
|
10968705
|
Filing Dt:
|
10/19/2004
|
Title:
|
ION PATH POLYMERS FOR ION-MOTION MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
03/28/2006
|
Application #:
|
10968713
|
Filing Dt:
|
10/19/2004
|
Title:
|
PATTERNING FOR ELONGATED VSS CONTACT FLASH MEMORY
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10975629
|
Filing Dt:
|
10/28/2004
|
Publication #:
|
|
Pub Dt:
|
05/04/2006
| | | | |
Title:
|
System and method for improved memory performance in a mobile device
|
|
|
Patent #:
|
|
Issue Dt:
|
10/06/2009
|
Application #:
|
10976760
|
Filing Dt:
|
11/01/2004
|
Title:
|
FLASH MEMORY DEVICE HAVING INCREASED OVER-ERASE CORRECTION EFFICIENCY AND ROBUSTNESS AGAINST DEVICE VARIATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/22/2008
|
Application #:
|
10976816
|
Filing Dt:
|
11/01/2004
|
Publication #:
|
|
Pub Dt:
|
05/04/2006
| | | | |
Title:
|
SYSTEM AND METHOD FOR PROTECTING SEMICONDUCTOR DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
06/26/2007
|
Application #:
|
10976876
|
Filing Dt:
|
11/01/2004
|
Title:
|
SEMICONDUCTOR DEVICE WITH ELECTRICALLY BIASED DIE EDGE SEAL
|
|
|
Patent #:
|
|
Issue Dt:
|
05/22/2007
|
Application #:
|
10978621
|
Filing Dt:
|
11/01/2004
|
Title:
|
POLYMER MEMORY CELL OPERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
05/20/2008
|
Application #:
|
10978845
|
Filing Dt:
|
11/01/2004
|
Title:
|
METHOD OF MAKING AN ORGANIC MEMORY CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
11/28/2006
|
Application #:
|
10979516
|
Filing Dt:
|
11/02/2004
|
Title:
|
METHOD OF MAKING A MEMORY CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
01/15/2008
|
Application #:
|
10981026
|
Filing Dt:
|
11/04/2004
|
Title:
|
METHOD FOR ISOLATING A FAILURE SITE IN A WORDLINE IN A MEMORY ARRAY
|
|
|
Patent #:
|
|
Issue Dt:
|
12/19/2006
|
Application #:
|
10981174
|
Filing Dt:
|
11/04/2004
|
Title:
|
MEMORY CELL WITH PLASMA-GROWN OXIDE SPACER FOR REDUCED DIBL AND VSS RESISTANCE AND INCREASED RELIABILITY
|
|
|
Patent #:
|
|
Issue Dt:
|
03/28/2006
|
Application #:
|
10981833
|
Filing Dt:
|
11/04/2004
|
Title:
|
RAMPED SOFT PROGRAMMING FOR CONTROL OF ERASE VOLTAGE DISTRIBUTIONS IN FLASH MEMORY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/02/2006
|
Application #:
|
10982296
|
Filing Dt:
|
11/05/2004
|
Title:
|
MULTI BIT PROGRAM ALGORITHM
|
|
|
Patent #:
|
|
Issue Dt:
|
10/28/2008
|
Application #:
|
10983919
|
Filing Dt:
|
11/08/2004
|
Publication #:
|
|
Pub Dt:
|
03/30/2006
| | | | |
Title:
|
CONTROL OF MEMORY DEVICES POSSESSING VARIABLE RESISTANCE CHARACTERISTICS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/03/2007
|
Application #:
|
10985172
|
Filing Dt:
|
11/10/2004
|
Title:
|
SYSTEMS AND METHODS FOR A MEMORY AND/OR SELECTION ELEMENT FORMED WITHIN A RECESS IN A METAL LINE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/01/2006
|
Application #:
|
10986652
|
Filing Dt:
|
11/12/2004
|
Publication #:
|
|
Pub Dt:
|
04/28/2005
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
05/22/2007
|
Application #:
|
10987262
|
Filing Dt:
|
11/12/2004
|
Publication #:
|
|
Pub Dt:
|
05/18/2006
| | | | |
Title:
|
PROTECTION OF ACTIVE LAYERS OF MEMORY CELLS DURING PROCESSING OF OTHER ELEMENTS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/19/2007
|
Application #:
|
10988239
|
Filing Dt:
|
11/12/2004
|
Title:
|
UTILIZATION OF A TA-CONTAINING CAP OVER COPPER TO FACILITATE CONCURRENT FORMATION OF COPPER VIAS AND MEMORY ELEMENT STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/25/2006
|
Application #:
|
10990706
|
Filing Dt:
|
11/17/2004
|
Publication #:
|
|
Pub Dt:
|
05/18/2006
| | | | |
Title:
|
DIODE ARRAY ARCHITECTURE FOR ADDRESSING NANOSCALE RESISTIVE MEMORY ARRAYS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/21/2006
|
Application #:
|
10997345
|
Filing Dt:
|
11/24/2004
|
Title:
|
FULLY ISOLATED DIELECTRIC MEMORY CELL STRUCTURE FOR A DUAL BIT NITRIDE STORAGE DEVICE AND PROCESS FOR MAKING SAME
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11000685
|
Filing Dt:
|
12/01/2004
|
Publication #:
|
|
Pub Dt:
|
06/01/2006
| | | | |
Title:
|
Polymer-based transistor devices, methods, and systems
|
|
|
Patent #:
|
|
Issue Dt:
|
11/28/2006
|
Application #:
|
11000740
|
Filing Dt:
|
12/01/2004
|
Title:
|
SELECTIVE POLYMER GROWTH FOR MEMORY CELL FABRICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
10/30/2007
|
Application #:
|
11000870
|
Filing Dt:
|
12/01/2004
|
Title:
|
METAL/OXIDE ETCH AFTER POLISH TO PREVENT BRIDGING BETWEEN ADJACENT FEATURES OF A SEMICONDUCTOR STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/24/2008
|
Application #:
|
11001519
|
Filing Dt:
|
12/01/2004
|
Title:
|
MEMORY DEVICE WITH A SELECTION ELEMENT AND A CONTROL LINE IN A SUBSTANTIALLY SIMILAR LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
09/18/2007
|
Application #:
|
11001940
|
Filing Dt:
|
12/01/2004
|
Title:
|
METHOD, SYSTEM, AND CIRCUIT FOR PERFORMING A MEMORY RELATED OPERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
10/17/2006
|
Application #:
|
11003208
|
Filing Dt:
|
12/02/2004
|
Title:
|
METHOD FOR ACHIEVING INCREASED CONTROL OVER INTERCONNECT LINE THICKNESS ACROSS A WAFER AND BETWEEN WAFERS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/15/2008
|
Application #:
|
11003528
|
Filing Dt:
|
12/03/2004
|
Title:
|
HIGH-VOLTAGE TRANSISTOR HAVING A U-SHAPED GATE AND METHOD FOR FORMING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
05/30/2006
|
Application #:
|
11003574
|
Filing Dt:
|
12/03/2004
|
Title:
|
METHOD FOR FORMING WORDLINES HAVING IRREGULAR SPACING IN A MEMORY ARRAY
|
|
|
Patent #:
|
|
Issue Dt:
|
04/29/2008
|
Application #:
|
11008233
|
Filing Dt:
|
12/10/2004
|
Title:
|
MEMORY CELL HAVING ENHANCED HIGH-K DIELECTRIC
|
|
|
Patent #:
|
|
Issue Dt:
|
07/04/2006
|
Application #:
|
11008263
|
Filing Dt:
|
12/10/2004
|
Title:
|
ONE STACK WITH STEAM OXIDE FOR CHARGE RETENTION
|
|
|
Patent #:
|
|
Issue Dt:
|
09/05/2006
|
Application #:
|
11021681
|
Filing Dt:
|
12/23/2004
|
Title:
|
MEMORY ELEMENTS USING ORGANIC ACTIVE LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
11/11/2008
|
Application #:
|
11021944
|
Filing Dt:
|
12/23/2004
|
Title:
|
UTILIZATION OF MEMORY-DIODE WHICH MAY HAVE EACH OF A PLURALITY OF DIFFERENT MEMORY STATES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/27/2008
|
Application #:
|
11021958
|
Filing Dt:
|
12/23/2004
|
Publication #:
|
|
Pub Dt:
|
06/29/2006
| | | | |
Title:
|
METHOD OF PROGRAMMING, READING AND ERASING MEMORY-DIODE IN A MEMORY-DIODE ARRAY
|
|
|
Patent #:
|
|
Issue Dt:
|
04/24/2007
|
Application #:
|
11021959
|
Filing Dt:
|
12/23/2004
|
Title:
|
MEMORY ELEMENT WITH NITROGEN-CONTAINING ACTIVE LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
07/08/2008
|
Application #:
|
11023914
|
Filing Dt:
|
12/28/2004
|
Title:
|
CURRENT SENSING ARCHITECTURE FOR HIGH BITLINE VOLTAGE, RAIL TO RAIL OUTPUT SWING AND VCC NOISE CANCELLATION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/25/2007
|
Application #:
|
11024257
|
Filing Dt:
|
12/28/2004
|
Publication #:
|
|
Pub Dt:
|
06/29/2006
| | | | |
Title:
|
SENSE AMPLIFIERS WITH HIGH VOLTAGE SWING
|
|
|
Patent #:
|
|
Issue Dt:
|
02/27/2007
|
Application #:
|
11026105
|
Filing Dt:
|
12/30/2004
|
Title:
|
REVERSIBLE FIELD-PROGRAMMABLE ELECTRIC INTERCONNECTS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/15/2005
|
Application #:
|
11029454
|
Filing Dt:
|
01/06/2005
|
Publication #:
|
|
Pub Dt:
|
06/02/2005
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE AND SEMICONDUCTOR MEMORY DEVICE CONTROL METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
02/28/2012
|
Application #:
|
11033588
|
Filing Dt:
|
01/12/2005
|
Publication #:
|
|
Pub Dt:
|
07/13/2006
| | | | |
Title:
|
MEMORY DEVICE HAVING TRAPEZOIDAL BITLINES AND METHOD OF FABRICATING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
08/01/2006
|
Application #:
|
11033653
|
Filing Dt:
|
01/12/2005
|
Title:
|
USE OF TA-CAPPED METAL LINE TO IMPROVE FORMATION OF MEMORY ELEMENT FILMS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/12/2006
|
Application #:
|
11033941
|
Filing Dt:
|
01/12/2005
|
Title:
|
MEMORY CELL CONTAINING COPOLYMER CONTAINING DIARYLACETYLENE PORTION
|
|
|
Patent #:
|
|
Issue Dt:
|
09/25/2007
|
Application #:
|
11034071
|
Filing Dt:
|
01/12/2005
|
Title:
|
VARIABLE DENSITY AND VARIABLE PERSISTENT ORGANIC MEMORY DEVICES, METHODS, AND FABRICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
06/19/2007
|
Application #:
|
11034154
|
Filing Dt:
|
01/12/2005
|
Title:
|
METHODS INVOLVING SPIN-ON POLYMERS THAT REVERSIBLY BIND CHARGE CARRIERS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/31/2006
|
Application #:
|
11034642
|
Filing Dt:
|
01/13/2005
|
Publication #:
|
|
Pub Dt:
|
07/13/2006
| | | | |
Title:
|
MULTI-LEVEL ONO FLASH PROGRAM ALGORITHM FOR THRESHOLD WIDTH CONTROL
|
|
|
Patent #:
|
|
Issue Dt:
|
11/13/2007
|
Application #:
|
11035188
|
Filing Dt:
|
01/13/2005
|
Title:
|
METHOD FOR CONTROLLING POLY 1 THICKNESS AND UNIFORMITY IN A MEMORY ARRAY FABRICATION PROCESS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/16/2007
|
Application #:
|
11041608
|
Filing Dt:
|
01/24/2005
|
Publication #:
|
|
Pub Dt:
|
07/27/2006
| | | | |
Title:
|
AUTOMATED TESTS FOR BUILT-IN SELF TEST
|
|
|
Patent #:
|
|
Issue Dt:
|
11/28/2006
|
Application #:
|
11045694
|
Filing Dt:
|
01/27/2005
|
Title:
|
BURIED WORD LINE MEMORY INTEGRATED CIRCUIT SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
05/27/2008
|
Application #:
|
11052688
|
Filing Dt:
|
02/07/2005
|
Publication #:
|
|
Pub Dt:
|
08/10/2006
| | | | |
Title:
|
MEMORY ELEMENT USING ACTIVE LAYER OF BLENDED MATERIALS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/25/2006
|
Application #:
|
11057143
|
Filing Dt:
|
02/15/2005
|
Publication #:
|
|
Pub Dt:
|
06/23/2005
| | | | |
Title:
|
VOLTAGE DETECTION CIRCUIT, SEMICONDUCTOR DEVICE, METHOD FOR CONTROLLING VOLTAGE DETECTION CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
05/16/2006
|
Application #:
|
11061119
|
Filing Dt:
|
02/18/2005
|
Publication #:
|
|
Pub Dt:
|
08/25/2005
| | | | |
Title:
|
CURRENT-VOLTAGE CONVERTER CIRCUIT AND ITS CONTROL METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
06/27/2006
|
Application #:
|
11061307
|
Filing Dt:
|
02/18/2005
|
Publication #:
|
|
Pub Dt:
|
08/25/2005
| | | | |
Title:
|
SEMICONDUCTOR MEMORY STORAGE DEVICE AND A REDUNDANCY CONTROL METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
06/13/2006
|
Application #:
|
11061365
|
Filing Dt:
|
02/18/2005
|
Publication #:
|
|
Pub Dt:
|
08/25/2005
| | | | |
Title:
|
SEMICONDUCTOR MEMORY STORAGE DEVICE AND ITS REDUNDANT METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
01/22/2008
|
Application #:
|
11062629
|
Filing Dt:
|
02/23/2005
|
Title:
|
SYSTEM AND METHOD FOR GATE FORMATION IN A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/23/2007
|
Application #:
|
11062641
|
Filing Dt:
|
02/23/2005
|
Title:
|
SYSTEM AND METHOD FOR ERASING A MEMORY CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
05/01/2007
|
Application #:
|
11062662
|
Filing Dt:
|
02/23/2005
|
Publication #:
|
|
Pub Dt:
|
06/30/2005
| | | | |
Title:
|
NON-VOLATILE MEMORY AND WRITE METHOD OF THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
12/11/2007
|
Application #:
|
11063138
|
Filing Dt:
|
02/22/2005
|
Title:
|
MEMORY CELL AND METHOD OF MAKING THE MEMORY CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
07/03/2007
|
Application #:
|
11063560
|
Filing Dt:
|
02/24/2005
|
Title:
|
NON-VOLATILE MEMORY DEVICE WITH INCREASED RELIABILITY
|
|
|
Patent #:
|
|
Issue Dt:
|
12/26/2006
|
Application #:
|
11064054
|
Filing Dt:
|
02/22/2005
|
Publication #:
|
|
Pub Dt:
|
03/16/2006
| | | | |
Title:
|
SEMICONDUCTOR MEMORY STORAGE DEVICE AND ITS CONTROL METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
08/07/2007
|
Application #:
|
11065305
|
Filing Dt:
|
02/25/2005
|
Publication #:
|
|
Pub Dt:
|
10/13/2005
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11065306
|
Filing Dt:
|
02/25/2005
|
Publication #:
|
|
Pub Dt:
|
09/29/2005
| | | | |
Title:
|
Semiconductor storage device and manufacturing method thereof
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11065307
|
Filing Dt:
|
02/25/2005
|
Publication #:
|
|
Pub Dt:
|
09/29/2005
| | | | |
Title:
|
Semiconductor device and method of manufacturing the same
|
|
|
Patent #:
|
|
Issue Dt:
|
12/18/2007
|
Application #:
|
11065388
|
Filing Dt:
|
02/24/2005
|
Title:
|
MEMORY DEVICE HAVING A NANOCRYSTAL CHARGE STORAGE REGION AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
09/12/2006
|
Application #:
|
11066484
|
Filing Dt:
|
02/28/2005
|
Publication #:
|
|
Pub Dt:
|
06/30/2005
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE AND METHOD OF READING DATA FROM SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/10/2007
|
Application #:
|
11066567
|
Filing Dt:
|
02/28/2005
|
Publication #:
|
|
Pub Dt:
|
10/20/2005
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/18/2008
|
Application #:
|
11069181
|
Filing Dt:
|
03/01/2005
|
Title:
|
METHOD FOR PATTERNING ELECTRICALLY CONDUCTING POLY(PHENYL ACETYLENE) AND POLY(DIPHENYL ACETYLENE)
|
|
|
Patent #:
|
|
Issue Dt:
|
10/24/2006
|
Application #:
|
11076252
|
Filing Dt:
|
03/08/2005
|
Publication #:
|
|
Pub Dt:
|
09/14/2006
| | | | |
Title:
|
DECODER FOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/25/2012
|
Application #:
|
11078873
|
Filing Dt:
|
03/11/2005
|
Publication #:
|
|
Pub Dt:
|
09/14/2006
| | | | |
Title:
|
MEMORY DEVICE WITH IMPROVED SWITCHING SPEED AND DATA RETENTION
|
|
|
Patent #:
|
|
Issue Dt:
|
02/03/2009
|
Application #:
|
11083016
|
Filing Dt:
|
03/18/2005
|
Publication #:
|
|
Pub Dt:
|
07/28/2005
| | | | |
Title:
|
FLASH MEMORY AND METHOD FOR CONTROLLING THE MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
02/20/2007
|
Application #:
|
11085496
|
Filing Dt:
|
03/22/2005
|
Publication #:
|
|
Pub Dt:
|
07/28/2005
| | | | |
Title:
|
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE WITH A PLURALITY OF SECTORS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/17/2009
|
Application #:
|
11086310
|
Filing Dt:
|
03/23/2005
|
Publication #:
|
|
Pub Dt:
|
09/28/2006
| | | | |
Title:
|
HIGH K STACK FOR NON-VOLATILE MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
12/05/2006
|
Application #:
|
11086884
|
Filing Dt:
|
03/22/2005
|
Publication #:
|
|
Pub Dt:
|
09/28/2006
| | | | |
Title:
|
TEMPERATURE COMPENSATION OF THIN FILM DIODE VOLTAGE THRESHOLD IN MEMORY SENSING CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
08/25/2009
|
Application #:
|
11087000
|
Filing Dt:
|
03/22/2005
|
Publication #:
|
|
Pub Dt:
|
09/28/2006
| | | | |
Title:
|
VARIABLE BREAKDOWN CHARACTERISTIC DIODE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/09/2007
|
Application #:
|
11087735
|
Filing Dt:
|
03/24/2005
|
Publication #:
|
|
Pub Dt:
|
02/09/2006
| | | | |
Title:
|
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE THAT ERASES STORED DATA AFTER A PREDETERMINED TIME PERIOD WITHOUT THE USE OF A TIMER CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
03/27/2007
|
Application #:
|
11087793
|
Filing Dt:
|
03/23/2005
|
Title:
|
ALUMINUM OXIDE AS LINER OR COVER LAYER TO SPACERS IN MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/29/2006
|
Application #:
|
11087944
|
Filing Dt:
|
03/23/2005
|
Title:
|
CURRENT SENSING CIRCUIT WITH A CURRENT-COMPENSATED DRAIN VOLTAGE REGULATION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/11/2007
|
Application #:
|
11089707
|
Filing Dt:
|
03/25/2005
|
Title:
|
MEMORY DEVICE WITH IMPROVED DATA RETENTION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/09/2010
|
Application #:
|
11089708
|
Filing Dt:
|
03/25/2005
|
Publication #:
|
|
Pub Dt:
|
09/28/2006
| | | | |
Title:
|
MEMORY DEVICE WITH IMPROVED DATA RETENTION
|
|
|
Patent #:
|
|
Issue Dt:
|
01/02/2007
|
Application #:
|
11090716
|
Filing Dt:
|
03/25/2005
|
Publication #:
|
|
Pub Dt:
|
09/29/2005
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD FOR WRITING DATA INTO THE SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/26/2006
|
Application #:
|
11091982
|
Filing Dt:
|
03/29/2005
|
Title:
|
QUAD BIT USING HOT-HOLE ERASE FOR CBD CONTROL
|
|
|
Patent #:
|
|
Issue Dt:
|
01/17/2012
|
Application #:
|
11095849
|
Filing Dt:
|
03/31/2005
|
Publication #:
|
|
Pub Dt:
|
10/05/2006
| | | | |
Title:
|
METHOD OF PROVIDING AN ERASE ACTIVATION ENERGY OF A MEMEORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/11/2007
|
Application #:
|
11099339
|
Filing Dt:
|
04/04/2005
|
Publication #:
|
|
Pub Dt:
|
10/05/2006
| | | | |
Title:
|
NON-CRITICAL COMPLEMENTARY MASKING METHOD FOR POLY-1 DEFINITION IN FLASH MEMORY DEVICE FABRICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
03/18/2008
|
Application #:
|
11099847
|
Filing Dt:
|
04/06/2005
|
Title:
|
SPIN ON MEMORY CELL ACTIVE LAYER DOPED WITH METAL IONS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/11/2008
|
Application #:
|
11100563
|
Filing Dt:
|
04/07/2005
|
Title:
|
DISPOSABLE HARD MASK FOR FORMING BIT LINES
|
|
|
Patent #:
|
|
Issue Dt:
|
12/25/2007
|
Application #:
|
11101783
|
Filing Dt:
|
04/07/2005
|
Publication #:
|
|
Pub Dt:
|
10/12/2006
| | | | |
Title:
|
SPLIT GATE MULTI-BIT MEMORY CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
01/29/2008
|
Application #:
|
11102004
|
Filing Dt:
|
04/08/2005
|
Title:
|
ETCH-BACK PROCESS FOR CAPPING A POLYMER MEMORY DEVICE
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11103960
|
Filing Dt:
|
04/12/2005
|
Publication #:
|
|
Pub Dt:
|
10/27/2005
| | | | |
Title:
|
Sector protection circuit for non-volatile semiconductor memory, sector protection method and non-volatile semiconductor memory
|
|
|
Patent #:
|
|
Issue Dt:
|
05/15/2007
|
Application #:
|
11109964
|
Filing Dt:
|
04/19/2005
|
Title:
|
METHOD FOR MANUFACTURING A SEMICONDUCTOR COMPONENT THAT INHIBITS FORMATION OF WORMHOLES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2008
|
Application #:
|
11110220
|
Filing Dt:
|
04/20/2005
|
Publication #:
|
|
Pub Dt:
|
10/26/2006
| | | | |
Title:
|
NON-VOLATILE SEMICONDUCTOR DEVICE AND METHOD FOR AUTOMATICALLY RECOVERING ERASE FAILURE IN THE DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2008
|
Application #:
|
11112607
|
Filing Dt:
|
04/22/2005
|
Title:
|
METHOD FOR FORMING MEMORY ARRAY BITLINES COMPRISING EPITAXIALLY GROWN SILICON AND RELATED STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/19/2008
|
Application #:
|
11112884
|
Filing Dt:
|
04/22/2005
|
Title:
|
MEMORY CELL HAVING COMBINATION RAISED SOURCE AND DRAIN AND METHOD OF FABRICATING SAME
|
|