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08/03/2004
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10254381
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Filing Dt:
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09/25/2002
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Title:
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IMPLEMENTING REFERENCE CURRENT MEASUREMENT MODE WITHIN REFERENCE ARRAY PROGRAMMING MODE OR REFERENCE ARRAY ERASE MODE IN A SEMICONDUCTOR
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11/09/2004
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10260061
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09/27/2002
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Title:
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03/15/2005
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10262221
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09/30/2002
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Title:
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ORGANIC SPIN-ON ANTI-REFLECTIVE COATING OVER INORGANIC ANTI-REFLECTIVE COATING
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02/22/2005
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10264387
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10/04/2002
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GROUND STRUCTURE FOR PAGE READ AND PAGE WRITE FOR FLASH MEMORY
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12/21/2004
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10265001
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10/04/2002
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Title:
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METHOD FOR REDUCING DRAIN INDUCED BARRIER LOWERING IN A MEMORY DEVICE
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10/07/2003
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10274063
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10/17/2002
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BI-LAYER FLOATING GATE FOR IMPROVED WORK FUNCTION BETWEEN FLOATING GATE AND A HIGH-K DIELECTRIC LAYER
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10/21/2008
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10277395
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10/22/2002
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09/18/2003
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Title:
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SHALLOW TRENCH ISOLATION APPROACH FOR IMPROVED STI CORNER ROUNDING
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08/24/2004
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10282459
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10/29/2002
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Title:
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BUFFER DRIVER CIRCUIT FOR PRODUCING A FAST, STABLE, AND ACCURATE REFERENCE VOLTAGE
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06/22/2004
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10282847
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10/29/2002
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METHOD OF PROGRAMMING IN-SERIES MEMORY CELLS
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09/21/2004
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10283590
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10/30/2002
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Title:
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METHOD FOR READING A NON-VOLATILE MEMORY CELL
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02/07/2006
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10283685
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10/29/2002
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SEMICONDUCTOR MANUFACTURING RESOLUTION ENHANCEMENT SYSTEM AND METHOD FOR SIMULTANEOUSLY PATTERNING DIFFERENT FEATURE TYPES
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12/28/2004
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10284769
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10/31/2002
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SYSTEM AND METHOD OF FORMING A PASSIVE LAYER BY A CMP PROCESS
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03/15/2005
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10284866
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10/30/2002
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05/06/2004
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NITROGEN OXIDATION TO REDUCE ENCROACHMENT
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05/31/2005
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10284946
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10/31/2002
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MULTI-CELL ORGANIC MEMORY ELEMENT AND METHODS OF OPERATING AND FABRICATING
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06/22/2004
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10285183
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10/31/2002
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MEMORY CELL FORMATION WITH PROCESS FOR PATTERNING CONDUCTING POLYMER FILMS
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11/16/2004
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10285909
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10/31/2002
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MEMORY DEVICE HAVING RESISTIVE ELEMENT COUPLED TO REFERENCE CELL FOR IMPROVED RELIABILITY
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01/25/2005
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10287363
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11/04/2002
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05/06/2004
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Title:
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CONTROL OF MEMORY ARRAYS UTILIZING ZENER DIODE-LIKE DEVICES
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03/22/2005
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10287612
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11/04/2002
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05/06/2004
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STACKED ORGANIC MEMORY DEVICES AND METHODS OF OPERATING AND FABRICATING
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02/22/2005
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10288871
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11/05/2002
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METHOD OF ALTERNATING GROUNDED/FLOATING POLY LINES TO MONITOR SHORTS
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04/06/2004
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10291293
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11/08/2002
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04/17/2003
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Title:
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METHOD OF FORMING FLASH MEMORY HAVING PRE-INTERPOLY DIELECTRIC TREATMENT LAYER
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03/23/2004
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10292121
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11/12/2002
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Title:
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FABRICATION OF SHALLOW TRENCH ISOLATION STRUCTURES WITH ROUNDED CORNER AND SELF-ALIGNED GATE
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08/12/2003
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10295738
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11/15/2002
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04/17/2003
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Title:
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METHOD OF FABRICATING NITRIDATED TUNNEL OXIDE BARRIERS FOR FLASH MEMORY DEVICES HAVING STI AND LOCOS ISOLATION
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01/02/2007
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10298512
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11/19/2002
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07/24/2003
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NON-VOLATILE SEMICONDUCTOR MEMORY WITH A FUNCTION FOR PREVENTING UNAUTHORIZED READING
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07/27/2004
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10302672
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11/22/2002
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05/27/2004
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Title:
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CASCODE AMPLIFIER CIRCUIT FOR PRODUCING A FAST, STABLE AND ACCURATE BIT LINE VOLTAGE
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09/05/2006
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10304762
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11/27/2002
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04/17/2003
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SEMICONDUCTOR MEMORY APPARATUS
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10/19/2004
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10304863
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11/27/2002
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02/12/2004
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Title:
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MEMORY DEVICE
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07/11/2006
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10305700
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11/26/2002
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Title:
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METHOD AND SYSTEM FOR DEFINING A REDUNDANCY WINDOW AROUND A PARTICULAR COLUMN IN A MEMORY ARRAY
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05/23/2006
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10305724
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11/26/2002
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05/27/2004
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Title:
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LATERAL DOPED CHANNEL
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05/24/2005
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10305750
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11/26/2002
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METHOD OF PROTECTING A MEMORY ARRAY FROM CHARGE DAMAGE DURING FABRICATION
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06/01/2004
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10305756
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11/26/2002
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PROGRAM ALGORITHM INCLUDING SOFT ERASE FOR SONOS MEMORY DEVICE
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09/28/2004
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10305889
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11/26/2002
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05/27/2004
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MOCVD FORMATION OF CU2S
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09/30/2003
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10306080
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11/26/2002
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MEMORY CIRCUIT FOR SUPPRESSING BIT LINE CURRENT LEAKAGE
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06/14/2005
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10306252
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11/27/2002
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09/02/2004
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METHOD AND SYSTEM FOR ERASING A NITRIDE MEMORY DEVICE
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01/31/2006
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10306382
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11/27/2002
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METHOD FOR PRODUCING A LOW DEFECT HOMOGENEOUS OXYNITRIDE
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06/01/2004
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10306529
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11/27/2002
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METHOD FOR FABRICATING NITRIDE MEMORY CELLS USING A FLOATING GATE FABRICATION PROCESS
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11/02/2004
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10306667
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11/26/2002
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METHOD OF DETERMINING CHARGE LOSS ACTIVATION ENERGY OF A MEMORY ARRAY
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07/11/2006
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10307189
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11/29/2002
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MEMORY WITH IMPROVED CHARGE-TRAPPING DIELECTRIC LAYER
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09/21/2004
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10307667
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12/02/2002
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SYSTEM FOR PROGRAMMING A NON-VOLATILE MEMORY CELL
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09/07/2004
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10307749
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12/02/2002
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06/03/2004
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PRE-CHARGE METHOD FOR READING A NON-VOLATILE MEMORY CELL
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10/12/2004
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10308518
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12/03/2002
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ONO FABRICATION PROCESS FOR REDUCING OXYGEN VACANCY CONTENT IN BOTTOM OXIDE LAYER IN FLASH MEMORY DEVICES
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05/04/2004
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10313444
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12/05/2002
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CIRCUIT FOR ACCURATE MEMORY READ OPERATIONS
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05/18/2004
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10313454
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12/05/2002
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Title:
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STRUCTURE AND METHOD FOR REDUCING CHARGE LOSS IN A MEMORY CELL
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08/10/2004
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10313494
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12/05/2002
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METHODS OF FORMING PASSIVE LAYERS IN ORGANIC MEMORY CELLS
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04/06/2004
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10313676
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12/05/2002
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EFFICIENT METHOD TO DETECT PROCESS INDUCED DEFECTS IN THE GATE STACK OF FLASH MEMORY DEVICES
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Issue Dt:
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08/03/2004
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10314054
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12/05/2002
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IMPLANTATION FOR THE FORMATION OF CUX LAYER IN AN ORGANIC MEMORY DEVICE
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06/08/2004
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10314060
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12/05/2002
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METHOD OF FORMING COPPER SULFIDE FOR MEMORY CELL
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05/22/2007
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10314591
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12/09/2002
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06/10/2004
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SELF ALIGNED MEMORY ELEMENT AND WORDLINE
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02/03/2004
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10314837
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12/09/2002
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SELECTIVE FORMATION OF TOP MEMORY ELECTRODE BY ELECTROLESS FORMATION OF CONDUCTIVE MATERIALS
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12/07/2004
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10315458
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12/09/2002
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DISCONTINUOUS NITRIDE STRUCTURE FOR NON-VOLATILE TRANSISTORS
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05/11/2004
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10315632
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12/10/2002
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FLASH MEMORY DEVICE HAVING FOUR-BIT CELLS
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03/21/2006
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10316569
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12/10/2002
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06/10/2004
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METHOD AND SYSTEM FOR REDUCING CONTACT DEFECTS USING NON CONVENTIONAL CONTACT FORMATION METHOD FOR SEMICONDUCTOR CELLS
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04/18/2006
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10320910
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12/17/2002
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DIFFERENTIALLY MIS-ALIGNED CONTACTS IN FLASH ARRAYS TO CALIBRATE FAILURE MODES
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06/14/2005
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10331938
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12/30/2002
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TREATMENT OF DIELECTRIC MATERIAL TO ENHANCE ETCH RATE
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06/15/2004
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10338333
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01/07/2003
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SYSTEM AND METHOD FOR CHARGE RESTORATION IN A NON-VOLATILE MEMORY DEVICE
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10/26/2004
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10339536
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01/08/2003
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METHOD AND SYSTEM FOR TESTING TUNNEL OXIDE ON A MEMORY-RELATED STRUCTURE
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06/06/2006
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10341424
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01/14/2003
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06/05/2003
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NONVOLATILE MEMORY DEVICE FOR STORING MULTI-BIT DATA
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04/26/2005
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10341881
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01/14/2003
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MEMORY DEVICE HAVING A P+ GATE AND THIN BOTTOM OXIDE AND METHOD OF ERASING SAME
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09/28/2004
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10342032
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01/14/2003
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FLASH MEMORY DEVICES WITH OXYNITRIDE DIELECTRIC AS THE CHARGE STORAGE MEDIA
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12/19/2006
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10342549
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01/15/2003
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DIELECTRIC MEMORY CELL STRUCTURE WITH COUNTER DOPED CHANNEL REGION
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05/17/2005
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10342585
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01/14/2003
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FLASH MEMORY CELL PROGRAMMING METHOD AND SYSTEM
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06/08/2004
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10348732
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01/21/2003
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MEMORY CIRCUIT ARRANGEMENT FOR PROGRAMMING A MEMORY CELL
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11/04/2003
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10349293
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01/21/2003
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METHOD FOR IMPROVING READ MARGIN IN A FLASH MEMORY DEVICE
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07/04/2006
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10350472
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01/23/2003
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STRUCTURE AND METHOD FOR REDUCING STANDING WAVES IN A PHOTORESIST
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07/27/2004
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10352658
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01/28/2003
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Title:
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NOVEL NON-VOLATILE MEMORY CELL AND METHOD OF PROGRAMMING FOR IMPROVED DATA RETENTION
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08/03/2004
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10353558
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01/29/2003
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Title:
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METHOD FOR READING A NON-VOLATILE MEMORY CELL ADJACENT TO AN INACTIVE REGION OF A NON-VOLATILE MEMORY CELL ARRAY
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Patent #:
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Issue Dt:
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10/28/2003
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Application #:
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10356495
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Filing Dt:
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02/03/2003
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Publication #:
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Pub Dt:
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08/28/2003
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Title:
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NONVOLATILE SEMICONDUCTOR MEMORY DEVICE PROGRAMMING SECOND DYNAMIC REFERENCE CELL ACCORDING TO THRESHOLD VALUE OF FIRST DYNAMIC REFERENCE CELL
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Patent #:
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Issue Dt:
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07/20/2004
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Application #:
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10356496
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Filing Dt:
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02/03/2003
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Publication #:
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Pub Dt:
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06/26/2003
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Title:
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NON-VOLATILE SEMICONDUCTOR STORAGE DEVICE AND METHOD OF READING OUT DATA
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Patent #:
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Issue Dt:
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05/11/2004
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Application #:
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10357879
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Filing Dt:
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02/04/2003
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Title:
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METHOD OF IMPROVING DYNAMIC REFERENCE TRACKING FOR FLASH MEMORY UNIT
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Patent #:
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Issue Dt:
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05/03/2005
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Application #:
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10358498
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Filing Dt:
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02/04/2003
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Title:
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COMPENSATED OSCILLATOR CIRCUIT FOR CHARGE PUMPS
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Patent #:
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Issue Dt:
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04/25/2006
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Application #:
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10358586
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Filing Dt:
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02/05/2003
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Title:
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ONO FABRICATION PROCESS FOR INCREASING OXYGEN CONTENT AT BOTTOM OXIDE-SUBSTRATE INTERFACE IN FLASH MEMORY DEVICES
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Patent #:
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Issue Dt:
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09/14/2004
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Application #:
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10358587
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Filing Dt:
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02/05/2003
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Title:
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METHODS OF CONTROLLING VSS IMPLANTS ON MEMORY DEVICES, AND SYSTEM FOR PERFORMING SAME
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Patent #:
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Issue Dt:
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08/10/2004
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Application #:
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10358589
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Filing Dt:
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02/05/2003
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Publication #:
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Pub Dt:
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08/05/2004
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Title:
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UV-BLOCKING LAYER FOR REDUCING UV-INDUCED CHARGING OF SONOS DUAL-BIT FLASH MEMORY DEVICES IN BEOL PROCESSING
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Patent #:
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Issue Dt:
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10/11/2005
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Application #:
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10358756
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Filing Dt:
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02/05/2003
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Title:
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REDUCED SILICON GOUGING AND COMMON SOURCE LINE RESISTANCE IN SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
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04/20/2004
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Application #:
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10358866
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Filing Dt:
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02/05/2003
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Title:
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PERFORMANCE IN FLASH MEMORY DEVICES
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Patent #:
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Issue Dt:
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09/27/2005
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Application #:
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10359872
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Filing Dt:
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02/07/2003
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Title:
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METHOD OF FORMATION OF SEMICONDUCTOR RESISTANT TO HOT CARRIER INJECTION STRESS
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Patent #:
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Issue Dt:
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07/27/2004
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Application #:
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10361378
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Filing Dt:
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02/10/2003
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Title:
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SELECTION CIRCUIT FOR ACCURATE MEMORY READ OPERATIONS
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Patent #:
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Issue Dt:
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12/30/2003
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Application #:
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10361455
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Filing Dt:
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02/10/2003
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Title:
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METHOD FOR FABRICATING DEVICES IN CORE AND PERIPHERY SEMICONDUCTOR REGIONS USING DUAL SPACERS
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Patent #:
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Issue Dt:
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07/27/2004
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Application #:
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10364569
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Filing Dt:
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02/10/2003
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Title:
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STRUCTURE AND METHOD FOR SUPPRESSING OXIDE ENCROACHMENT IN A FLOATING GATE MEMORY CELL
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Patent #:
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Issue Dt:
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10/10/2006
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Application #:
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10368696
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Filing Dt:
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02/19/2003
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Title:
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PROTECTION OF CHARGE TRAPPING DIELECTRIC FLASH MEMORY DEVICES FROM UV-INDUCED CHARGING IN BEOL PROCESSING
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Patent #:
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Issue Dt:
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03/29/2005
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Application #:
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10378885
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Filing Dt:
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03/05/2003
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Title:
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IMPLANT DAMAGE REMOVAL BY LASER THERMAL ANNEALING
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Patent #:
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Issue Dt:
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05/17/2005
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Application #:
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10379744
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Filing Dt:
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03/05/2003
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Title:
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FAST BANDGAP REFERENCE CIRCUIT FOR USE IN A LOW POWER SUPPLY A/D BOOSTER
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Patent #:
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Issue Dt:
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08/24/2004
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Application #:
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10379885
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Filing Dt:
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03/05/2003
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Title:
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METHOD OF PROGRAMMING A MEMORY CELL
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Patent #:
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Issue Dt:
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09/21/2004
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Application #:
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10382726
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Filing Dt:
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03/05/2003
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Publication #:
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Pub Dt:
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09/09/2004
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Title:
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CHARGE-TRAPPING MEMORY ARRAYS RESISTANT TO DAMAGE FROM CONTACT HOLE FORMATION
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Patent #:
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Issue Dt:
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06/01/2004
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Application #:
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10382731
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Filing Dt:
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03/05/2003
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Title:
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MEMORY ARRAY HAVING SHALLOW BIT LINE WITH SILICIDE CONTACT PORTION AND METHOD OF FORMATION
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Patent #:
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Issue Dt:
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08/24/2004
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Application #:
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10382744
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Filing Dt:
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03/05/2003
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Title:
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METHOD OF FORMING CORE AND PERIPHERY GATES INCLUDING TWO CRITICAL MASKING STEPS TO FORM A HARD MASK IN A CORE REGION THAT INCLUDES A CRITICAL DIMENSION LESS THAN ACHIEVABLE AT A RESOLUTION LIMIT OF LITHOGRAPHY
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Patent #:
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Issue Dt:
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07/04/2006
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Application #:
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10384856
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Filing Dt:
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03/10/2003
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Title:
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METHOD AND SYSTEM FOR APPLYING TESTING VOLTAGE SIGNAL
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Patent #:
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Issue Dt:
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07/20/2004
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Application #:
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10384936
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Filing Dt:
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03/10/2003
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Title:
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METHOD AND SYSTEM FOR DETECTING DEFECTIVE MATERIAL SURROUNDING FLASH MEMORY CELLS
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Patent #:
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Issue Dt:
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12/02/2003
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Application #:
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10385375
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Filing Dt:
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03/10/2003
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Title:
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SPIN ON POLYMERS FOR ORGANIC MEMORY DEVICES
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Patent #:
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Issue Dt:
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06/28/2005
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Application #:
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10387064
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Filing Dt:
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03/11/2003
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Publication #:
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Pub Dt:
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09/16/2004
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Title:
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NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
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Patent #:
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Issue Dt:
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04/11/2006
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Application #:
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10387427
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Filing Dt:
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03/14/2003
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Publication #:
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Pub Dt:
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10/23/2003
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Title:
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NON-VOLATILE SEMICONDUCTOR MEMORY AND METHOD OF MANUFACTURING THE SAME
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Patent #:
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Issue Dt:
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06/01/2004
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Application #:
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10387617
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Filing Dt:
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03/13/2003
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Title:
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CIRCUIT FOR FAST AND ACCURATE MEMORY READ OPERATIONS
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Patent #:
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Issue Dt:
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08/30/2005
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Application #:
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10387774
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Filing Dt:
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03/12/2003
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Title:
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MEMORY DEVICE HAVING REVERSE LDD
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Patent #:
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Issue Dt:
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11/16/2004
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Application #:
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10389149
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Filing Dt:
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03/13/2003
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Title:
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APPARATUS AND METHOD FOR A SENSE AMPLIFIER CIRCUIT THAT SAMPLES AND HOLDS A REFERENCE VOLTAGE
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Patent #:
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Issue Dt:
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07/05/2005
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Application #:
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10392912
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Filing Dt:
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03/21/2003
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Publication #:
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Pub Dt:
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09/25/2003
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Title:
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NON-VOLATILE SEMICONDUCTOR MEMORY THAT IS BASED ON A VIRTUAL GROUND METHOD
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Patent #:
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Issue Dt:
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12/23/2003
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Application #:
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10394565
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Filing Dt:
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03/21/2003
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Title:
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ALIGNMENT SYSTEM FOR PLANAR CHARGE TRAPPING DIELECTRIC MEMORY CELL LITHOGRAPHY
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Patent #:
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Issue Dt:
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11/29/2005
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Application #:
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10404081
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Filing Dt:
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04/02/2003
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Publication #:
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Pub Dt:
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10/23/2003
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Title:
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SEMICONDUCTOR DEVICE LOW TEMPERATURE TEST APPARATUS USING ELECTRONIC COOLING ELEMENT
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Patent #:
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Issue Dt:
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11/30/2004
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Application #:
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10405272
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Filing Dt:
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04/02/2003
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Title:
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PHOTOSENSITIVE POLYMERIC MEMORY ELEMENTS
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Patent #:
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Issue Dt:
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03/27/2007
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Application #:
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10406130
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Filing Dt:
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04/03/2003
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Title:
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BMC-HOSTED REAL-TIME CLOCK AND NON-VOLATILE RAM REPLACEMENT
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Patent #:
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Issue Dt:
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09/28/2004
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Application #:
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10406415
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Filing Dt:
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04/03/2003
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Publication #:
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Pub Dt:
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10/07/2004
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Title:
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FAST, ACCURATE AND LOW POWER SUPPLY VOLTAGE BOOSTER USING A/D CONVERTER
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Patent #:
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Issue Dt:
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07/18/2006
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Application #:
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10407999
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Filing Dt:
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04/03/2003
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Title:
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MEMORY DEVICE HAVING IMPROVED PERIPHERY AND CORE ISOLATION
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