Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 036012/0161 | |
| Pages: | 4 |
| | Recorded: | 06/24/2015 | | |
| Attorney Dkt #: | IOSEG001 - NAME CHANGE |
| Conveyance: | CHANGE OF NAME (SEE DOCUMENT FOR DETAILS). |
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Total properties:
4
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Patent #:
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Issue Dt:
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10/06/2015
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Application #:
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14478446
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Filing Dt:
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09/05/2014
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Publication #:
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Pub Dt:
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12/25/2014
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Title:
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Methods for the Formation of a Trap Rich Layer
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Patent #:
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Issue Dt:
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08/09/2016
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Application #:
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14572580
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Filing Dt:
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12/16/2014
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Publication #:
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Pub Dt:
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05/21/2015
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Title:
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INTEGRATED CIRCUIT ASSEMBLY AND METHOD OF MAKING
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Patent #:
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Issue Dt:
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06/06/2017
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Application #:
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14576122
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Filing Dt:
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12/18/2014
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Publication #:
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Pub Dt:
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04/16/2015
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Title:
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Vertical Semiconductor Device with Thinned Substrate
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Patent #:
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Issue Dt:
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06/14/2016
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Application #:
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14586668
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Filing Dt:
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12/30/2014
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Publication #:
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Pub Dt:
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04/23/2015
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Title:
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THIN INTEGRATED CIRCUIT CHIP-ON-BOARD ASSEMBLY
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Assignee
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| 4795 EASTGATE MALL |
| SUITE 100 |
| SAN DIEGO, CALIFORNIA 92121 |
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Correspondence name and address
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ERIC SCHEUERLEIN
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THE MUELLER LAW OFFICE
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12707 HIGH BLUFF DR STE 200
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SAN DIEGO, CA 92130
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