|
Total properties:
97
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/09/1999
|
Application #:
|
08534901
|
Filing Dt:
|
09/28/1995
|
|
Title:
|
METHOD FOR FORMING INSULATING LAYERS BETWEEN POLYSILICON LAYERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/02/1999
|
Application #:
|
08646019
|
Filing Dt:
|
05/07/1996
|
|
Title:
|
MODIFIED POLY-BUFFERED LOCOS FORMING TECHNOLOGY AVOIDING THE POSITIVE CHARGE TRAPPING AT THE BEAK OF FIELD OXIDE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/09/1999
|
Application #:
|
08661912
|
Filing Dt:
|
06/12/1996
|
|
Title:
|
CAPACITOR OF A DRAM CELL AND METHOD OF MAKING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/17/1999
|
Application #:
|
08665569
|
Filing Dt:
|
06/18/1996
|
|
Title:
|
MANIFOLD HAVING OUTLETS EQUALLY SPACED FROM THE INLET
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/08/1998
|
Application #:
|
08683248
|
Filing Dt:
|
07/18/1996
|
|
Title:
|
METHOD OF PREVENTING DEFECTS AND PARTICLES PRODUCED AFTER TUNGSTEN ETCH BACK
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/21/1997
|
Application #:
|
08685757
|
Filing Dt:
|
07/24/1996
|
|
Title:
|
SELF-REGISTERED CAPACITOR BOTTOM PLATE-LOCAL INTERCONNECT SCHEME FOR DRAM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/22/1998
|
Application #:
|
08697623
|
Filing Dt:
|
08/27/1996
|
|
Title:
|
RUGGED STACKED OXIDE LAYER STRUCTURE AND METHOD OF FABRICATING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/16/1999
|
Application #:
|
08728305
|
Filing Dt:
|
10/09/1996
|
|
Title:
|
METHOD FOR INCREASING THE REFRESH TIME OF THE DRAM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/06/1999
|
Application #:
|
08735981
|
Filing Dt:
|
10/25/1996
|
|
Title:
|
ARC CHAMBER FOR ION IMPLANTER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/19/1999
|
Application #:
|
08764872
|
Filing Dt:
|
12/03/1996
|
|
Title:
|
DRAM CELL WITH A ROUGHENED POLY-SI ELECTRODE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/22/1998
|
Application #:
|
08789495
|
Filing Dt:
|
01/27/1997
|
|
Title:
|
METHOD OF FORMING A CAPACITOR OF A DRAM CELL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/01/1999
|
Application #:
|
08795789
|
Filing Dt:
|
02/05/1997
|
|
Title:
|
SINGLE-SIDE CORRUGATED CYLINDRICAL CAPACITOR STRUCTURE OF HIGH DENSITY DRAMS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/02/1998
|
Application #:
|
08798560
|
Filing Dt:
|
02/11/1997
|
|
Title:
|
ALIGNMENT MARK PATTERN FOR SEMICONDUCTOR PROCESS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/09/2000
|
Application #:
|
08803623
|
Filing Dt:
|
02/21/1997
|
|
Title:
|
APPARATUS AND METH0D FOR POLISHING A FLAT SURFACE USING A BELTED POLISHING PAD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/22/1998
|
Application #:
|
08848583
|
Filing Dt:
|
04/28/1997
|
|
Title:
|
METHOD OF MANUFACTURING A SHALLOW TRENCH ISOLATION FOR A SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/13/1998
|
Application #:
|
08862318
|
Filing Dt:
|
05/23/1997
|
|
Title:
|
TFT WITH SELF-ALIGN OFFSET GATE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/09/1999
|
Application #:
|
08892307
|
Filing Dt:
|
07/14/1997
|
|
Title:
|
SEMICONDUCTOR HAVING SELF-ALIGNED POLYSILICON ELECTRODE LAYER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/17/1998
|
Application #:
|
08895107
|
Filing Dt:
|
07/16/1997
|
|
Title:
|
PROCESS OF MANUFACTURING A TRENCHED STACK-CAPACITOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/09/1999
|
Application #:
|
08908319
|
Filing Dt:
|
08/07/1997
|
|
Title:
|
METHOD FOR INCREASING UTILIZABLE SURFACE OF RUGGED POSLYSILICON LAYER IN SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/22/1998
|
Application #:
|
08946827
|
Filing Dt:
|
10/08/1997
|
|
Title:
|
POLYLOAD SRAM MEMORY CELL WITH LOW STANBY CURRENT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/16/2000
|
Application #:
|
08964773
|
Filing Dt:
|
11/05/1997
|
|
Title:
|
POLISHING SYSTEM INCLUDING A HYDROSTATIC FLUID BEARING SUPPORT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/16/2000
|
Application #:
|
08964817
|
Filing Dt:
|
11/05/1997
|
|
Title:
|
WAFER POLISHING HEAD DRIVE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/28/1999
|
Application #:
|
08964930
|
Filing Dt:
|
11/05/1997
|
|
Title:
|
MODULAR WAFER POLISHING APPARATUS AND METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/07/1999
|
Application #:
|
08965037
|
Filing Dt:
|
11/05/1997
|
|
Title:
|
WAFER SHUTTLE SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/04/2002
|
Application #:
|
09099258
|
Filing Dt:
|
06/18/1998
|
|
Title:
|
ENHANCED SIDE-WALL STACKED CAPACITOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/28/2000
|
Application #:
|
09132557
|
Filing Dt:
|
08/11/1998
|
|
Title:
|
MANUFACTURING PROCESS AND STRUCTURE OF CAPACITOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/19/2000
|
Application #:
|
09173386
|
Filing Dt:
|
10/15/1998
|
|
Title:
|
MAUFACTURING PROCESS AND STRUCTURE OF CAPACITOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/14/2000
|
Application #:
|
09177089
|
Filing Dt:
|
10/22/1998
|
|
Title:
|
APPARATUS AND METHOD FOR POLISHING A FLAT SURFACE USING A BELTED POLISHING PAD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/11/2000
|
Application #:
|
09187532
|
Filing Dt:
|
11/06/1998
|
|
Title:
|
POLISHING METHOD USING A HYDROSTATIC FLUID BEARING SUPPORT HAVING FLUCTUATING FLUID FLOW
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/10/2002
|
Application #:
|
09265962
|
Filing Dt:
|
03/11/1999
|
|
Title:
|
MONITOR METHOD FOR QUALITY OF METAL ARC (ANTIREFLECTION COATING) LAYER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/05/2001
|
Application #:
|
09266285
|
Filing Dt:
|
03/11/1999
|
|
Title:
|
NEW POLY SPACER SPLIT GATE CELL WITH EXTREMELY SMALL CELL SIZE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/01/2000
|
Application #:
|
09281944
|
Filing Dt:
|
03/31/1999
|
|
Title:
|
HEIGHT GAUGE DEVICE FOR WAFER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/14/2001
|
Application #:
|
09286287
|
Filing Dt:
|
04/06/1999
|
|
Title:
|
METHOD TO REDUCE THE PARTICLES IN LOAD- L0CK CHAMBER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/06/2000
|
Application #:
|
09323746
|
Filing Dt:
|
06/01/1999
|
|
Title:
|
METHOD TO PREVENT THE FORMATION OF A THINNER PORTION OF INSULATING LAYER AT THE JUNCTION BETWEEN THE SIDE WALLS AND THE BOTTOM INSULATOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/05/2001
|
Application #:
|
09325915
|
Filing Dt:
|
06/04/1999
|
|
Title:
|
METHOD FOR PREVENTING FILM DEPOSITED ON SEMICONDUCTOR WAFER FROM CRACKING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/24/2001
|
Application #:
|
09326096
|
Filing Dt:
|
06/04/1999
|
|
Title:
|
METHOD FOR DETERMINING CRACK LIMIT OF FILM DEPOSITED ON SEMICONDUCTOR WAFER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/30/2002
|
Application #:
|
09369265
|
Filing Dt:
|
08/06/1999
|
|
Title:
|
METHOD FOR ETCHING PASSIVATION LAYERS AND ANTIREFLECTIVE LAYER ON A SUBSTRATE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/30/2001
|
Application #:
|
09376464
|
Filing Dt:
|
08/18/1999
|
|
Title:
|
TRENCH NON-VOLATILE MEMORY CELL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/18/2000
|
Application #:
|
09385382
|
Filing Dt:
|
08/30/1999
|
|
Title:
|
METHOD FOR PREVENTING BUBBLE DEFECTS IN BPSG FILM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/08/2001
|
Application #:
|
09455924
|
Filing Dt:
|
12/07/1999
|
|
Title:
|
ASHING PROCESS BY ADJUSTING ETCHING ENDPOINT AND ORDERLY STEPPED POSITIONING SILICON WAFER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/13/2003
|
Application #:
|
09523064
|
Filing Dt:
|
03/10/2000
|
|
Title:
|
FLASH CELL DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/04/2001
|
Application #:
|
09534699
|
Filing Dt:
|
03/24/2000
|
|
Title:
|
MOS transistors having dual gates and self-aligned interconnect contact windows
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/12/2001
|
Application #:
|
09586474
|
Filing Dt:
|
06/01/2000
|
|
Title:
|
Polishing system including a hydrostatic fluid bearing support
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/12/2002
|
Application #:
|
09588110
|
Filing Dt:
|
05/31/2000
|
|
Title:
|
Method to prevent the formation of a thinner portion of insulating layer at the junction between the side walls and the bottom insulator
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/17/2002
|
Application #:
|
09642939
|
Filing Dt:
|
08/22/2000
|
|
Title:
|
METHOD FOR PREVENTING NATIVE OXIDE GROWTH DURING NITRIDATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/03/2002
|
Application #:
|
09659511
|
Filing Dt:
|
09/11/2000
|
|
Title:
|
METHOD FOR FORMING A TRENCH CAPACITOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/24/2003
|
Application #:
|
09686774
|
Filing Dt:
|
10/12/2000
|
|
Title:
|
METHOD FOR TUNGSTEN DEPOSITION WITHOUT FLUORINE-CONTAMINATED SILICON SUBSTRATE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/04/2003
|
Application #:
|
09691560
|
Filing Dt:
|
10/18/2000
|
|
Title:
|
TRENCH CAPACITOR WITH EXPANDED AREA AND METHOD OF MAKING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/24/2002
|
Application #:
|
09708219
|
Filing Dt:
|
11/07/2000
|
|
Title:
|
HYDROSTATIC FLUID BEARING SUPPORT WITH ADJUSTABLE INLET HEIGHTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/10/2002
|
Application #:
|
09711926
|
Filing Dt:
|
11/15/2000
|
|
Title:
|
UPPER COVER PLATE FOR AN AIR-TIGHT CHAMBER AND A TOOL FOR REMOVING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/11/2003
|
Application #:
|
09712254
|
Filing Dt:
|
11/15/2000
|
|
Title:
|
PROCESS FOR DETERMINING SPACING BETWEEN HEATER AND SHOWERHEAD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/04/2002
|
Application #:
|
09759905
|
Filing Dt:
|
01/16/2001
|
|
Title:
|
ADDITION OF PLANARIZING DIELECTRIC LAYER TO REDUCE A DISHING PHENOMENA EXPERIENCED DURING A CHEMICAL MECHANICAL PROCEDURE USED IN THE FORMATION OF SHALLOW TRENCH ISOLATION REGIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/27/2002
|
Application #:
|
09822563
|
Filing Dt:
|
03/30/2001
|
|
Publication #:
|
|
Pub Dt:
|
08/09/2001
| | | | |
|
Title:
|
NEW POLY SPACER SPLIT GATE CELL WITH EXTREMELY SMALL CELL SIZE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2003
|
Application #:
|
09863329
|
Filing Dt:
|
05/24/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/20/2002
| | | | |
|
Title:
|
TEACHING TOOL FOR A ROBOT ARM FOR WAFER REACTION OVENS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/14/2003
|
Application #:
|
09894753
|
Filing Dt:
|
06/28/2001
|
|
Publication #:
|
|
Pub Dt:
|
08/15/2002
| | | | |
|
Title:
|
APPARATUS AND METHOD FOR DETERMINING VARIOUS PROCESSES OF WAFER FABRICATION IN A SEMICONDUCTOR DEVICE MANUFACTURING TECHNOLOGY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/02/2003
|
Application #:
|
09896205
|
Filing Dt:
|
06/28/2001
|
|
Publication #:
|
|
Pub Dt:
|
12/06/2001
| | | | |
|
Title:
|
MOS TRANSISTORS HAVING DUAL GATES AND SELF-ALIGNED INTERCONNECT CONTACT WINDOWS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/13/2005
|
Application #:
|
09900165
|
Filing Dt:
|
07/09/2001
|
|
Publication #:
|
|
Pub Dt:
|
09/26/2002
| | | | |
|
Title:
|
METHOD AND SYSTEM FOR DETERMINING THE BEST INTEGRAL PROCESS PATH TO PROCESS SEMICONDUCTOR PRODUCTS TO IMPROVE YIELD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/12/2002
|
Application #:
|
09983681
|
Filing Dt:
|
10/25/2001
|
|
Title:
|
MEMORY CELL HAVING A DEEP TRENCH CAPACITOR AND A VERTICAL CHANNEL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/04/2003
|
Application #:
|
10002983
|
Filing Dt:
|
11/30/2001
|
|
Title:
|
SELF-ALIGNED ACTIVE ARRAY ALONG THE LENGTH DIRECTION TO FORM UN-BIASED BURIED STRAP FORMATION FOR SUB-150 NM BEST DRAM DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/2004
|
Application #:
|
10020754
|
Filing Dt:
|
12/12/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/12/2003
| | | | |
|
Title:
|
BURIED STRAP FORMATION METHOD FOR SUB-150 NM BEST DRAM DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/14/2003
|
Application #:
|
10074852
|
Filing Dt:
|
02/11/2002
|
|
Publication #:
|
|
Pub Dt:
|
11/07/2002
| | | | |
|
Title:
|
METHOD FOR MEASURING THE DEPTH OF WELL
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10097052
|
Filing Dt:
|
03/12/2002
|
|
Publication #:
|
|
Pub Dt:
|
01/30/2003
| | | | |
|
Title:
|
Method for preventing shorts between contact windows and metal lines
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/31/2002
|
Application #:
|
10174442
|
Filing Dt:
|
06/17/2002
|
|
Title:
|
FABRICATION OF DIELECTRIC IN TRENCHES FORMED IN A SEMICONDUCTOR SUBSTRATE FOR A NONVOLATILE MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/05/2005
|
Application #:
|
10253738
|
Filing Dt:
|
09/23/2002
|
|
Publication #:
|
|
Pub Dt:
|
01/23/2003
| | | | |
|
Title:
|
POLISHING SYSTEM INCLUDING A HYDROSTATIC FLUID BEARING SUPPORT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/07/2005
|
Application #:
|
10262939
|
Filing Dt:
|
10/03/2002
|
|
Publication #:
|
|
Pub Dt:
|
04/08/2004
| | | | |
|
Title:
|
METHOD OF FORMING CONTACT HOLE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/11/2003
|
Application #:
|
10272312
|
Filing Dt:
|
10/15/2002
|
|
Title:
|
METHOD AND DEVICE FOR PROVIDING DOUBLE CELL DENSITY IN SDRAM AND IN DDR SDRAM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/17/2004
|
Application #:
|
10317912
|
Filing Dt:
|
12/12/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2003
| | | | |
|
Title:
|
TRENCH CAPACITOR WITH EXPANDED AREA AND METHOD OF MAKING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
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11/23/2004
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Application #:
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10331612
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Filing Dt:
|
12/31/2002
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Publication #:
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Pub Dt:
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05/13/2004
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Title:
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STACK-FILM TRENCH CAPACITOR AND METHOD FOR MANUFACTURING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/08/2005
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Application #:
|
10393212
|
Filing Dt:
|
03/19/2003
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Publication #:
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Pub Dt:
|
09/23/2004
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Title:
|
NONVOLATILE MEMORIES AND METHODS OF FABRICATION
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10404430
|
Filing Dt:
|
04/02/2003
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Publication #:
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Pub Dt:
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07/08/2004
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Title:
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Trench capacitor process for preventing parasitic leakage
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/04/2006
|
Application #:
|
10442759
|
Filing Dt:
|
05/20/2003
|
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Publication #:
|
|
Pub Dt:
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11/25/2004
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Title:
|
METHODS FOR IMPROVING QUALITY OF SEMICONDUCTOR OXIDE COMPOSITION FORMED FROM HALOGEN-CONTAINING PRECURSOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/08/2005
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Application #:
|
10631552
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Filing Dt:
|
07/30/2003
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Publication #:
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Pub Dt:
|
09/23/2004
| | | | |
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Title:
|
NONVOLATILE MEMORIES AND METHODS OF FABRICATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/19/2005
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Application #:
|
10655706
|
Filing Dt:
|
09/05/2003
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Publication #:
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|
Pub Dt:
|
03/10/2005
| | | | |
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Title:
|
CONTROL OF AIR GAP POSITION IN A DIELECTRIC LAYER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/07/2005
|
Application #:
|
10681125
|
Filing Dt:
|
10/09/2003
|
|
Publication #:
|
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Pub Dt:
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10/21/2004
| | | | |
|
Title:
|
TRENCH CAPACITOR AND PROCESS FOR PREVENTING PARASITIC LEAKAGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/19/2005
|
Application #:
|
10707357
|
Filing Dt:
|
12/08/2003
|
|
Publication #:
|
|
Pub Dt:
|
04/07/2005
| | | | |
|
Title:
|
[METHOD OF FABRICATING DEEP TRENCH CAPACITOR]
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/29/2005
|
Application #:
|
10758624
|
Filing Dt:
|
01/14/2004
|
|
Title:
|
METHOD FOR REMOVAL OF HEMISPHERICAL GRAINED SILICON IN A DEEP TRENCH
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/02/2006
|
Application #:
|
10877591
|
Filing Dt:
|
06/25/2004
|
|
Publication #:
|
|
Pub Dt:
|
12/29/2005
| | | | |
|
Title:
|
FORMATION OF REMOVABLE SHROUD BY ANISOTROPIC PLASMA ETCH
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/16/2007
|
Application #:
|
10904479
|
Filing Dt:
|
11/12/2004
|
|
Publication #:
|
|
Pub Dt:
|
03/09/2006
| | | | |
|
Title:
|
METHOD OF FABRICATING DEEP TRENCH CAPACITOR"
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/08/2006
|
Application #:
|
10921041
|
Filing Dt:
|
08/17/2004
|
|
Publication #:
|
|
Pub Dt:
|
03/10/2005
| | | | |
|
Title:
|
CONTROL OF AIR GAP POSITION IN A DIELECTRIC LAYER
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10930239
|
Filing Dt:
|
08/30/2004
|
|
Publication #:
|
|
Pub Dt:
|
06/16/2005
| | | | |
|
Title:
|
Apparatus and process for physical vapor deposition
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/22/2006
|
Application #:
|
10962473
|
Filing Dt:
|
10/13/2004
|
|
Publication #:
|
|
Pub Dt:
|
04/14/2005
| | | | |
|
Title:
|
METHOD OF FORMING DEEP TRENCH CAPACITORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/18/2006
|
Application #:
|
10965160
|
Filing Dt:
|
10/15/2004
|
|
Publication #:
|
|
Pub Dt:
|
03/24/2005
| | | | |
|
Title:
|
STACK-FILM TRENCH CAPACITOR AND METHOD FOR MANUFACTURING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/18/2008
|
Application #:
|
11078435
|
Filing Dt:
|
03/14/2005
|
|
Publication #:
|
|
Pub Dt:
|
07/20/2006
| | | | |
|
Title:
|
METHOD FOR PREPARING A STRUCTURE WITH HIGH ASPECT RATIO
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/27/2007
|
Application #:
|
11112702
|
Filing Dt:
|
04/22/2005
|
|
Publication #:
|
|
Pub Dt:
|
08/25/2005
| | | | |
|
Title:
|
NONVOLATILE MEMORIES AND METHODS OF FABRICATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/15/2008
|
Application #:
|
11161724
|
Filing Dt:
|
08/15/2005
|
|
Publication #:
|
|
Pub Dt:
|
12/07/2006
| | | | |
|
Title:
|
FABRICATION METHOD OF A NON-VOLATILE MEMORY
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11222966
|
Filing Dt:
|
09/12/2005
|
|
Publication #:
|
|
Pub Dt:
|
10/19/2006
| | | | |
|
Title:
|
Method for preparing a deep trench
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11267163
|
Filing Dt:
|
11/07/2005
|
|
Publication #:
|
|
Pub Dt:
|
03/29/2007
| | | | |
|
Title:
|
Bottle-shaped trench and method of fabricating the same
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11288194
|
Filing Dt:
|
11/29/2005
|
|
Publication #:
|
|
Pub Dt:
|
04/05/2007
| | | | |
|
Title:
|
Flash memory structure and method for fabricating the same
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/02/2009
|
Application #:
|
11298836
|
Filing Dt:
|
12/12/2005
|
|
Publication #:
|
|
Pub Dt:
|
06/14/2007
| | | | |
|
Title:
|
METHOD FOR FABRICATING MEMORY CELL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/29/2007
|
Application #:
|
11302122
|
Filing Dt:
|
12/14/2005
|
|
Publication #:
|
|
Pub Dt:
|
04/05/2007
| | | | |
|
Title:
|
FLASH MEMORY STRUCTURE AND METHOD FOR FABRICATING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/01/2008
|
Application #:
|
11307424
|
Filing Dt:
|
02/07/2006
|
|
Publication #:
|
|
Pub Dt:
|
04/19/2007
| | | | |
|
Title:
|
A DYNAMIC RANDOM ACCESS MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/29/2008
|
Application #:
|
11431087
|
Filing Dt:
|
05/04/2006
|
|
Publication #:
|
|
Pub Dt:
|
09/21/2006
| | | | |
|
Title:
|
METHODS FOR IMPROVING QUALITY OF HIGH TEMPERATURE OXIDE (HTO) FORMED FROM HALOGEN-CONTAINING PRECURSOR AND PRODUCTS THEREOF AND APPARATUS THEREFOR
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11438396
|
Filing Dt:
|
05/23/2006
|
|
Publication #:
|
|
Pub Dt:
|
10/04/2007
| | | | |
|
Title:
|
Method for preparing a capacitor structure of a semiconductor memory
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11565633
|
Filing Dt:
|
12/01/2006
|
|
Publication #:
|
|
Pub Dt:
|
04/26/2007
| | | | |
|
Title:
|
DEEP TRENCH CAPACITOR
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11668477
|
Filing Dt:
|
01/30/2007
|
|
Publication #:
|
|
Pub Dt:
|
05/31/2007
| | | | |
|
Title:
|
NON-VOLATILE MEMORY
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12010827
|
Filing Dt:
|
01/30/2008
|
|
Publication #:
|
|
Pub Dt:
|
05/29/2008
| | | | |
|
Title:
|
Flash memory structure and method for fabricating the same
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12111980
|
Filing Dt:
|
04/30/2008
|
|
Publication #:
|
|
Pub Dt:
|
09/25/2008
| | | | |
|
Title:
|
MANUFACTURING METHOD OF DYNAMIC RANDOM ACCESS MEMORY
|
|
