Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 022917/0177 | |
| Pages: | 6 |
| | Recorded: | 07/07/2009 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
6
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Patent #:
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Issue Dt:
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10/21/1997
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Application #:
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08763282
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Filing Dt:
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12/10/1996
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Title:
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LOCOS METHOD USING ENCAPSULATING POLYSILICON/SILICON NITRIDE SPACER
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Patent #:
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Issue Dt:
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01/20/1998
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Application #:
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08768983
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Filing Dt:
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12/17/1996
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Title:
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LOW POWER DYNAMIC RANDOM ACCESS MEMORY
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Patent #:
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Issue Dt:
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09/23/1997
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Application #:
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08783754
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Filing Dt:
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01/16/1997
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Title:
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DUAL POLY-GATE DEEP SUBMICRON CMOS WITH BURIED CONTACT TECHNOLOGY
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Patent #:
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Issue Dt:
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03/31/1998
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Application #:
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08797840
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Filing Dt:
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02/10/1997
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Title:
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METHOD AND CIRCUIT FOR REDUCING CELL PLATE NOISE
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Patent #:
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Issue Dt:
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12/15/1998
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Application #:
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08881753
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Filing Dt:
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06/24/1997
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Title:
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METHOD FOR FABRICATING A NESTED CAPACITOR
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Patent #:
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Issue Dt:
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03/07/2000
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Application #:
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09172037
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Filing Dt:
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10/14/1998
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Title:
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PROCESS OF FABRICATING PHOTODIODE INTEGRATED WITH MOS DEVICE
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Assignee
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| 2711 CENTERVILLE ROAD, SUITE 400 |
| WILMINGTON, DELAWARE 19808 |
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Correspondence name and address
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TRANSPACIFIC IP LTD.
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RM.1402, 14TH FL., NO. 205, DUNHUA N. RD
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TAIPEI CITY, 105 TAIWAN
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