Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
| Reel/Frame: | 032588/0191 | |
| Pages: | 4 |
| | Recorded: | 04/03/2014 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
|
|
Total properties:
4
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/03/2002
|
Application #:
|
09999246
|
Filing Dt:
|
12/03/2001
|
|
Title:
|
LOW TRIGGERING N MOS TRANSISTOR FOR ESD PROTECTION WORKING UNDER FULLY SILICIDED PROCESS WITHOUT SILICIDE BLOCKS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/07/2004
|
Application #:
|
10200811
|
Filing Dt:
|
07/22/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/05/2003
| | | | |
|
Title:
|
LOW TRIGGERING N MOS TRANSISTOR FOR ELECTROSTATIC DISCHARGE PROTECTION DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/07/2006
|
Application #:
|
10796386
|
Filing Dt:
|
03/09/2004
|
|
Publication #:
|
|
Pub Dt:
|
09/15/2005
| | | | |
|
Title:
|
OUTPUT BUFFER WITH CONTROLLED SLEW RATE FOR DRIVING A RANGE OF CAPACITIVE LOADS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/26/2006
|
Application #:
|
10926488
|
Filing Dt:
|
08/26/2004
|
|
Publication #:
|
|
Pub Dt:
|
02/17/2005
| | | | |
|
Title:
|
LOW TRIGGERING N MOS TRANSISTOR FOR ESD PROTECTION WORKING UNDER FULLY SILICIDED PROCESS WITHOUT SILICIDE BLOCKS
|
|
|
Assignee
|
|
|
|
|
| 1850 N. GREENVILLE AVE. |
| STE. 164 |
| RICHARDSON, TEXAS 75081-1884 |
|
|
Correspondence name and address
|
| |
MARK HARWARD
|
| |
1850 N. GREENVILLE AVE.
|
| |
STE. 164
|
| |
RICHARDSON, TX 75081-1884
|
Search Results as of:
05/30/2024 01:36 PM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
| 
