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Reel/Frame:047103/0206   Pages: 335
Recorded: 09/18/2018
Attorney Dkt #:509265/2114
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 3288
Page 5 of 33
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33
1
Patent #:
Issue Dt:
12/30/2003
Application #:
10197281
Filing Dt:
07/16/2002
Title:
HIGH D.C. VOLTAGE TO LOW D.C. VOLTAGE CIRCUIT CONVERTER
2
Patent #:
Issue Dt:
12/28/2010
Application #:
10198337
Filing Dt:
07/17/2002
Title:
INFINIBAND LAYER 4 ROUTER AND METHODS FOR IMPLEMENTING SAME IN AN INFINIBAND BASED EXTERNAL STORAGE DEVICE
3
Patent #:
Issue Dt:
07/22/2003
Application #:
10201093
Filing Dt:
07/22/2002
Title:
METHOD OF PREVENTING SHIFT OF ALIGNMENT MARKS DURING RAPID THERMAL PROCESSING
4
Patent #:
Issue Dt:
04/19/2005
Application #:
10202077
Filing Dt:
07/23/2002
Publication #:
Pub Dt:
02/06/2003
Title:
PROCESS FOR THE TRANSFER OF DATA
5
Patent #:
Issue Dt:
06/01/2004
Application #:
10205289
Filing Dt:
07/24/2002
Publication #:
Pub Dt:
03/20/2003
Title:
METHOD OF FORMING A SEMICONDUCTOR ARRAY OF FLOATING GATE MEMORY CELLS AND STRAP REGIONS, AND A MEMORY ARRAY AND STRAP REGIONS MADE THEREBY
6
Patent #:
Issue Dt:
01/02/2007
Application #:
10209502
Filing Dt:
07/31/2002
Publication #:
Pub Dt:
02/05/2004
Title:
SINGLE DIE STITCH BONDING
7
Patent #:
Issue Dt:
09/07/2004
Application #:
10209538
Filing Dt:
07/30/2002
Publication #:
Pub Dt:
02/05/2004
Title:
HIGH VOLTAGE PULSE METHOD AND APPARATUS FOR DIGITAL MULTILEVEL NON-VOLATILE MEMORY INTEGRATED SYSTEM
8
Patent #:
Issue Dt:
07/18/2006
Application #:
10210250
Filing Dt:
07/31/2002
Title:
METHOD FOR SNOOPING RAID 1 WRITE TRANSACTIONS BY A STORAGE DEVICE
9
Patent #:
Issue Dt:
03/08/2005
Application #:
10211886
Filing Dt:
08/01/2002
Publication #:
Pub Dt:
03/27/2003
Title:
WIDE DYNAMIC RANGE AND HIGH SPEED VOLTAGE MODE SENSING FOR A MULTILEVEL DIGITAL NON-VOLATILE MEMORY
10
Patent #:
Issue Dt:
09/07/2004
Application #:
10213243
Filing Dt:
08/05/2002
Publication #:
Pub Dt:
02/05/2004
Title:
EMBEDDED RECALL APPARATUS AND METHOD IN NONVOLATILE MEMORY
11
Patent #:
Issue Dt:
10/24/2006
Application #:
10226587
Filing Dt:
08/23/2002
Title:
SYSTEM AND METHOD FOR FREQUENCY AND PHASE MODULATING DATA ON A SCSI BUS OR A SERIAL SCSI LINK
12
Patent #:
Issue Dt:
02/10/2004
Application #:
10227061
Filing Dt:
08/22/2002
Title:
NANOCRYSTAL ELECTRON DEVICE
13
Patent #:
Issue Dt:
09/09/2008
Application #:
10227453
Filing Dt:
08/26/2002
Title:
EFFICIENT VIRTUAL CONCATENATION DATAPATH FOR SONET/SDH
14
Patent #:
Issue Dt:
06/01/2004
Application #:
10232636
Filing Dt:
08/30/2002
Publication #:
Pub Dt:
03/04/2004
Title:
POWER-ON RESET CIRCUIT
15
Patent #:
Issue Dt:
08/19/2008
Application #:
10232961
Filing Dt:
08/30/2002
Publication #:
Pub Dt:
05/22/2003
Title:
DIFFERENTIAL DELAY COMPENSATION
16
Patent #:
Issue Dt:
05/25/2010
Application #:
10232962
Filing Dt:
08/30/2002
Title:
RECEIVE VIRTUAL CONCATENATION PROCESSOR
17
Patent #:
Issue Dt:
07/01/2008
Application #:
10233306
Filing Dt:
08/30/2002
Title:
DATA FORMAT CONVERSION FOR VIRTUAL CONCATENATION PROCESSING
18
Patent #:
Issue Dt:
07/24/2007
Application #:
10235389
Filing Dt:
09/05/2002
Publication #:
Pub Dt:
10/14/2004
Title:
COMPENSATION OF I-Q IMBALANCE IN DIGITAL TRANSCEIVERS
19
Patent #:
Issue Dt:
09/23/2003
Application #:
10236670
Filing Dt:
09/06/2002
Publication #:
Pub Dt:
01/16/2003
Title:
METHOD OF FABRICATING A SELF-ALIGNED NON-VOLATILE MEMORY CELL
20
Patent #:
Issue Dt:
12/09/2008
Application #:
10238757
Filing Dt:
09/10/2002
Publication #:
Pub Dt:
03/11/2004
Title:
PROGRAMMABLE SERIAL INTERFACE FOR A SEMICONDUCTOR CIRCUIT
21
Patent #:
Issue Dt:
04/26/2005
Application #:
10241266
Filing Dt:
09/10/2002
Publication #:
Pub Dt:
03/11/2004
Title:
DIFFERENTIAL SENSE AMPLIFIER FOR MULTILEVEL NON-VOLATILE MEMORY
22
Patent #:
Issue Dt:
05/02/2006
Application #:
10241442
Filing Dt:
09/10/2002
Publication #:
Pub Dt:
03/11/2004
Title:
HIGH SPEED AND HIGH PRECISION SENSING FOR DIGITAL MULTILEVEL NON-VOLATILE MEMORY SYSTEM
23
Patent #:
Issue Dt:
10/19/2004
Application #:
10242880
Filing Dt:
09/12/2002
Publication #:
Pub Dt:
03/27/2003
Title:
METHOD FOR GENERATING A TIME-LIMITED SIGNAL
24
Patent #:
Issue Dt:
01/04/2005
Application #:
10246196
Filing Dt:
09/17/2002
Publication #:
Pub Dt:
03/18/2004
Title:
USER IDENTIFICATION FOR MULTI-PURPOSE FLASH MEMORY
25
Patent #:
Issue Dt:
03/02/2004
Application #:
10246882
Filing Dt:
09/18/2002
Title:
HYBRID TRENCH ISOLATION TECHNOLOGY FOR HIGH VOLTAGE ISOLATION USING THIN FIELD OXIDE IN A SEMICONDUCTOR PROCESS
26
Patent #:
Issue Dt:
06/29/2004
Application #:
10247400
Filing Dt:
09/18/2002
Publication #:
Pub Dt:
03/18/2004
Title:
METHOD FOR FORMING A SUBLITHOGRAPHIC OPENING IN A SEMICONDUCTOR PROCESS
27
Patent #:
Issue Dt:
07/01/2008
Application #:
10251401
Filing Dt:
09/20/2002
Publication #:
Pub Dt:
03/25/2004
Title:
SECURE MEMORY DEVICE FOR SMART CARDS
28
Patent #:
Issue Dt:
04/26/2005
Application #:
10251664
Filing Dt:
09/19/2002
Publication #:
Pub Dt:
03/25/2004
Title:
SELF-ALIGNED SPLIT-GATE NAND FLASH MEMORY AND FABRICATION PROCESS
29
Patent #:
Issue Dt:
01/20/2004
Application #:
10263066
Filing Dt:
10/01/2002
Title:
DETECTION OF FREQUENCY DIFFERENCES BETWEEN SIGNALS
30
Patent #:
Issue Dt:
01/25/2005
Application #:
10263422
Filing Dt:
10/02/2002
Publication #:
Pub Dt:
04/22/2004
Title:
DISK ARRAY FAULT TOLERANT METHOD AND SYSTEM USING TWO-DEMENSIONAL PARITY
31
Patent #:
Issue Dt:
06/08/2004
Application #:
10267014
Filing Dt:
10/07/2002
Publication #:
Pub Dt:
04/08/2004
Title:
FLASH MEMORY CELLS WITH SEPARATED SELF-ALIGNED SELECT AND ERASE GATES, AND PROCESS OF FABRICATION
32
Patent #:
Issue Dt:
03/02/2004
Application #:
10267339
Filing Dt:
10/09/2002
Publication #:
Pub Dt:
02/06/2003
Title:
SENSE AMPLIFIER WITH CONFIGURABLE VOLTAGE SWING CONTROL
33
Patent #:
Issue Dt:
03/23/2004
Application #:
10267354
Filing Dt:
10/09/2002
Publication #:
Pub Dt:
03/06/2003
Title:
METHOD FOR FABRICATION OF A HIGH CAPACITANCE INTERPOLY DIELECTRIC
34
Patent #:
Issue Dt:
12/16/2003
Application #:
10268274
Filing Dt:
10/09/2002
Publication #:
Pub Dt:
02/20/2003
Title:
POWER MOS DEVICE WITH ASYMMETRICAL CHANNEL STRUCTURE FOR ENHANCED LINEAR OPERATION CAPABILITY
35
Patent #:
Issue Dt:
12/07/2004
Application #:
10278294
Filing Dt:
10/22/2002
Publication #:
Pub Dt:
05/06/2004
Title:
METHOD OF FORMING SHALLOW TRENCH ISOLATION STRUCTURE IN A SEMICONDUCTOR DEVICE
36
Patent #:
Issue Dt:
10/12/2004
Application #:
10279735
Filing Dt:
10/24/2002
Publication #:
Pub Dt:
04/24/2003
Title:
POWER SUPPLY CONTROLLER FOR ELECTRONIC CIRCUITS, COMPONENTS AND CORRESPONDING DEVICES
37
Patent #:
Issue Dt:
04/04/2006
Application #:
10280955
Filing Dt:
10/25/2002
Title:
HOST ADAPTER INTEGRATED DATA FIFO AND DATA CACHE AND METHOD FOR IMPROVED HOST ADAPTER SOURCING LATENCY
38
Patent #:
Issue Dt:
08/24/2004
Application #:
10283395
Filing Dt:
10/28/2002
Publication #:
Pub Dt:
04/29/2004
Title:
AC/DC CASCADED POWER CONVERTERS HAVING HIGH DC CONVERSION RATIO AND IMPROVED AC LINE HARMONICS
39
Patent #:
Issue Dt:
10/19/2004
Application #:
10286605
Filing Dt:
11/01/2002
Publication #:
Pub Dt:
05/06/2004
Title:
METHOD AND APPARATUS FOR VIRTUALLY PARTITIONING AN INTEGRATED MULTILEVEL NONVOLATILE MEMORY CIRCUIT
40
Patent #:
Issue Dt:
06/22/2004
Application #:
10288361
Filing Dt:
11/04/2002
Publication #:
Pub Dt:
05/06/2004
Title:
METHOD AND APPARATUS FOR PROGRAMMING AND TESTING A NON-VOLATILE MEMORY CELL FOR STORING MULTIBIT STATES
41
Patent #:
Issue Dt:
04/03/2007
Application #:
10289749
Filing Dt:
11/07/2002
Publication #:
Pub Dt:
05/13/2004
Title:
PACKET-BASED MULTIPLICATION-FREE CCK DEMODULATOR WITH A FAST MULTIPATH INTERFERENCE CIPHER
42
Patent #:
Issue Dt:
09/14/2004
Application #:
10295726
Filing Dt:
11/15/2002
Title:
METHOD AND SYSTEM FOR THREE DISK FAULT TOLERANCE IN A DISK ARRAY
43
Patent #:
Issue Dt:
08/10/2004
Application #:
10295974
Filing Dt:
11/15/2002
Publication #:
Pub Dt:
05/20/2004
Title:
LOW POWER BANDGAP VOLTAGE REFERENCE CIRCUIT
44
Patent #:
Issue Dt:
02/06/2007
Application #:
10299993
Filing Dt:
11/19/2002
Publication #:
Pub Dt:
05/22/2003
Title:
DCDC VOLTAGE CONVERTER OVERLOAD DETECTOR, AND CORRESPONDING COMPONENT AND DEVICE
45
Patent #:
Issue Dt:
03/06/2007
Application #:
10300981
Filing Dt:
11/21/2002
Title:
METHOD AND SYSTEM FOR A DISK FAULT TOLERANCE IN A DISK ARRAY USING ROTATING PARITY
46
Patent #:
Issue Dt:
09/12/2006
Application #:
10301369
Filing Dt:
11/20/2002
Publication #:
Pub Dt:
05/20/2004
Title:
FLEXIBLE DATA TRANSFER TO AND FROM EXTERNAL DEVICE OF SYSTEM-ON-CHIP
47
Patent #:
Issue Dt:
11/09/2004
Application #:
10305735
Filing Dt:
11/27/2002
Publication #:
Pub Dt:
05/27/2004
Title:
METHOD OF UTILIZING A PLURALITY OF VOLTAGE PULSES TO PROGRAM NON-VOLATILE MEMORY ELEMENTS AND RELATED EMBEDDED MEMORIES
48
Patent #:
Issue Dt:
08/10/2004
Application #:
10306571
Filing Dt:
11/27/2002
Publication #:
Pub Dt:
05/27/2004
Title:
METHOD OF UTILIZING VOLTAGE GRADIENTS TO GUIDE DIELECTRIC BREAKDOWNS FOR NON-VOLATILE MEMORY ELEMENTS AND RELATED EMBEDDED MEMORIES
49
Patent #:
Issue Dt:
08/10/2004
Application #:
10306572
Filing Dt:
11/27/2002
Publication #:
Pub Dt:
05/27/2004
Title:
NON-VOLATILE MEMORY ELEMENT INTEGRATABLE WITH STANDARD CMOS CIRCUITRY AND RELATED PROGRAMMING METHODS AND EMBEDDED MEMORIES
50
Patent #:
Issue Dt:
03/22/2005
Application #:
10308248
Filing Dt:
12/02/2002
Publication #:
Pub Dt:
06/05/2003
Title:
INTEGRATED RECEIVING/BACKSCATTERING ARRANGEMENT FOR CONTACTLESS DATA TRANSMISSION
51
Patent #:
Issue Dt:
07/26/2005
Application #:
10308249
Filing Dt:
12/02/2002
Publication #:
Pub Dt:
06/05/2003
Title:
METHOD AND CIRCUIT FOR OBTAINING FIELD STRENGTH INFORMATION
52
Patent #:
Issue Dt:
04/12/2005
Application #:
10310441
Filing Dt:
12/04/2002
Publication #:
Pub Dt:
08/14/2003
Title:
SELF ALIGNED METHOD OF FORMING NON-VOLATILE MEMORY CELLS WITH FLAT WORD LINE
53
Patent #:
Issue Dt:
11/29/2005
Application #:
10310567
Filing Dt:
12/04/2002
Publication #:
Pub Dt:
06/26/2003
Title:
METHOD OF DETECTING A REDIRECTION OR RELAYING OF A CONTACTLESS DATA TRANSMISSION USING AT LEAST TWO SEQUENTIALLY DRIVEN TRANSMITTING ANTENNAS
54
Patent #:
Issue Dt:
12/13/2005
Application #:
10317375
Filing Dt:
12/11/2002
Publication #:
Pub Dt:
08/28/2003
Title:
DIGITAL MULTILEVEL NON-VOLATILE MEMORY SYSTEM
55
Patent #:
Issue Dt:
04/18/2006
Application #:
10317409
Filing Dt:
12/11/2002
Publication #:
Pub Dt:
06/05/2003
Title:
DIGITAL MULTILEVEL MEMORY SYSTEM HAVING MULTISTAGE AUTOZERO SENSING
56
Patent #:
Issue Dt:
11/21/2006
Application #:
10317433
Filing Dt:
12/11/2002
Publication #:
Pub Dt:
06/05/2003
Title:
SUB-VOLT SENSING FOR DIGITAL MULTILEVEL FLASH MEMORY
57
Patent #:
Issue Dt:
10/18/2005
Application #:
10317455
Filing Dt:
12/11/2002
Publication #:
Pub Dt:
06/05/2003
Title:
MULTISTAGE AUTOZERO SENSING FOR A MULTILEVEL NON-VOLATILE MEMORY INTEGRATED CIRCUIT SYSTEM
58
Patent #:
Issue Dt:
08/15/2006
Application #:
10317493
Filing Dt:
12/12/2002
Title:
METHOD AND SYSTEM FOR FOUR DISK FAULT TOLERANCE IN A DISK ARRAY
59
Patent #:
Issue Dt:
01/10/2006
Application #:
10318587
Filing Dt:
12/13/2002
Title:
METHOD AND APPARATUS FOR RELOCATING RAID META DATA
60
Patent #:
Issue Dt:
06/05/2007
Application #:
10321582
Filing Dt:
12/18/2002
Title:
FIFO BUFFER DEPTH ESTIMATION FOR ASYNCHRONOUS GAPPED PAYLOADS
61
Patent #:
Issue Dt:
05/11/2004
Application #:
10323614
Filing Dt:
12/18/2002
Publication #:
Pub Dt:
03/18/2004
Title:
FAST CONTROLLED OUTPUT BUFFER
62
Patent #:
Issue Dt:
05/01/2007
Application #:
10323939
Filing Dt:
12/20/2002
Title:
MULTICAST CONNECTION SCHEDULING IN TIME:SPACE:TIME SWITCHING FABRICS
63
Patent #:
Issue Dt:
07/25/2006
Application #:
10327321
Filing Dt:
12/20/2002
Publication #:
Pub Dt:
06/24/2004
Title:
VERY LOW MOISTURE O-RING AND METHOD FOR PREPARING THE SAME
64
Patent #:
Issue Dt:
12/14/2004
Application #:
10327336
Filing Dt:
12/20/2002
Publication #:
Pub Dt:
06/24/2004
Title:
MULTI-LEVEL MEMORY CELL WITH LATERAL FLOATING SPACERS
65
Patent #:
Issue Dt:
07/20/2004
Application #:
10328525
Filing Dt:
12/24/2002
Publication #:
Pub Dt:
03/25/2004
Title:
APPARATUS AND METHOD FOR DYNAMIC PROGRAM DECOMPRESSION
66
Patent #:
Issue Dt:
12/07/2004
Application #:
10328603
Filing Dt:
12/24/2002
Publication #:
Pub Dt:
03/11/2004
Title:
POWER-ON MANAGEMENT FOR VOLTAGE DOWN-CONVERTER
67
Patent #:
Issue Dt:
09/21/2004
Application #:
10328911
Filing Dt:
12/24/2002
Publication #:
Pub Dt:
03/11/2004
Title:
MODULAR CHARGE PUMP ARCHITECTURE
68
Patent #:
Issue Dt:
05/17/2005
Application #:
10336639
Filing Dt:
01/02/2003
Publication #:
Pub Dt:
07/08/2004
Title:
FLASH MEMORY WITH TRENCH SELECT GATE AND FABRICATION PROCESS
69
Patent #:
Issue Dt:
01/03/2006
Application #:
10339040
Filing Dt:
01/09/2003
Publication #:
Pub Dt:
08/21/2003
Title:
SILICON CARBIDE SEMICONDUCTOR DEVICES WITH A REGROWN CONTACT LAYER
70
Patent #:
Issue Dt:
12/26/2006
Application #:
10339218
Filing Dt:
01/09/2003
Publication #:
Pub Dt:
07/15/2004
Title:
METHOD AND APPARATUS FOR DETECTING AN UNUSED STATE IN A SEMICONDUCTOR CIRCUIT
71
Patent #:
Issue Dt:
09/14/2004
Application #:
10348782
Filing Dt:
01/21/2003
Publication #:
Pub Dt:
07/22/2004
Title:
METHOD FOR COUNTING BEYOND ENDURANCE LIMITATIONS OF NON-VOLATILE MEMORIES
72
Patent #:
Issue Dt:
06/15/2004
Application #:
10351138
Filing Dt:
01/24/2003
Publication #:
Pub Dt:
07/31/2003
Title:
SELF ALIGNED METHOD OF FORMING A SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS WITH FLOATING GATES HAVING MULTIPLE SHARP EDGES, AND A MEMORY ARRAY MADE THEREBY
73
Patent #:
Issue Dt:
07/06/2004
Application #:
10351602
Filing Dt:
01/24/2003
Publication #:
Pub Dt:
02/12/2004
Title:
DISTRIBUTED LEVEL-SHIFTING NETWORK FOR CASCADING BROADBAND AMPLIFIERS
74
Patent #:
Issue Dt:
09/06/2005
Application #:
10352314
Filing Dt:
01/27/2003
Publication #:
Pub Dt:
07/31/2003
Title:
SPLIT-GATE POWER MODULE AND METHOD FOR SUPPRESSING OSCILLATION THEREIN
75
Patent #:
Issue Dt:
04/20/2004
Application #:
10352733
Filing Dt:
01/27/2003
Publication #:
Pub Dt:
04/29/2004
Title:
VARIABLE CHARGE PUMP CIRCUIT WITH DYNAMIC LOAD
76
Patent #:
Issue Dt:
10/12/2004
Application #:
10352734
Filing Dt:
01/27/2003
Publication #:
Pub Dt:
04/22/2004
Title:
FLASH MEMORY ARCHITECTURE WITH PAGE MODE ERASE USING NMOS AND PMOS ROW DECODING SCHEME
77
Patent #:
Issue Dt:
06/10/2008
Application #:
10353298
Filing Dt:
01/28/2003
Publication #:
Pub Dt:
07/17/2003
Title:
METHOD OF TRANSMITTING DATA WITH OPTIMIZED TRANSMISSION RATE USING PACKET HEADER THAT DEFINES DATA ENCODING PARAMETERS
78
Patent #:
Issue Dt:
08/10/2004
Application #:
10356783
Filing Dt:
01/30/2003
Publication #:
Pub Dt:
08/28/2003
Title:
SELF ALIGNED METHOD OF FORMING A SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS WITH CONTROL GATE PROTRUDING PORTIONS
79
Patent #:
Issue Dt:
08/12/2008
Application #:
10358601
Filing Dt:
02/04/2003
Publication #:
Pub Dt:
12/11/2003
Title:
SELF ALIGNED METHOD OF FORMING A SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS WITH BURIED BIT-LINE AND RAISED SOURCE LINE, AND A MEMORY ARRAY MADE THEREBY
80
Patent #:
Issue Dt:
10/04/2005
Application #:
10358623
Filing Dt:
02/04/2003
Publication #:
Pub Dt:
12/04/2003
Title:
SELF-ALIGNED METHOD OF FORMING A SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS WITH BURIED SOURCE LINE AND FLOATING GATE, AND A MEMORY ARRAY MADE THEREBY
81
Patent #:
Issue Dt:
10/31/2006
Application #:
10359618
Filing Dt:
02/07/2003
Title:
LOAD BALANCING MULTICAST CONNECTION SCHEDULING IN 3-STAGE TDM FABRICS
82
Patent #:
Issue Dt:
06/13/2006
Application #:
10365382
Filing Dt:
02/12/2003
Title:
METHOD AND SYSTEM FOR FIVE-DISK FAULT TOLERANCE IN A DISK ARRAY
83
Patent #:
Issue Dt:
05/29/2007
Application #:
10368307
Filing Dt:
02/17/2003
Publication #:
Pub Dt:
10/09/2003
Title:
PROGRAMMABLE POWER SUPPLY AND BROWNOUT DETECTOR FOR ELECTRONIC EQUIPMENT
84
Patent #:
Issue Dt:
01/25/2005
Application #:
10374016
Filing Dt:
02/25/2003
Publication #:
Pub Dt:
08/26/2004
Title:
MULTI-CHANNEL PROGRAMMABLE GAIN AMPLIFIER CONTROLLED WITH A SERIAL INTERFACE
85
Patent #:
Issue Dt:
04/18/2006
Application #:
10376682
Filing Dt:
02/28/2003
Publication #:
Pub Dt:
07/31/2003
Title:
SINGLE CHIP EMBEDDED MICROCONTROLLER HAVING MULTIPLE NON-VOLATILE ERASABLE PROMS SHARING A SINGLE HIGH VOLTAGE GENERATOR
86
Patent #:
Issue Dt:
05/02/2006
Application #:
10376989
Filing Dt:
02/26/2003
Publication #:
Pub Dt:
07/10/2003
Title:
FOLDED CASCODE HIGH VOLTAGE OPERATIONAL AMPLIFIER WITH CLASS AB SOURCE FOLLOWER OUTPUT STAGE
87
Patent #:
Issue Dt:
11/29/2005
Application #:
10378414
Filing Dt:
03/03/2003
Publication #:
Pub Dt:
09/09/2004
Title:
METHOD AND APPARATUS FOR DETECTING EXPOSURE OF A SEMICONDUCTOR CIRCUIT TO ULTRA-VIOLET LIGHT
88
Patent #:
Issue Dt:
06/22/2004
Application #:
10379484
Filing Dt:
03/03/2003
Publication #:
Pub Dt:
06/03/2004
Title:
SYSTEM AND METHOD FOR EXPANDING A PULSE WIDTH
89
Patent #:
Issue Dt:
09/07/2004
Application #:
10382714
Filing Dt:
03/05/2003
Publication #:
Pub Dt:
10/02/2003
Title:
VOLTAGE-LIMITED DISTRIBUTED CURRENT SOURCE FOR ULTRA-BROADBAND IMPEDANCE TERMINATION
90
Patent #:
Issue Dt:
09/26/2006
Application #:
10382756
Filing Dt:
03/05/2003
Publication #:
Pub Dt:
05/13/2004
Title:
LOW-COMPLEXITY JOINT SYMBOL CCK DECODER
91
Patent #:
Issue Dt:
07/20/2004
Application #:
10393583
Filing Dt:
03/20/2003
Title:
LOW POWER IMPLEMENTATION FOR INPUT SIGNALS OF INTEGRATED CIRCUITS
92
Patent #:
Issue Dt:
03/29/2005
Application #:
10393896
Filing Dt:
03/21/2003
Publication #:
Pub Dt:
09/23/2004
Title:
A SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS WITH BURRIED FLOATING GATE AND POINTED CHANNEL REGION
93
Patent #:
Issue Dt:
10/25/2005
Application #:
10394975
Filing Dt:
03/21/2003
Publication #:
Pub Dt:
10/07/2004
Title:
SELF ALIGNED METHOD OF FORMING A SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS WITH BURIED FLOATING GATE, POINTED FLOATING GATE AND POINTED CHANNEL REGION, AND A MEMORY ARRAY MADE THEREBY
94
Patent #:
Issue Dt:
08/10/2004
Application #:
10406917
Filing Dt:
04/04/2003
Publication #:
Pub Dt:
10/09/2003
Title:
METHOD OF FORMING A SEMICONDUCTOR ARRAY OF FLOATING GATE MEMORY CELLS AND STRAP REGIONS
95
Patent #:
Issue Dt:
07/01/2008
Application #:
10407572
Filing Dt:
04/04/2003
Publication #:
Pub Dt:
10/07/2004
Title:
LOW COMPLEXITY SYNCHRONIZATION FOR WIRELESS TRANSMISSION
96
Patent #:
Issue Dt:
12/14/2004
Application #:
10407615
Filing Dt:
04/03/2003
Publication #:
Pub Dt:
03/25/2004
Title:
NEGATIVE CHARGE PUMP WITH BULK BIASING
97
Patent #:
Issue Dt:
10/26/2004
Application #:
10407622
Filing Dt:
04/03/2003
Publication #:
Pub Dt:
03/18/2004
Title:
TEMPERATURE-COMPENSATED CURRENT REFERENCE CIRCUIT
98
Patent #:
Issue Dt:
09/06/2005
Application #:
10407627
Filing Dt:
04/04/2003
Publication #:
Pub Dt:
02/19/2004
Title:
VERTICAL NROM AND METHODS FOR MAKING THEREOF
99
Patent #:
Issue Dt:
10/11/2005
Application #:
10407640
Filing Dt:
04/03/2003
Publication #:
Pub Dt:
03/18/2004
Title:
FAST DYNAMIC MIRROR SENSE AMPLIFIER WITH SEPARATE COMPARISON EQUALIZATION AND EVALUATION PATHS
100
Patent #:
Issue Dt:
08/31/2004
Application #:
10407646
Filing Dt:
04/03/2003
Publication #:
Pub Dt:
03/18/2004
Title:
SYSTEM FOR CONTROLLING THE STAND-BY TO ACTIVE AND ACTIVE TO STAND-BY TRANSITIONS OF A VCC REGULATOR FOR A FLASH MEMORY DEVICE
Assignors
1
Exec Dt:
09/14/2018
2
Exec Dt:
09/14/2018
3
Exec Dt:
09/14/2018
4
Exec Dt:
09/14/2018
5
Exec Dt:
09/14/2018
Assignee
1
333 S. GRAND AVENUE
5TH FLOOR SUITE 5A
LOS ANGELES, CALIFORNIA 90071
Correspondence name and address
ALYSHA SEKHON
425 LEXINGTON AVENUE
NEW YORK, CA 10017

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