Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 021989/0212 | |
| Pages: | 2 |
| | Recorded: | 12/16/2008 | | |
| Attorney Dkt #: | DLGDE-019XX |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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10/07/2014
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Application #:
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12336125
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Filing Dt:
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12/16/2008
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Publication #:
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Pub Dt:
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06/17/2010
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Title:
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SYSTEM AND METHOD FOR HIGH PERFORMANCE SYNCHRONOUS DRAM MEMORY CONTROLLER
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Assignee
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| 9800 CAVENDISH BLVD. |
| 5TH FLOOR |
| MONTREAL, QC, CANADA H4M 2V9 |
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Correspondence name and address
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WEINGARTEN, SCHURGIN, GAGNEBIN & LEBOVIC
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TEN POST OFFICE SQUARE
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BOSTON, MA 02109
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