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Patent #:
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Issue Dt:
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05/14/1991
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Application #:
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07454022
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Filing Dt:
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12/20/1989
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Title:
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MINIATURE CONTROLLED-IMPEDANCE TRANSMISSION LINE CABLE AND METHOD OF MANUFACTURE
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Patent #:
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Issue Dt:
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03/23/1993
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Application #:
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07459083
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Filing Dt:
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12/29/1989
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Title:
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CLUSTER ARCHITECTURE FOR A HIGHLY PARALLEL SCALAR/VECTOR MULRIPROCESSOR SYSTEM
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Patent #:
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Issue Dt:
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05/04/1993
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Application #:
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07535786
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Filing Dt:
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06/11/1990
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Title:
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METHOD AND APPARATUS FOR NON-SEQUENTIAL RESOURCE ACCESS
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Patent #:
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Issue Dt:
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08/20/1991
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Application #:
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07535837
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Filing Dt:
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06/11/1990
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Title:
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VERTICAL SEMICONDUCTOR INTERCONNECTION METHOD AND STRUCTURE
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Patent #:
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Issue Dt:
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10/12/1993
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Application #:
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07535901
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Filing Dt:
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06/11/1990
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Title:
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CONTROL AND MAINTENANCE SUBSYSTEM NETWORK FOR USE WITH A MULTIPROCESSOR COMPUTER SYSTEM
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Patent #:
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Issue Dt:
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12/01/1992
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Application #:
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07536182
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Filing Dt:
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06/11/1990
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Title:
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DISTRIBUTED ARCHITECTURE FOR INPUT/OUTPUT FOR A MULTIPROCESSOR SYSTEM
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Patent #:
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Issue Dt:
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08/24/1993
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Application #:
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07536192
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Filing Dt:
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06/11/1990
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Title:
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DEDICATED CENTRALIZED SIGNALING MECHANISM FOR SELECTIVELY SIGNALING DEVICES IN A MULTIPROCESSOR SYSTEM
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Patent #:
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Issue Dt:
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12/29/1992
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Application #:
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07536197
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Filing Dt:
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06/11/1990
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Title:
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METHOD AND APPARATUS FOR A SPECIAL PURPOSE ARITHMETIC BOOLEAN UNIT
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Patent #:
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Issue Dt:
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11/17/1992
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Application #:
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07536198
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Filing Dt:
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06/11/1990
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Title:
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GLOBAL REGISTERS FOR A MULTIPROCESSOR SYSTEM
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Patent #:
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Issue Dt:
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03/08/1994
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Application #:
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07536270
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Filing Dt:
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06/08/1990
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Title:
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CLOCK DISTRIBUTION APPARATUS AND PROCESSES USING ELECTRICAL AND OPTICAL DELAY LINES PARTICULARLY USEFUL IN MULTIPROCESSOR SYSTEMS
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Patent #:
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Issue Dt:
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10/05/1993
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Application #:
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07536395
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Filing Dt:
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06/11/1990
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Title:
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PACKAGING ARCHITECTURE FOR A HIGHLY PARALLEL MULTIPROCESSOR SYSTEM
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Patent #:
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Issue Dt:
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12/01/1992
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Application #:
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07536417
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Filing Dt:
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06/11/1990
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Title:
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METHOD AND APPARATUS FOR A MULTIPLE REQUEST TOGGLING PRIORITY SYSTEM
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Patent #:
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Issue Dt:
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01/12/1993
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Application #:
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07537466
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Filing Dt:
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06/11/1990
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Title:
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SYSTEM AND METHOD FOR CONTROLLING A HIGHLY PARALLEL MULTIPROCESSOR USING AN ANARCHY BASED SCHEDULER FOR PARALLEL EXECUTION THREAD SCHEDULING
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Patent #:
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Issue Dt:
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10/08/1991
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Application #:
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07568169
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Filing Dt:
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08/16/1990
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Title:
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METHOD AND APPARATUS FOR SINGLE STEP CLOCKING ON SIGNAL PATHS LONGER THAN A CLOCK CYCLE
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Patent #:
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Issue Dt:
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04/13/1993
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Application #:
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07571951
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Filing Dt:
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08/23/1990
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Title:
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SYSTEM FOR COMMUNICATING AMONG PROCESSORS HAVING DIFFERENT SPEEDS
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Patent #:
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Issue Dt:
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12/29/1992
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Application #:
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07572043
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Filing Dt:
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08/23/1990
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Title:
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COMPUTER WITH INTEGRATED HIERARCHICAL REPRSENTATION (IHR) OF PROGRAM WHEREIN IHR FILE IS AVAILABLE FOR DEBUGGING AND OPTIMIZING DURING TARGET EXECUTION
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Patent #:
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Issue Dt:
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10/27/1992
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Application #:
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07572045
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Filing Dt:
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08/23/1990
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Title:
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METHOD FOR EFFICIENT NON-VIRTUAL MAIN MEMORY MANAGEMENT
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Patent #:
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Issue Dt:
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07/18/1995
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Application #:
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07655296
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Filing Dt:
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02/14/1991
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Title:
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SYSTEM FOR DISTRIBUTED MULTIPROCESSOR COMMUNICATION
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Patent #:
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Issue Dt:
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08/25/1992
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Application #:
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07694467
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Filing Dt:
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05/01/1991
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Title:
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TRANSMISSION LINE WITH FLUID-PERMEABLE JACKET
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Patent #:
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Issue Dt:
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03/15/1994
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Application #:
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07708461
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Filing Dt:
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05/31/1991
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Title:
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MEMORY RANGE MONITORING APPARATUS FOR A MULTIPROCESSOR COMPUTER SYSTEM
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Patent #:
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Issue Dt:
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08/28/2001
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Application #:
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07710146
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Filing Dt:
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06/04/1991
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Title:
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METHOD AND APPARATUS FOR MEMORY ACCESS IN A MATRIX PROCESSOR COMPUTER
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Patent #:
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Issue Dt:
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05/18/1993
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Application #:
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07725007
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Filing Dt:
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07/02/1991
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Title:
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METALLIZED CONNECTOR BLOCK
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Patent #:
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Issue Dt:
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03/23/1993
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Application #:
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07747523
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Filing Dt:
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08/20/1991
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Title:
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METHOD OF FABRICATING SILICON-BASED CARRIERS
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Patent #:
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Issue Dt:
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07/06/1993
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Application #:
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07802643
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Filing Dt:
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12/03/1991
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Title:
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A PARALLEL VECTOR PROCESSING SYSTEM FOR INDIVIDUAL AND BRAODCAST DISTRIBUTION OF OPERANDS AND CONTROL INFORMATION
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Patent #:
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Issue Dt:
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07/12/1994
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Application #:
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07803926
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Filing Dt:
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12/09/1991
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Title:
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CLOCK PULSE MEASURING AND DESKEWING SYSTEM AND PROCESS
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Patent #:
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Issue Dt:
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01/11/1994
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Application #:
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07868531
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Filing Dt:
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04/14/1992
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Title:
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MULTILAYER INTERCONNECT SYSTEM FOR AN AREA ARRAY INTERCONNECTION USING SOLID STATE DIFFUSION
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Patent #:
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Issue Dt:
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06/14/1994
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Application #:
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07890026
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Filing Dt:
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05/28/1992
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Title:
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SOLID STATE STORAGE DEVICE
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Patent #:
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Issue Dt:
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03/09/1993
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Application #:
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07898387
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Filing Dt:
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06/10/1992
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Title:
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FAST INTERRUPT MECHANISM FOR A INTERRUPTING PROCESSORS IN PARALLEL IN A MULTIPROCESSOR SYSTEM WHEREIN PROCESSORS ARE ASSIGNED PROCESS ID NUMBERS
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Patent #:
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Issue Dt:
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06/27/1995
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Application #:
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07912964
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Filing Dt:
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07/10/1992
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Title:
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METHOD AND APPARATUS FOR A UNIFIED PARALLEL PROCESSING ARCHITECTURE
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Patent #:
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Issue Dt:
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11/02/1993
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Application #:
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07938715
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Filing Dt:
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09/01/1992
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Title:
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HIGH PERFORMANCE MANTISSA DIVIDER
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Patent #:
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Issue Dt:
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10/11/1994
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Application #:
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07950628
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Filing Dt:
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09/24/1992
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Title:
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CLOCK START UP STABILIZATION FOR COMPUTER SYSTEMS
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Patent #:
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Issue Dt:
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08/16/1994
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Application #:
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07973598
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Filing Dt:
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11/09/1992
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Title:
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DUAL LEVEL SCHEDULING OF PROCESSES TO MULTIPLE PARALLEL REGIONS OF A MULTI-THREADED PROGRAM ON A TIGHTLY COUPLED MULTIPROCESSOR COMPUTER SYSTEM
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Patent #:
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Issue Dt:
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08/30/1994
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Application #:
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07983086
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Filing Dt:
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11/19/1992
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Title:
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APPARATUS FOR COOLING DAUGHTER BOARDS
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Patent #:
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Issue Dt:
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07/02/1996
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Application #:
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07983979
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Filing Dt:
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11/30/1992
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Title:
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DIRECTION ORDER PRIORITY ROUTING OF PACKETS BETWEEN NODES IN A NETWORKED SYSTEM
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Patent #:
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Issue Dt:
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02/27/2001
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Application #:
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08003000
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Filing Dt:
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01/11/1993
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Title:
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METHOD AND APPARATUS FOR USER SIDE SCHEDULING IN A MULTIPROCESSOR OPERATING SYSTEM PROGRAM THAT IMPLEMENTS DISTRIBUTIVE SCHEDULING OF PROCESSES
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Patent #:
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Issue Dt:
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02/14/1995
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Application #:
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08016430
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Filing Dt:
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02/11/1993
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Title:
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CONTROL SYSTEM AND METHOD FOR DIRECT EXECUTION OF SOFTWARE APPLICATION INFORMATION MODELS WITHOUT CODE GENERATION
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Patent #:
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Issue Dt:
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07/16/1996
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Application #:
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08027049
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Filing Dt:
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03/05/1993
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Title:
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OPTICAL CLOCK DISTRIBUTION SYSTEM
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Patent #:
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Issue Dt:
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01/25/1994
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Application #:
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08056650
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Filing Dt:
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05/03/1993
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Title:
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PRINTED CIRCUIT BOARD WITH COOLING MONITORING SYSTEM
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Patent #:
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Issue Dt:
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11/22/1994
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Application #:
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08129437
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Filing Dt:
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09/30/1993
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Title:
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MULTIPROCESSING SYSTEM USING INDIRECT ADDRESSING TO ACCESS RESPECTIVE LOCAL SEMAPHORE REGISTERS BITS FOR SETTING THE BIT OR BRANCHING IF THE BIT IS SET
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Patent #:
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Issue Dt:
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07/09/1996
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Application #:
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08141259
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Filing Dt:
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10/22/1993
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Title:
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METHOD AND APPARATUS FOR LOCKING SHARED MEMORY LOCATIONS IN MULTIPROCESSING SYSTEMS
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Patent #:
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Issue Dt:
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02/21/1995
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Application #:
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08149967
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Filing Dt:
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11/10/1993
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Title:
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CONFIGURABLE SPARE MEMORY CHIPS
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Patent #:
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Issue Dt:
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06/09/1998
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Application #:
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08165118
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Filing Dt:
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12/10/1993
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Title:
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SYSTEM AND METHOD OF ADDRESSING DISTRIBUTED MEMORY WITHIN A MASSIVELY PARALLEL PROCESSING SYSTEM
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Patent #:
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Issue Dt:
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07/18/1995
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Application #:
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08165265
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Filing Dt:
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12/10/1993
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Title:
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BARRIER SYNCHRONIZATION FOR DISTRIBUTED MEMORY MASSIVELY PARALLEL PROCESSING SYSTEMS
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Patent #:
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Issue Dt:
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12/10/1996
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Application #:
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08165266
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Filing Dt:
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12/10/1993
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Title:
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SYSTEM FOR ALLOCATING MESSAGES BETWEEN VIRTUAL CHANNELS TO AVOID DEADLOCK AND TO OPTIMIZE THE AMOUNT OF MESSAGE TRAFFIC ON EACH TYPE OF VIRTUAL CHANNEL
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Patent #:
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Issue Dt:
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12/17/1996
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Application #:
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08165379
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Filing Dt:
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12/10/1993
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Title:
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METHOD FOR THE DYNAMIC ALLOCATION OF ARRAY SIZES IN A MULTIPROCESSOR SYSTEM
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Patent #:
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Issue Dt:
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12/09/1997
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Application #:
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08165388
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Filing Dt:
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12/10/1993
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Title:
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RECURSIVE ADDRESS CENTRIFUGE FOR DISTRIBUTED MEMORY MASSIVELY PARALLEL PROCESSING SYSTEMS
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Patent #:
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Issue Dt:
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05/23/1995
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Application #:
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08165747
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Filing Dt:
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12/10/1993
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Title:
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REPETITIVE SIGNAL DETECTOR FOR PREVENTING THERMAL RUNAWAY
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Patent #:
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Issue Dt:
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07/21/1998
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Application #:
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08165814
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Filing Dt:
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12/13/1993
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Title:
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VIRTUAL TO LOGICAL TO PHYSICAL ADDRESS TRANSLATION FOR DISTRIBUTED MEMORY MASSIVELY PARALLEL PROCESSING SYSTEMS
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Patent #:
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Issue Dt:
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10/15/1996
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Application #:
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08166293
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Filing Dt:
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12/13/1993
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Title:
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METHOD OF MANAGING DISTRIBUTED MEMORY WITHIN A MASSIVELY PARALLEL PROCESSING SYSTEM
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Patent #:
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Issue Dt:
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12/03/1996
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Application #:
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08166443
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Filing Dt:
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12/13/1993
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Title:
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MESSAGING FACILITY WITH HARDWARE TAIL POINTER AND SOFTWARE IMPLEMENTED HEAD POINTER MESSAGE QUEUE FOR DISTRIBUTED MEMORY MASSIVELY PARALLEL PROCESSING SYSTEM
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Patent #:
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Issue Dt:
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09/01/1998
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Application #:
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08166451
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Filing Dt:
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12/13/1993
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Title:
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METHOD FOR THE DYNAMIC ALLOCATION OF PAGE SIZES IN VIRTUAL MEMORY
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Patent #:
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Issue Dt:
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10/01/1996
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Application #:
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08268660
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Filing Dt:
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06/29/1994
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Title:
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INTERLEAVED MEMORY ACCESS SYSTEM HAVING VARIABLE-SIZED SEGMENTS LOGICAL ADDRESS SPACES AND MEANS FOR DIVIDING/MAPPING PHYSICAL ADDRESS INTO HIGHER AND LOWER ORDER ADDRESSES
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Patent #:
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Issue Dt:
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04/29/1997
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Application #:
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08331730
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Filing Dt:
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10/31/1994
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Title:
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EXTENDIBLE CLOCK MECHANISM
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Patent #:
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Issue Dt:
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06/02/1998
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Application #:
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08333133
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Filing Dt:
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11/01/1994
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Title:
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STREAM BUFFERS FOR HIGH-PERFORMANCE COMPUTER MEMORY SYSTEMS
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Patent #:
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Issue Dt:
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01/09/2001
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Application #:
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08340238
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Filing Dt:
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11/16/1994
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Title:
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APPARATUS AND METHOD FOR TESTING USING CLOCKED TEST ACCESS PORT CONTROLLER FOR LEVEL SENSITIVE SCAN DESIGNS
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Patent #:
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Issue Dt:
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06/04/1996
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Application #:
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08379123
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Filing Dt:
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01/27/1995
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Title:
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METHOD AND APPARATUS FOR ACCESSING GLOBAL REGISTERS IN A MULTIPROCESSOR SYSTEM
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Patent #:
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Issue Dt:
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01/23/1996
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Application #:
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08406571
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Filing Dt:
|
03/20/1995
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Title:
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BOUNDARY SCAN TESTING USING CLOCKED SIGNAL
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Patent #:
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Issue Dt:
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12/23/1997
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Application #:
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08421566
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Filing Dt:
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04/13/1995
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Title:
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ADAPTIVE ROUTING MECHANISM FOR TORUS INTERCONNECTION NETWORK
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Patent #:
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Issue Dt:
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08/19/1997
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Application #:
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08422072
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Filing Dt:
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04/13/1995
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Title:
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SYSTEM FOR RANDOMLY MODIFYING VIRTUAL CHANNEL ALLOCATION AND ACCEPTING THE RANDOM MODIFICATION BASED ON THE COST FUNCTION
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Patent #:
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Issue Dt:
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02/24/1998
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Application #:
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08450251
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Filing Dt:
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05/25/1995
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Title:
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BARRIER AND EUREKA SYNCHRONIZATION ARCHITECTURE FOR MULTIPROCESSORS
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Patent #:
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Issue Dt:
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11/18/1997
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Application #:
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08541803
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Filing Dt:
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10/10/1995
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Title:
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CONFIGURING OF NETWORKED SYSTEM TO PERMIT REPLACEMENT OF FAILED NODES AND SELECTION OF ALTERNATE PATHS
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Patent #:
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Issue Dt:
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04/25/2000
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Application #:
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08550992
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Filing Dt:
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10/31/1995
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Title:
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VIRTUAL MAINTENANCE NETWORK IN MULTIPROCESSING SYSTEM HAVING A NON- FLOW CONTROLLED VIRTUAL MAINTENANCE CHANNEL
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Patent #:
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Issue Dt:
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06/09/1998
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Application #:
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08595528
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Filing Dt:
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02/01/1996
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Title:
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TRANSPARENT RELOCATION OF REAL MEMORY ADDRESSES IN THE MAIN MEMORY OF A DATA PROCESSOR
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Patent #:
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Issue Dt:
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06/02/1998
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Application #:
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08604839
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Filing Dt:
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02/22/1996
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Title:
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DAUGHTER CARD ASSEMBLY
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Patent #:
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Issue Dt:
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10/23/2001
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Application #:
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08604841
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Filing Dt:
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02/22/1996
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Title:
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AIR OR LIQUID COOLED COMPUTER MODULE COLD PLATE
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Patent #:
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Issue Dt:
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09/01/1998
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Application #:
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08604888
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Filing Dt:
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02/22/1996
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Title:
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METHOD AND APPARATUS FOR COOLING DAUGHTER CARD MODULES
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Patent #:
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Issue Dt:
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09/08/1998
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Application #:
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08604918
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Filing Dt:
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02/22/1996
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Title:
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COOLING CAP METHOD AND APPARATUS FOR TAB PACKAGED INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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06/16/1998
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Application #:
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08605355
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Filing Dt:
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02/22/1996
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Title:
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COOLING APPROACH FOR HIGH POWER INTEGRATED CIRCUITS MOUNTED ON PRINTED CIRCUIT BOARDS
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Patent #:
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Issue Dt:
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01/26/1999
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Application #:
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08614859
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Filing Dt:
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03/13/1996
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Title:
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MASSIVELY PARALLEL PROCESSING SYSTEM USING TWO DATA PATHS: ONE CONNECTING ROUTER CIRCUIT TO THE INTERCONNECT NETWORK AND THE OTHER CONNECTING ROUTER CIRCUIT TO I/O CONTROLLER
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Patent #:
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Issue Dt:
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05/15/2001
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Application #:
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08614860
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Filing Dt:
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03/13/1996
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Title:
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SYSTEM AND METHOD FOR FAULT-TOLERANT TRANSMISSION OF DATA WITHIN A DUAL RING NETWORK
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Patent #:
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Issue Dt:
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11/10/1998
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Application #:
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08615671
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Filing Dt:
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03/13/1996
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Title:
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USING EXTERNAL REGISTERS TO EXTEND MEMORY REFERENCE CAPABILITIES OF A MICROPROCESSOR
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Patent #:
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Issue Dt:
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11/24/1998
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Application #:
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08615694
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Filing Dt:
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03/13/1996
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Title:
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MESSAGING IN DISTRIBUTED MEMORY MULTIPROCESSING SYSTEM HAVING SHELL CIRCUITRY FOR ATOMIC CONTROL OF MESSAGE STORAGE QUEUE'S TAIL POINTER STRUCTURE IN LOCAL MEMORY
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Patent #:
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Issue Dt:
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05/05/1998
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Application #:
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08615700
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Filing Dt:
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03/13/1996
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Title:
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ADAPTIVE CONGESTION CONTROL MECHANISM FOR MODULAR COMPUTER NETWORKS
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Patent #:
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Issue Dt:
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09/08/1998
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Application #:
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08650336
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Filing Dt:
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05/20/1996
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Title:
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RAID-5 PARITY GENERATION AND DATA RECONSTRUCTION
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|
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Patent #:
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Issue Dt:
|
12/02/1997
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Application #:
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08650337
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Filing Dt:
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05/20/1996
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Title:
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METHOD AND APPARATUS FOR ADJUSTING THE POWER SUPPLY VOLTAGE PROVIDED TO A MICROPROCESSOR
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Patent #:
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|
Issue Dt:
|
06/02/1998
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Application #:
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08650630
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Filing Dt:
|
05/20/1996
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Title:
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A SYSTEM FOR ARBITRATING PACKETIZED DATA FROM THE NETWORK TO THE PERIPHERAL RESOURCES AND PRIORITIZING THE DISPATCHING OF PACKETS ONTO THE NETWORK
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|
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Patent #:
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Issue Dt:
|
01/19/1999
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Application #:
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08650632
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Filing Dt:
|
05/20/1996
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Title:
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A RAID SYSTEM USING I/O BUFFER SEGMENT TO TEMPORARY STORE STRIPED AND PARITY DATA AND CONNECTING ALL DISK DRIVES VIA A SINGLE TIME MULTIPLEXED NETWORK
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Patent #:
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Issue Dt:
|
08/18/1998
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Application #:
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08661908
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Filing Dt:
|
06/12/1996
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Title:
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NETWORKED MULTIPROCESSOR SYSTEM WITH GLOBAL DISTRIBUTED MEMORY AND BLOCK TRANSFER ENGINE
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|
|
Patent #:
|
|
Issue Dt:
|
04/07/1998
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Application #:
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08662868
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Filing Dt:
|
06/12/1996
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Title:
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MULTIPROCESSOR COMPUTER SYSTEM WITH INTERLEAVED PROCESSING ELEMENT NODES
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|
|
Patent #:
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|
Issue Dt:
|
05/04/1999
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Application #:
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08673436
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Filing Dt:
|
06/28/1996
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Title:
|
METHOD AND APPARATUS FOR REMOVING POWER-OF-TWO RESTRICTIONS ON DISTRIBUTED ADDRESSING
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|
|
Patent #:
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|
Issue Dt:
|
08/17/1999
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Application #:
|
08706808
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Filing Dt:
|
09/03/1996
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Title:
|
DENSITY DEPENDENT VECTOR MASK OPERATION CONTROL APPARATUS AND METHOD
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|
|
Patent #:
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|
Issue Dt:
|
09/12/2000
|
Application #:
|
08889251
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Filing Dt:
|
07/08/1997
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Title:
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RECURSIVE ADDRESS CENTRIFUGE FOR DISTRIBUTED MEMORY MASSIVELY PARALLEL PROCESSING SYSTEMS
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|
|
Patent #:
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|
Issue Dt:
|
11/16/1999
|
Application #:
|
08920177
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Filing Dt:
|
08/25/1997
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Title:
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PRECISE DETECTION OF ERRORS USING HARDWARE WATCHPOINT MECHANISM
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|
|
Patent #:
|
|
Issue Dt:
|
09/12/2000
|
Application #:
|
08927359
|
Filing Dt:
|
09/09/1997
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Title:
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STOP ALIGN LATERAL MODULE TO MODULE INTERCONNECT
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|
|
Patent #:
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|
Issue Dt:
|
07/06/1999
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Application #:
|
08927507
|
Filing Dt:
|
09/11/1997
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Title:
|
SYSTEM AND METHOD FOR DISTRIBUTED MULTIPROCESSOR COMMUNICATIONS
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|
|
Patent #:
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|
Issue Dt:
|
03/20/2001
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Application #:
|
08931565
|
Filing Dt:
|
09/16/1997
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Title:
|
ADAPTIVE BANDWIDTH SHARING
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|
|
Patent #:
|
|
Issue Dt:
|
11/07/2000
|
Application #:
|
08934973
|
Filing Dt:
|
09/22/1997
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Title:
|
DEMATEABLE, COMPLIANT, AREA ARRAY INTERCONNECT
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|
|
Patent #:
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|
Issue Dt:
|
09/28/1999
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Application #:
|
08935667
|
Filing Dt:
|
09/23/1997
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Title:
|
ADAPTIVE CONGESTION CONTROL MECHANISM FOR MODULAR COMPUTER NETWORKS
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|
|
Patent #:
|
|
Issue Dt:
|
01/25/2000
|
Application #:
|
08971179
|
Filing Dt:
|
11/17/1997
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Title:
|
POROUS METAL HEAT SINK
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|
|
Patent #:
|
|
Issue Dt:
|
10/14/2003
|
Application #:
|
08971184
|
Filing Dt:
|
11/17/1997
|
Title:
|
MULTIPROCESSOR COMPUTER SYSTEM AND METHOD FOR MAINTAINING CACHE COHERENCE UTILIZING A MULTI-DEMENSIONAL CACHE COHERENCE DIRECTORY STRUCTURE
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|
|
Patent #:
|
|
Issue Dt:
|
11/12/2002
|
Application #:
|
08971185
|
Filing Dt:
|
11/17/1997
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Title:
|
SPACIAL DERIVATIVE BUS ENCODER AND DECODER
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|
|
Patent #:
|
|
Issue Dt:
|
10/19/1999
|
Application #:
|
08971587
|
Filing Dt:
|
11/17/1997
|
Title:
|
ROUTER TABLE LOOKUP MECHANISM
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|
|
Patent #:
|
|
Issue Dt:
|
05/08/2001
|
Application #:
|
08971588
|
Filing Dt:
|
11/17/1997
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Title:
|
HYBRID HYPERCUBE/TORUS ARCHITECTURE
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|
|
Patent #:
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|
Issue Dt:
|
08/08/2000
|
Application #:
|
08971591
|
Filing Dt:
|
11/17/1997
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Title:
|
VIRTUAL CHANNEL ASSIGNMENT IN LARGE TORUS SYSTEMS
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|
|
Patent #:
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|
Issue Dt:
|
07/04/2000
|
Application #:
|
08972010
|
Filing Dt:
|
11/17/1997
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Title:
|
SERIALIZED RACE-FREE VIRTUAL BARRIER NETWORK
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|
|
Patent #:
|
|
Issue Dt:
|
06/15/1999
|
Application #:
|
08987948
|
Filing Dt:
|
12/10/1997
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Title:
|
INTERLEAVING MEMORY IN DISTRIBUTED VECTOR ARCHITECTURE MULTIPROCESSOR SYSTEM
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|
|
Patent #:
|
|
Issue Dt:
|
08/31/1999
|
Application #:
|
08988524
|
Filing Dt:
|
12/10/1997
|
Title:
|
DISTRIBUTED VECTOR ARCHITECTURE
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|
|
Patent #:
|
|
Issue Dt:
|
07/03/2001
|
Application #:
|
08991233
|
Filing Dt:
|
12/16/1997
|
Title:
|
MESSAGE BUFFERING FOR A COMPUTER-BASED NETWORK
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|
|
Patent #:
|
|
Issue Dt:
|
02/22/2000
|
Application #:
|
09006449
|
Filing Dt:
|
01/13/1998
|
Title:
|
METHOD OF HANDLING ARBITRARY SIZE MESSAGE QUEUES IN WHICH A MESSAGE IS WRITTEN INTO AN ALIGNED BLOCK OF EXTERNAL REGISTERS WITHIN A PLURALITY OF EXTERNAL REGISTERS
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|
|
Patent #:
|
|
Issue Dt:
|
07/18/2000
|
Application #:
|
09021651
|
Filing Dt:
|
02/10/1998
|
Title:
|
THE FABRICATION OF TEST LOGIC FOR LEVEL SENSITIVE SCAN ON A CIRCUIT
|
|