skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:027727/0212   Pages: 63
Recorded: 02/16/2012
Attorney Dkt #:001361-0010
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 111
Page 1 of 2
Pages: 1 2
1
Patent #:
Issue Dt:
05/14/1991
Application #:
07454022
Filing Dt:
12/20/1989
Title:
MINIATURE CONTROLLED-IMPEDANCE TRANSMISSION LINE CABLE AND METHOD OF MANUFACTURE
2
Patent #:
Issue Dt:
03/23/1993
Application #:
07459083
Filing Dt:
12/29/1989
Title:
CLUSTER ARCHITECTURE FOR A HIGHLY PARALLEL SCALAR/VECTOR MULRIPROCESSOR SYSTEM
3
Patent #:
Issue Dt:
05/04/1993
Application #:
07535786
Filing Dt:
06/11/1990
Title:
METHOD AND APPARATUS FOR NON-SEQUENTIAL RESOURCE ACCESS
4
Patent #:
Issue Dt:
08/20/1991
Application #:
07535837
Filing Dt:
06/11/1990
Title:
VERTICAL SEMICONDUCTOR INTERCONNECTION METHOD AND STRUCTURE
5
Patent #:
Issue Dt:
10/12/1993
Application #:
07535901
Filing Dt:
06/11/1990
Title:
CONTROL AND MAINTENANCE SUBSYSTEM NETWORK FOR USE WITH A MULTIPROCESSOR COMPUTER SYSTEM
6
Patent #:
Issue Dt:
12/01/1992
Application #:
07536182
Filing Dt:
06/11/1990
Title:
DISTRIBUTED ARCHITECTURE FOR INPUT/OUTPUT FOR A MULTIPROCESSOR SYSTEM
7
Patent #:
Issue Dt:
08/24/1993
Application #:
07536192
Filing Dt:
06/11/1990
Title:
DEDICATED CENTRALIZED SIGNALING MECHANISM FOR SELECTIVELY SIGNALING DEVICES IN A MULTIPROCESSOR SYSTEM
8
Patent #:
Issue Dt:
12/29/1992
Application #:
07536197
Filing Dt:
06/11/1990
Title:
METHOD AND APPARATUS FOR A SPECIAL PURPOSE ARITHMETIC BOOLEAN UNIT
9
Patent #:
Issue Dt:
11/17/1992
Application #:
07536198
Filing Dt:
06/11/1990
Title:
GLOBAL REGISTERS FOR A MULTIPROCESSOR SYSTEM
10
Patent #:
Issue Dt:
03/08/1994
Application #:
07536270
Filing Dt:
06/08/1990
Title:
CLOCK DISTRIBUTION APPARATUS AND PROCESSES USING ELECTRICAL AND OPTICAL DELAY LINES PARTICULARLY USEFUL IN MULTIPROCESSOR SYSTEMS
11
Patent #:
Issue Dt:
10/05/1993
Application #:
07536395
Filing Dt:
06/11/1990
Title:
PACKAGING ARCHITECTURE FOR A HIGHLY PARALLEL MULTIPROCESSOR SYSTEM
12
Patent #:
Issue Dt:
12/01/1992
Application #:
07536417
Filing Dt:
06/11/1990
Title:
METHOD AND APPARATUS FOR A MULTIPLE REQUEST TOGGLING PRIORITY SYSTEM
13
Patent #:
Issue Dt:
01/12/1993
Application #:
07537466
Filing Dt:
06/11/1990
Title:
SYSTEM AND METHOD FOR CONTROLLING A HIGHLY PARALLEL MULTIPROCESSOR USING AN ANARCHY BASED SCHEDULER FOR PARALLEL EXECUTION THREAD SCHEDULING
14
Patent #:
Issue Dt:
10/08/1991
Application #:
07568169
Filing Dt:
08/16/1990
Title:
METHOD AND APPARATUS FOR SINGLE STEP CLOCKING ON SIGNAL PATHS LONGER THAN A CLOCK CYCLE
15
Patent #:
Issue Dt:
04/13/1993
Application #:
07571951
Filing Dt:
08/23/1990
Title:
SYSTEM FOR COMMUNICATING AMONG PROCESSORS HAVING DIFFERENT SPEEDS
16
Patent #:
Issue Dt:
12/29/1992
Application #:
07572043
Filing Dt:
08/23/1990
Title:
COMPUTER WITH INTEGRATED HIERARCHICAL REPRSENTATION (IHR) OF PROGRAM WHEREIN IHR FILE IS AVAILABLE FOR DEBUGGING AND OPTIMIZING DURING TARGET EXECUTION
17
Patent #:
Issue Dt:
10/27/1992
Application #:
07572045
Filing Dt:
08/23/1990
Title:
METHOD FOR EFFICIENT NON-VIRTUAL MAIN MEMORY MANAGEMENT
18
Patent #:
Issue Dt:
07/18/1995
Application #:
07655296
Filing Dt:
02/14/1991
Title:
SYSTEM FOR DISTRIBUTED MULTIPROCESSOR COMMUNICATION
19
Patent #:
Issue Dt:
08/25/1992
Application #:
07694467
Filing Dt:
05/01/1991
Title:
TRANSMISSION LINE WITH FLUID-PERMEABLE JACKET
20
Patent #:
Issue Dt:
03/15/1994
Application #:
07708461
Filing Dt:
05/31/1991
Title:
MEMORY RANGE MONITORING APPARATUS FOR A MULTIPROCESSOR COMPUTER SYSTEM
21
Patent #:
Issue Dt:
08/28/2001
Application #:
07710146
Filing Dt:
06/04/1991
Title:
METHOD AND APPARATUS FOR MEMORY ACCESS IN A MATRIX PROCESSOR COMPUTER
22
Patent #:
Issue Dt:
05/18/1993
Application #:
07725007
Filing Dt:
07/02/1991
Title:
METALLIZED CONNECTOR BLOCK
23
Patent #:
Issue Dt:
03/23/1993
Application #:
07747523
Filing Dt:
08/20/1991
Title:
METHOD OF FABRICATING SILICON-BASED CARRIERS
24
Patent #:
Issue Dt:
07/06/1993
Application #:
07802643
Filing Dt:
12/03/1991
Title:
A PARALLEL VECTOR PROCESSING SYSTEM FOR INDIVIDUAL AND BRAODCAST DISTRIBUTION OF OPERANDS AND CONTROL INFORMATION
25
Patent #:
Issue Dt:
07/12/1994
Application #:
07803926
Filing Dt:
12/09/1991
Title:
CLOCK PULSE MEASURING AND DESKEWING SYSTEM AND PROCESS
26
Patent #:
Issue Dt:
01/11/1994
Application #:
07868531
Filing Dt:
04/14/1992
Title:
MULTILAYER INTERCONNECT SYSTEM FOR AN AREA ARRAY INTERCONNECTION USING SOLID STATE DIFFUSION
27
Patent #:
Issue Dt:
06/14/1994
Application #:
07890026
Filing Dt:
05/28/1992
Title:
SOLID STATE STORAGE DEVICE
28
Patent #:
Issue Dt:
03/09/1993
Application #:
07898387
Filing Dt:
06/10/1992
Title:
FAST INTERRUPT MECHANISM FOR A INTERRUPTING PROCESSORS IN PARALLEL IN A MULTIPROCESSOR SYSTEM WHEREIN PROCESSORS ARE ASSIGNED PROCESS ID NUMBERS
29
Patent #:
Issue Dt:
06/27/1995
Application #:
07912964
Filing Dt:
07/10/1992
Title:
METHOD AND APPARATUS FOR A UNIFIED PARALLEL PROCESSING ARCHITECTURE
30
Patent #:
Issue Dt:
11/02/1993
Application #:
07938715
Filing Dt:
09/01/1992
Title:
HIGH PERFORMANCE MANTISSA DIVIDER
31
Patent #:
Issue Dt:
10/11/1994
Application #:
07950628
Filing Dt:
09/24/1992
Title:
CLOCK START UP STABILIZATION FOR COMPUTER SYSTEMS
32
Patent #:
Issue Dt:
08/16/1994
Application #:
07973598
Filing Dt:
11/09/1992
Title:
DUAL LEVEL SCHEDULING OF PROCESSES TO MULTIPLE PARALLEL REGIONS OF A MULTI-THREADED PROGRAM ON A TIGHTLY COUPLED MULTIPROCESSOR COMPUTER SYSTEM
33
Patent #:
Issue Dt:
08/30/1994
Application #:
07983086
Filing Dt:
11/19/1992
Title:
APPARATUS FOR COOLING DAUGHTER BOARDS
34
Patent #:
Issue Dt:
07/02/1996
Application #:
07983979
Filing Dt:
11/30/1992
Title:
DIRECTION ORDER PRIORITY ROUTING OF PACKETS BETWEEN NODES IN A NETWORKED SYSTEM
35
Patent #:
Issue Dt:
02/27/2001
Application #:
08003000
Filing Dt:
01/11/1993
Title:
METHOD AND APPARATUS FOR USER SIDE SCHEDULING IN A MULTIPROCESSOR OPERATING SYSTEM PROGRAM THAT IMPLEMENTS DISTRIBUTIVE SCHEDULING OF PROCESSES
36
Patent #:
Issue Dt:
02/14/1995
Application #:
08016430
Filing Dt:
02/11/1993
Title:
CONTROL SYSTEM AND METHOD FOR DIRECT EXECUTION OF SOFTWARE APPLICATION INFORMATION MODELS WITHOUT CODE GENERATION
37
Patent #:
Issue Dt:
07/16/1996
Application #:
08027049
Filing Dt:
03/05/1993
Title:
OPTICAL CLOCK DISTRIBUTION SYSTEM
38
Patent #:
Issue Dt:
01/25/1994
Application #:
08056650
Filing Dt:
05/03/1993
Title:
PRINTED CIRCUIT BOARD WITH COOLING MONITORING SYSTEM
39
Patent #:
Issue Dt:
11/22/1994
Application #:
08129437
Filing Dt:
09/30/1993
Title:
MULTIPROCESSING SYSTEM USING INDIRECT ADDRESSING TO ACCESS RESPECTIVE LOCAL SEMAPHORE REGISTERS BITS FOR SETTING THE BIT OR BRANCHING IF THE BIT IS SET
40
Patent #:
Issue Dt:
07/09/1996
Application #:
08141259
Filing Dt:
10/22/1993
Title:
METHOD AND APPARATUS FOR LOCKING SHARED MEMORY LOCATIONS IN MULTIPROCESSING SYSTEMS
41
Patent #:
Issue Dt:
02/21/1995
Application #:
08149967
Filing Dt:
11/10/1993
Title:
CONFIGURABLE SPARE MEMORY CHIPS
42
Patent #:
Issue Dt:
06/09/1998
Application #:
08165118
Filing Dt:
12/10/1993
Title:
SYSTEM AND METHOD OF ADDRESSING DISTRIBUTED MEMORY WITHIN A MASSIVELY PARALLEL PROCESSING SYSTEM
43
Patent #:
Issue Dt:
07/18/1995
Application #:
08165265
Filing Dt:
12/10/1993
Title:
BARRIER SYNCHRONIZATION FOR DISTRIBUTED MEMORY MASSIVELY PARALLEL PROCESSING SYSTEMS
44
Patent #:
Issue Dt:
12/10/1996
Application #:
08165266
Filing Dt:
12/10/1993
Title:
SYSTEM FOR ALLOCATING MESSAGES BETWEEN VIRTUAL CHANNELS TO AVOID DEADLOCK AND TO OPTIMIZE THE AMOUNT OF MESSAGE TRAFFIC ON EACH TYPE OF VIRTUAL CHANNEL
45
Patent #:
Issue Dt:
12/17/1996
Application #:
08165379
Filing Dt:
12/10/1993
Title:
METHOD FOR THE DYNAMIC ALLOCATION OF ARRAY SIZES IN A MULTIPROCESSOR SYSTEM
46
Patent #:
Issue Dt:
12/09/1997
Application #:
08165388
Filing Dt:
12/10/1993
Title:
RECURSIVE ADDRESS CENTRIFUGE FOR DISTRIBUTED MEMORY MASSIVELY PARALLEL PROCESSING SYSTEMS
47
Patent #:
Issue Dt:
05/23/1995
Application #:
08165747
Filing Dt:
12/10/1993
Title:
REPETITIVE SIGNAL DETECTOR FOR PREVENTING THERMAL RUNAWAY
48
Patent #:
Issue Dt:
07/21/1998
Application #:
08165814
Filing Dt:
12/13/1993
Title:
VIRTUAL TO LOGICAL TO PHYSICAL ADDRESS TRANSLATION FOR DISTRIBUTED MEMORY MASSIVELY PARALLEL PROCESSING SYSTEMS
49
Patent #:
Issue Dt:
10/15/1996
Application #:
08166293
Filing Dt:
12/13/1993
Title:
METHOD OF MANAGING DISTRIBUTED MEMORY WITHIN A MASSIVELY PARALLEL PROCESSING SYSTEM
50
Patent #:
Issue Dt:
12/03/1996
Application #:
08166443
Filing Dt:
12/13/1993
Title:
MESSAGING FACILITY WITH HARDWARE TAIL POINTER AND SOFTWARE IMPLEMENTED HEAD POINTER MESSAGE QUEUE FOR DISTRIBUTED MEMORY MASSIVELY PARALLEL PROCESSING SYSTEM
51
Patent #:
Issue Dt:
09/01/1998
Application #:
08166451
Filing Dt:
12/13/1993
Title:
METHOD FOR THE DYNAMIC ALLOCATION OF PAGE SIZES IN VIRTUAL MEMORY
52
Patent #:
Issue Dt:
10/01/1996
Application #:
08268660
Filing Dt:
06/29/1994
Title:
INTERLEAVED MEMORY ACCESS SYSTEM HAVING VARIABLE-SIZED SEGMENTS LOGICAL ADDRESS SPACES AND MEANS FOR DIVIDING/MAPPING PHYSICAL ADDRESS INTO HIGHER AND LOWER ORDER ADDRESSES
53
Patent #:
Issue Dt:
04/29/1997
Application #:
08331730
Filing Dt:
10/31/1994
Title:
EXTENDIBLE CLOCK MECHANISM
54
Patent #:
Issue Dt:
06/02/1998
Application #:
08333133
Filing Dt:
11/01/1994
Title:
STREAM BUFFERS FOR HIGH-PERFORMANCE COMPUTER MEMORY SYSTEMS
55
Patent #:
Issue Dt:
01/09/2001
Application #:
08340238
Filing Dt:
11/16/1994
Title:
APPARATUS AND METHOD FOR TESTING USING CLOCKED TEST ACCESS PORT CONTROLLER FOR LEVEL SENSITIVE SCAN DESIGNS
56
Patent #:
Issue Dt:
06/04/1996
Application #:
08379123
Filing Dt:
01/27/1995
Title:
METHOD AND APPARATUS FOR ACCESSING GLOBAL REGISTERS IN A MULTIPROCESSOR SYSTEM
57
Patent #:
Issue Dt:
01/23/1996
Application #:
08406571
Filing Dt:
03/20/1995
Title:
BOUNDARY SCAN TESTING USING CLOCKED SIGNAL
58
Patent #:
Issue Dt:
12/23/1997
Application #:
08421566
Filing Dt:
04/13/1995
Title:
ADAPTIVE ROUTING MECHANISM FOR TORUS INTERCONNECTION NETWORK
59
Patent #:
Issue Dt:
08/19/1997
Application #:
08422072
Filing Dt:
04/13/1995
Title:
SYSTEM FOR RANDOMLY MODIFYING VIRTUAL CHANNEL ALLOCATION AND ACCEPTING THE RANDOM MODIFICATION BASED ON THE COST FUNCTION
60
Patent #:
Issue Dt:
02/24/1998
Application #:
08450251
Filing Dt:
05/25/1995
Title:
BARRIER AND EUREKA SYNCHRONIZATION ARCHITECTURE FOR MULTIPROCESSORS
61
Patent #:
Issue Dt:
11/18/1997
Application #:
08541803
Filing Dt:
10/10/1995
Title:
CONFIGURING OF NETWORKED SYSTEM TO PERMIT REPLACEMENT OF FAILED NODES AND SELECTION OF ALTERNATE PATHS
62
Patent #:
Issue Dt:
04/25/2000
Application #:
08550992
Filing Dt:
10/31/1995
Title:
VIRTUAL MAINTENANCE NETWORK IN MULTIPROCESSING SYSTEM HAVING A NON- FLOW CONTROLLED VIRTUAL MAINTENANCE CHANNEL
63
Patent #:
Issue Dt:
06/09/1998
Application #:
08595528
Filing Dt:
02/01/1996
Title:
TRANSPARENT RELOCATION OF REAL MEMORY ADDRESSES IN THE MAIN MEMORY OF A DATA PROCESSOR
64
Patent #:
Issue Dt:
06/02/1998
Application #:
08604839
Filing Dt:
02/22/1996
Title:
DAUGHTER CARD ASSEMBLY
65
Patent #:
Issue Dt:
10/23/2001
Application #:
08604841
Filing Dt:
02/22/1996
Title:
AIR OR LIQUID COOLED COMPUTER MODULE COLD PLATE
66
Patent #:
Issue Dt:
09/01/1998
Application #:
08604888
Filing Dt:
02/22/1996
Title:
METHOD AND APPARATUS FOR COOLING DAUGHTER CARD MODULES
67
Patent #:
Issue Dt:
09/08/1998
Application #:
08604918
Filing Dt:
02/22/1996
Title:
COOLING CAP METHOD AND APPARATUS FOR TAB PACKAGED INTEGRATED CIRCUITS
68
Patent #:
Issue Dt:
06/16/1998
Application #:
08605355
Filing Dt:
02/22/1996
Title:
COOLING APPROACH FOR HIGH POWER INTEGRATED CIRCUITS MOUNTED ON PRINTED CIRCUIT BOARDS
69
Patent #:
Issue Dt:
01/26/1999
Application #:
08614859
Filing Dt:
03/13/1996
Title:
MASSIVELY PARALLEL PROCESSING SYSTEM USING TWO DATA PATHS: ONE CONNECTING ROUTER CIRCUIT TO THE INTERCONNECT NETWORK AND THE OTHER CONNECTING ROUTER CIRCUIT TO I/O CONTROLLER
70
Patent #:
Issue Dt:
05/15/2001
Application #:
08614860
Filing Dt:
03/13/1996
Title:
SYSTEM AND METHOD FOR FAULT-TOLERANT TRANSMISSION OF DATA WITHIN A DUAL RING NETWORK
71
Patent #:
Issue Dt:
11/10/1998
Application #:
08615671
Filing Dt:
03/13/1996
Title:
USING EXTERNAL REGISTERS TO EXTEND MEMORY REFERENCE CAPABILITIES OF A MICROPROCESSOR
72
Patent #:
Issue Dt:
11/24/1998
Application #:
08615694
Filing Dt:
03/13/1996
Title:
MESSAGING IN DISTRIBUTED MEMORY MULTIPROCESSING SYSTEM HAVING SHELL CIRCUITRY FOR ATOMIC CONTROL OF MESSAGE STORAGE QUEUE'S TAIL POINTER STRUCTURE IN LOCAL MEMORY
73
Patent #:
Issue Dt:
05/05/1998
Application #:
08615700
Filing Dt:
03/13/1996
Title:
ADAPTIVE CONGESTION CONTROL MECHANISM FOR MODULAR COMPUTER NETWORKS
74
Patent #:
Issue Dt:
09/08/1998
Application #:
08650336
Filing Dt:
05/20/1996
Title:
RAID-5 PARITY GENERATION AND DATA RECONSTRUCTION
75
Patent #:
Issue Dt:
12/02/1997
Application #:
08650337
Filing Dt:
05/20/1996
Title:
METHOD AND APPARATUS FOR ADJUSTING THE POWER SUPPLY VOLTAGE PROVIDED TO A MICROPROCESSOR
76
Patent #:
Issue Dt:
06/02/1998
Application #:
08650630
Filing Dt:
05/20/1996
Title:
A SYSTEM FOR ARBITRATING PACKETIZED DATA FROM THE NETWORK TO THE PERIPHERAL RESOURCES AND PRIORITIZING THE DISPATCHING OF PACKETS ONTO THE NETWORK
77
Patent #:
Issue Dt:
01/19/1999
Application #:
08650632
Filing Dt:
05/20/1996
Title:
A RAID SYSTEM USING I/O BUFFER SEGMENT TO TEMPORARY STORE STRIPED AND PARITY DATA AND CONNECTING ALL DISK DRIVES VIA A SINGLE TIME MULTIPLEXED NETWORK
78
Patent #:
Issue Dt:
08/18/1998
Application #:
08661908
Filing Dt:
06/12/1996
Title:
NETWORKED MULTIPROCESSOR SYSTEM WITH GLOBAL DISTRIBUTED MEMORY AND BLOCK TRANSFER ENGINE
79
Patent #:
Issue Dt:
04/07/1998
Application #:
08662868
Filing Dt:
06/12/1996
Title:
MULTIPROCESSOR COMPUTER SYSTEM WITH INTERLEAVED PROCESSING ELEMENT NODES
80
Patent #:
Issue Dt:
05/04/1999
Application #:
08673436
Filing Dt:
06/28/1996
Title:
METHOD AND APPARATUS FOR REMOVING POWER-OF-TWO RESTRICTIONS ON DISTRIBUTED ADDRESSING
81
Patent #:
Issue Dt:
08/17/1999
Application #:
08706808
Filing Dt:
09/03/1996
Title:
DENSITY DEPENDENT VECTOR MASK OPERATION CONTROL APPARATUS AND METHOD
82
Patent #:
Issue Dt:
09/12/2000
Application #:
08889251
Filing Dt:
07/08/1997
Title:
RECURSIVE ADDRESS CENTRIFUGE FOR DISTRIBUTED MEMORY MASSIVELY PARALLEL PROCESSING SYSTEMS
83
Patent #:
Issue Dt:
11/16/1999
Application #:
08920177
Filing Dt:
08/25/1997
Title:
PRECISE DETECTION OF ERRORS USING HARDWARE WATCHPOINT MECHANISM
84
Patent #:
Issue Dt:
09/12/2000
Application #:
08927359
Filing Dt:
09/09/1997
Title:
STOP ALIGN LATERAL MODULE TO MODULE INTERCONNECT
85
Patent #:
Issue Dt:
07/06/1999
Application #:
08927507
Filing Dt:
09/11/1997
Title:
SYSTEM AND METHOD FOR DISTRIBUTED MULTIPROCESSOR COMMUNICATIONS
86
Patent #:
Issue Dt:
03/20/2001
Application #:
08931565
Filing Dt:
09/16/1997
Title:
ADAPTIVE BANDWIDTH SHARING
87
Patent #:
Issue Dt:
11/07/2000
Application #:
08934973
Filing Dt:
09/22/1997
Title:
DEMATEABLE, COMPLIANT, AREA ARRAY INTERCONNECT
88
Patent #:
Issue Dt:
09/28/1999
Application #:
08935667
Filing Dt:
09/23/1997
Title:
ADAPTIVE CONGESTION CONTROL MECHANISM FOR MODULAR COMPUTER NETWORKS
89
Patent #:
Issue Dt:
01/25/2000
Application #:
08971179
Filing Dt:
11/17/1997
Title:
POROUS METAL HEAT SINK
90
Patent #:
Issue Dt:
10/14/2003
Application #:
08971184
Filing Dt:
11/17/1997
Title:
MULTIPROCESSOR COMPUTER SYSTEM AND METHOD FOR MAINTAINING CACHE COHERENCE UTILIZING A MULTI-DEMENSIONAL CACHE COHERENCE DIRECTORY STRUCTURE
91
Patent #:
Issue Dt:
11/12/2002
Application #:
08971185
Filing Dt:
11/17/1997
Title:
SPACIAL DERIVATIVE BUS ENCODER AND DECODER
92
Patent #:
Issue Dt:
10/19/1999
Application #:
08971587
Filing Dt:
11/17/1997
Title:
ROUTER TABLE LOOKUP MECHANISM
93
Patent #:
Issue Dt:
05/08/2001
Application #:
08971588
Filing Dt:
11/17/1997
Title:
HYBRID HYPERCUBE/TORUS ARCHITECTURE
94
Patent #:
Issue Dt:
08/08/2000
Application #:
08971591
Filing Dt:
11/17/1997
Title:
VIRTUAL CHANNEL ASSIGNMENT IN LARGE TORUS SYSTEMS
95
Patent #:
Issue Dt:
07/04/2000
Application #:
08972010
Filing Dt:
11/17/1997
Title:
SERIALIZED RACE-FREE VIRTUAL BARRIER NETWORK
96
Patent #:
Issue Dt:
06/15/1999
Application #:
08987948
Filing Dt:
12/10/1997
Title:
INTERLEAVING MEMORY IN DISTRIBUTED VECTOR ARCHITECTURE MULTIPROCESSOR SYSTEM
97
Patent #:
Issue Dt:
08/31/1999
Application #:
08988524
Filing Dt:
12/10/1997
Title:
DISTRIBUTED VECTOR ARCHITECTURE
98
Patent #:
Issue Dt:
07/03/2001
Application #:
08991233
Filing Dt:
12/16/1997
Title:
MESSAGE BUFFERING FOR A COMPUTER-BASED NETWORK
99
Patent #:
Issue Dt:
02/22/2000
Application #:
09006449
Filing Dt:
01/13/1998
Title:
METHOD OF HANDLING ARBITRARY SIZE MESSAGE QUEUES IN WHICH A MESSAGE IS WRITTEN INTO AN ALIGNED BLOCK OF EXTERNAL REGISTERS WITHIN A PLURALITY OF EXTERNAL REGISTERS
100
Patent #:
Issue Dt:
07/18/2000
Application #:
09021651
Filing Dt:
02/10/1998
Title:
THE FABRICATION OF TEST LOGIC FOR LEVEL SENSITIVE SCAN ON A CIRCUIT
Assignors
1
Exec Dt:
05/08/2009
2
Exec Dt:
02/08/2012
Assignee
1
46600 LANDING PARKWAY
FREMONT, CALIFORNIA 94538-6420
Correspondence name and address
MORGAN LEWIS & BOCKIUS LLP
3000 EL CAMINO REAL, BLDG 2, SUITE 700
PALO ALTO, CA 94306

Search Results as of: 05/31/2024 02:21 AM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT