Patent Assignment Details
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For pending or abandoned applications please consult USPTO staff.
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Reel/Frame: | 042735/0212 | |
| Pages: | 8 |
| | Recorded: | 06/08/2017 | | |
Attorney Dkt #: | STR.018.A1 |
Conveyance: | CORRECTIVE ASSIGNMENT TO CORRECT THE SPELLING OF THE SECOND ASSIGNOR'S NAME PREVIOUSLY RECORDED ON REEL 033592 FRAME 0285. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT OF THE ASSIGNORS INTEREST. |
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Total properties:
1
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Patent #:
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Issue Dt:
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08/08/2017
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Application #:
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14466143
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Filing Dt:
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08/22/2014
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Publication #:
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Pub Dt:
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02/25/2016
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Title:
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NON-VOLATILE, SOLID-STATE MEMORY CONFIGURED TO PERFORM LOGICAL COMBINATION OF TWO OR MORE BLOCKS SHARING SERIES-CONNECTED BIT LINES
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Assignee
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10200 SOUTH DEANZA BOULEVARD |
CUPERTINO, CALIFORNIA 95014 |
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Correspondence name and address
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HOLLINGSWORTH DAVIS
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8000 W. 78TH STREET
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SUITE 450
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MINNEAPOLIS, MN 55439
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