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Reel/Frame:062782/0215   Pages: 7
Recorded: 02/23/2023
Attorney Dkt #:9862-000995-US
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1
1
Patent #:
NONE
Issue Dt:
Application #:
18171550
Filing Dt:
02/20/2023
Publication #:
Pub Dt:
01/25/2024
Title:
MODELING METHOD OF NEURAL NETWORK FOR SIMULATION IN SEMICONDUCTOR DESIGN PROCESS, SIMULATION METHOD IN SEMICONDUCTOR DESIGN PROCESS USING THE SAME, MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE USING THE SAME, AND SEMICONDUCTOR DESIGN SYSTEM PERFORMING THE SAME
Assignors
1
Exec Dt:
02/06/2023
2
Exec Dt:
02/06/2023
3
Exec Dt:
02/06/2023
4
Exec Dt:
02/06/2023
5
Exec Dt:
02/06/2023
6
Exec Dt:
02/06/2023
7
Exec Dt:
02/06/2023
Assignee
1
129, SAMSUNG-RO, YEONGTONG-GU
SUWON-SI, GYEONGGI-DO, KOREA, REPUBLIC OF 16677
Correspondence name and address
HARNESS, DICKEY & PIERCE, P.L.C.
P.O. BOX 8910
RESTON, VA 20195

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