skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:005660/0221   Pages: 9
Recorded: 04/04/1991
Conveyance: RELEASE BY SECURED PARTY, RECORDED AT REEL 5562, FRAME 0082, ON 12-28-90 (SEE RECORD FOR DETAILS).
Total properties: 58
1
Patent #:
Issue Dt:
05/13/1980
Application #:
05631729
Filing Dt:
11/13/1975
Title:
CMOS STRUCTURE AND METHOD UTILIZING RETARDED ELECTRIC FIELD FOR MINIMUM LATCH-UP
2
Patent #:
Issue Dt:
07/17/1979
Application #:
05842683
Filing Dt:
10/17/1977
Title:
CMOS STRUCTURE AND METHOD UTILIZING RETARDED ELECTRIC FIELD FOR MINIMUM LATCH-UP
3
Patent #:
Issue Dt:
05/11/1982
Application #:
06018869
Filing Dt:
03/09/1979
Title:
CARRIER AND TEST SOCKET FOR LEADLESS INTEGRATED CIRCUIT
4
Patent #:
Issue Dt:
06/12/1984
Application #:
06248814
Filing Dt:
03/30/1981
Title:
HIGH VOLTAGE FIELD EFFECT TRANSISTOR
5
Patent #:
Issue Dt:
12/13/1983
Application #:
06371599
Filing Dt:
04/26/1982
Title:
METHOD OF FABRICATING MESA MOSFET USING OVERHANG MASK AND RESULTING STRUCTURE
6
Patent #:
Issue Dt:
07/28/1987
Application #:
06757582
Filing Dt:
07/22/1985
Title:
METHODS FOR FORMING LATERAL AND VERTICAL DMOS TRANSISTORS
7
Patent #:
Issue Dt:
06/16/1987
Application #:
06808575
Filing Dt:
12/13/1985
Title:
POWER SUPPLY HAVING DUAL RAMP CONTROL CIRCUIT
8
Patent #:
Issue Dt:
10/18/1988
Application #:
06808904
Filing Dt:
12/13/1985
Title:
INSULATED GATE TRANSISTOR WITH LATCHING INHIBITED
9
Patent #:
Issue Dt:
08/23/1988
Application #:
06816593
Filing Dt:
01/06/1986
Title:
INTEGRATED BURIED ZENER DIODE AND TEMPERATURE COMPENSATION TRANSISTOR
10
Patent #:
Issue Dt:
01/17/1989
Application #:
06838217
Filing Dt:
03/10/1986
Title:
METHOD FOR MANUFACTURING A POWER MOS TRANSISTOR
11
Patent #:
Issue Dt:
08/30/1988
Application #:
06843454
Filing Dt:
03/24/1986
Title:
METHOD FOR MAKING PLANAR VERTICAL CHANNEL DMOS STRUCTURES
12
Patent #:
Issue Dt:
12/29/1987
Application #:
06871006
Filing Dt:
06/05/1986
Title:
FABRICATION OF DOUBLE DIFFUSED METAL OXIDE SEMICONDUCTOR TRANSISTOR
13
Patent #:
Issue Dt:
11/24/1987
Application #:
06894418
Filing Dt:
08/08/1986
Title:
MANUFACTURE OF TRIMMABLE HIGH VALUE POLYCRYSTALLINE SILICON RESISTOR
14
Patent #:
Issue Dt:
05/02/1989
Application #:
06927882
Filing Dt:
11/06/1986
Title:
IMPLANTATION OF IONS INTO AN INSULATING LAYER TO INCREASE PLANAR PN JUNCTION BREAKDOWN VOLTAGE
15
Patent #:
Issue Dt:
04/25/1989
Application #:
07010924
Filing Dt:
02/05/1987
Title:
METHOD FOR OBTAINING REGIONS OF DIELECTRICALLY ISOLATED SINGLE CRYSTAL SILICON
16
Patent #:
Issue Dt:
01/17/1989
Application #:
07014961
Filing Dt:
02/17/1987
Title:
METHOD AND APPARATUS FOR INCREASING BREAKDOWN OF A PLANAR JUNCTION
17
Patent #:
Issue Dt:
11/22/1988
Application #:
07019085
Filing Dt:
02/26/1987
Title:
METHOD OF FABRICATING A HIGH VOLTAGE SEMICONDUCTOR DEVICE
18
Patent #:
Issue Dt:
08/01/1989
Application #:
07036777
Filing Dt:
04/10/1987
Title:
SWITCH INTERFACE CIRCUIT FOR POWER MOSFET GATE DRIVE CONTROL
19
Patent #:
Issue Dt:
03/07/1989
Application #:
07061352
Filing Dt:
06/11/1987
Title:
POWER DMOS TRANSISTOR WITH HIGH SPEED BODY DIODE
20
Patent #:
Issue Dt:
06/20/1989
Application #:
07074903
Filing Dt:
07/17/1987
Title:
LIMITING SHOOT-THROUGH CURRENT IN A POWER MOSFET HALF-BRIDGE DURING INTRINSIC DIODE RECOVERY
21
Patent #:
Issue Dt:
07/26/1988
Application #:
07084541
Filing Dt:
08/12/1987
Title:
ION IMPLANTATION OF THIN FILM CRSI2 AND SIC RESISTORS
22
Patent #:
Issue Dt:
06/27/1989
Application #:
07088157
Filing Dt:
08/21/1987
Title:
METHOD OF FABRICATING A HIGH VALUE SEMICONDUCTOR RESISTOR
23
Patent #:
Issue Dt:
09/27/1988
Application #:
07089184
Filing Dt:
08/25/1987
Title:
METHOD OF BONDING SEMICONDUCTOR WAFERS
24
Patent #:
Issue Dt:
09/19/1989
Application #:
07095288
Filing Dt:
09/10/1987
Title:
DOPED SIO2 RESISTOR AND METHOD OF FORMING SAME
25
Patent #:
Issue Dt:
12/13/1988
Application #:
07095481
Filing Dt:
09/10/1987
Title:
DENSE VERTICAL J-MOS TRANSISTOR
26
Patent #:
Issue Dt:
05/30/1989
Application #:
07099452
Filing Dt:
09/21/1987
Title:
DUAL-GATE HIGH DENSITY FET
27
Patent #:
Issue Dt:
11/17/1992
Application #:
07107725
Filing Dt:
10/08/1987
Title:
VERTICAL CURRENT FLOW FIELD EFFECT TRANSISTOR
28
Patent #:
Issue Dt:
07/04/1989
Application #:
07115076
Filing Dt:
10/29/1987
Title:
BURIED GATE JFET
29
Patent #:
Issue Dt:
07/25/1989
Application #:
07120343
Filing Dt:
11/13/1987
Title:
METHOD FOR PROVIDING DIELECTRICALLY ISOLATED CIRCUIT
30
Patent #:
Issue Dt:
01/09/1990
Application #:
07120395
Filing Dt:
11/13/1987
Title:
METHOD FOR INCREASING THE PERFORMANCE OF TRENCHED DEVICES AND THE RESULTING STRUCTURE
31
Patent #:
Issue Dt:
12/26/1989
Application #:
07133710
Filing Dt:
12/16/1987
Title:
HIGH VOLTAGE LEVEL SHIFT SEMICONDUCTOR DEVICE
32
Patent #:
Issue Dt:
03/28/1989
Application #:
07138989
Filing Dt:
12/29/1987
Title:
A POWER MOS TRANSISTOR WITH EQUIPOTENTIAL RING
33
Patent #:
Issue Dt:
04/03/1990
Application #:
07138999
Filing Dt:
12/29/1987
Title:
GROOVED DMOS PROCESS WITH VARYING GATE DIELECTRIC THICKNESS
34
Patent #:
Issue Dt:
06/26/1990
Application #:
07141877
Filing Dt:
01/06/1988
Title:
METHOD FOR IMPROVED ALIGNMENT FOR SEMICONDUCTOR DEVICES WITH BURIED LAYERS
35
Patent #:
Issue Dt:
10/30/1990
Application #:
07167617
Filing Dt:
03/14/1988
Title:
TRENCH POWER MOSFET DEVICE
36
Patent #:
Issue Dt:
12/27/1988
Application #:
07195436
Filing Dt:
05/16/1988
Title:
HIGH VOLTAGE DRIFTED-DRAIN MOS TRANSISTOR
37
Patent #:
Issue Dt:
08/17/1993
Application #:
07210959
Filing Dt:
06/24/1988
Title:
LIGHTLY DOPED DRAIN MOSFET WITH REDUCED ON-RESISTANCE
38
Patent #:
Issue Dt:
07/23/1991
Application #:
07235842
Filing Dt:
08/24/1988
Title:
PLANAR VERTICAL CHANNEL DMOS STRUCTURE
39
Patent #:
Issue Dt:
01/23/1990
Application #:
07243166
Filing Dt:
09/08/1988
Title:
VERTICAL DMOS POWER TRANSISTOR WITH AN INTEGRAL OPERATING CONDITION SENSOR
40
Patent #:
Issue Dt:
04/24/1990
Application #:
07246937
Filing Dt:
09/19/1988
Title:
POWER TRANSISTOR WITH INTEGRATED GATE RESISTOR
41
Patent #:
Issue Dt:
10/20/1992
Application #:
07268839
Filing Dt:
11/08/1988
Title:
COMPLEMENTARY, ISOLATED DMOS IC TECHNOLOGY
42
Patent #:
Issue Dt:
10/08/1991
Application #:
07285842
Filing Dt:
12/15/1988
Title:
SELF-ALIGNED LDD LATERAL DMOS TRANSISTOR WITH HIGH-VOLTAGE INTERCONNECT CAPABILITY
43
Patent #:
Issue Dt:
12/10/1991
Application #:
07290546
Filing Dt:
12/27/1988
Title:
TRENCH DMOS POWER TRANSISTOR WITH FIELD-SHAPING BODY PROFILE AND THREE-DIMENSIONAL GEOMETRY
44
Patent #:
Issue Dt:
01/08/1991
Application #:
07292668
Filing Dt:
12/28/1988
Title:
VERTICAL DMOS TRANSISTOR FABRICATION PROCESS
45
Patent #:
Issue Dt:
01/09/1990
Application #:
07313737
Filing Dt:
02/21/1989
Title:
HIGH VALUE SEMICONDUCTOR RESISTOR
46
Patent #:
Issue Dt:
05/29/1990
Application #:
07334806
Filing Dt:
04/05/1989
Title:
RUGGED LATERAL DMOS TRANSISTOR STRUCTURE
47
Patent #:
Issue Dt:
04/10/1990
Application #:
07336619
Filing Dt:
04/07/1989
Title:
METHOD FOR OBTAINING LOW INTERCONNECT RESISTANCE ON A GROOVED SURFACE AND THE RESULTING STRUCTURE
48
Patent #:
Issue Dt:
05/21/1991
Application #:
07340445
Filing Dt:
04/19/1989
Title:
HALL SENSING OF BOND WIRE CURRENT
49
Patent #:
Issue Dt:
09/11/1990
Application #:
07356631
Filing Dt:
05/22/1989
Title:
INTEGRATED CIRCUIT WITH HIGH POWER, VERTICAL OUTPUT TRANSISTOR CAPABILITY
50
Patent #:
Issue Dt:
08/28/1990
Application #:
07406844
Filing Dt:
09/13/1989
Title:
METHOD AND APPARATUS FOR IMPROVING THE ON-VOLTAGE CHARACTERISTICS OF A SEMICONDUCTOR DEVICE
51
Patent #:
Issue Dt:
06/05/1990
Application #:
07420971
Filing Dt:
10/13/1989
Title:
METHOD OF FABRICATING A SHORT-CHANNEL LOW VOLTAGE DMOS TRANSISTOR
52
Patent #:
Issue Dt:
04/28/1992
Application #:
07451518
Filing Dt:
12/15/1989
Title:
MOS TRANSISTOR WITH A CHARGE INDUCED DRAIN EXTENSION
53
Patent #:
Issue Dt:
09/18/1990
Application #:
07453367
Filing Dt:
12/21/1989
Title:
JUNCTION FIELD-EFFECT TRANSISTOR WITH A NOVEL GATE
54
Patent #:
Issue Dt:
07/21/1992
Application #:
07498170
Filing Dt:
03/23/1990
Title:
OPTIMIZATION OF BV AND RDS-ON BY GRADED DOPING IN LDD AND OTHER HIGH VOLTAGE IC
55
Patent #:
Issue Dt:
08/04/1992
Application #:
07597118
Filing Dt:
10/12/1990
Title:
CLOSED CELL TRANSISTOR WITH BUILT-IN VOLTAGE CLAMP
56
Patent #:
Issue Dt:
Application #:
UNAVAILABLE
Filing Dt:
Title:
57
Patent #:
Issue Dt:
Application #:
UNAVAILABLE
Filing Dt:
Title:
58
Patent #:
Issue Dt:
Application #:
UNAVAILABLE
Filing Dt:
Title:
Assignor
1
Exec Dt:
03/20/1991
Assignee
1
Correspondence name and address
O'MELVENY & MYERS
1999 AVE., OF THE STARS
LOS ANGELES, CA 90067-6035

Search Results as of: 06/04/2024 12:03 AM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT