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Reel/Frame:059333/0222   Pages: 299
Recorded: 02/25/2022
Attorney Dkt #:15286.092
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 3288
Page 10 of 33
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33
1
Patent #:
Issue Dt:
07/05/2011
Application #:
11152965
Filing Dt:
06/14/2005
Title:
APPARATUS FOR REAL-TIME ARBITRATION BETWEEN MASTERS AND REQUESTORS AND METHOD FOR OPERATING THE SAME
2
Patent #:
Issue Dt:
07/12/2011
Application #:
11152993
Filing Dt:
06/14/2005
Title:
APPARATUS FOR MASKED ARBITRATION BETWEEN MASTERS AND REQUESTORS AND METHOD FOR OPERATING THE SAME
3
Patent #:
Issue Dt:
01/31/2006
Application #:
11157318
Filing Dt:
06/20/2005
Publication #:
Pub Dt:
10/20/2005
Title:
MULTI-BIT ROM CELL, FOR STORING ONE OF N>4 POSSIBLE STATES AND HAVING BI-DIRECTIONAL READ, AN ARRAY OF SUCH CELLS, AND A METHOD FOR MAKING THE ARRAY
4
Patent #:
Issue Dt:
08/14/2007
Application #:
11160885
Filing Dt:
07/14/2005
Publication #:
Pub Dt:
11/03/2005
Title:
KEYBOARD WITH REDUCED KEYING AMBIGUITY
5
Patent #:
Issue Dt:
06/28/2011
Application #:
11163944
Filing Dt:
11/04/2005
Publication #:
Pub Dt:
02/23/2006
Title:
TOUCH SENSITIVE CONTROL PANEL
6
Patent #:
Issue Dt:
05/26/2009
Application #:
11166882
Filing Dt:
06/24/2005
Publication #:
Pub Dt:
12/08/2005
Title:
SELF-ALIGNED METHOD OF FORMING A SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS WITH BURIED SOURCE LINE AND FLOATING GATE
7
Patent #:
Issue Dt:
09/16/2008
Application #:
11167109
Filing Dt:
06/28/2005
Publication #:
Pub Dt:
11/17/2005
Title:
CYCLIC REDUNDANCY CHECK CIRCUIT FOR USE WITH SELF-SYNCHRONOUS SCRAMBLERS
8
Patent #:
Issue Dt:
04/01/2008
Application #:
11167122
Filing Dt:
06/28/2005
Publication #:
Pub Dt:
11/17/2005
Title:
CYCLIC REDUNDANCY CHECK CIRCUIT FOR USE WITH SELF-SYNCHRONOUS SCRAMBLERS
9
Patent #:
Issue Dt:
08/21/2007
Application #:
11168833
Filing Dt:
06/28/2005
Publication #:
Pub Dt:
12/28/2006
Title:
EFFICIENT CHARGE PUMP FOR A WIDE RANGE OF SUPPLY VOLTAGES
10
Patent #:
Issue Dt:
01/27/2009
Application #:
11170293
Filing Dt:
06/28/2005
Title:
DEQUEUING FROM A HOST ADAPTER TWO-DIMENSIONAL QUEUE
11
Patent #:
Issue Dt:
09/09/2008
Application #:
11176883
Filing Dt:
07/07/2005
Title:
SELF-ALIGNED NON-VOLATILE MEMORY CELL
12
Patent #:
Issue Dt:
04/17/2007
Application #:
11177853
Filing Dt:
07/08/2005
Title:
SYSTEMS AND METHODS FOR TRANSLATION OF SIGNAL LEVELS ACROSS VOLTAGE DOMAINS
13
Patent #:
Issue Dt:
12/29/2009
Application #:
11178713
Filing Dt:
07/11/2005
Publication #:
Pub Dt:
01/11/2007
Title:
HIGH-SPEED INTERFACE FOR HIGH-DENSITY FLASH WITH TWO LEVELS OF PIPELINED CACHE
14
Patent #:
Issue Dt:
02/20/2007
Application #:
11178965
Filing Dt:
07/11/2005
Publication #:
Pub Dt:
01/11/2007
Title:
MEMORY ARCHITECTURE WITH ENHANCED OVER-ERASE TOLERANT CONTROL GATE SCHEME
15
Patent #:
Issue Dt:
11/13/2007
Application #:
11179243
Filing Dt:
07/12/2005
Publication #:
Pub Dt:
01/18/2007
Title:
MEMORY ARCHITECTURE WITH ADVANCED MAIN-BITLINE PARTITIONING CIRCUITRY FOR ENHANCED ERASE/PROGRAM/VERIFY OPERATIONS
16
Patent #:
Issue Dt:
02/06/2007
Application #:
11181222
Filing Dt:
07/13/2005
Publication #:
Pub Dt:
11/10/2005
Title:
METHOD AND APPARATUS FOR CURRENT LIMITATION IN VOLTAGE REGULATORS WITH IMPROVED CIRCUITRY FOR PROVIDING A CONTROL VOLTAGE
17
Patent #:
Issue Dt:
08/07/2007
Application #:
11181231
Filing Dt:
07/14/2005
Publication #:
Pub Dt:
01/26/2006
Title:
CLAMPING CIRCUIT FOR OPERATIONAL AMPLIFIERS
18
Patent #:
Issue Dt:
06/14/2011
Application #:
11182335
Filing Dt:
07/14/2005
Publication #:
Pub Dt:
02/08/2007
Title:
METHOD AND SYSTEM FOR ENCRYPTION-BASED DESIGN OBFUSCATION FOR AN INTEGRATED CIRCUIT
19
Patent #:
Issue Dt:
01/08/2008
Application #:
11182374
Filing Dt:
07/15/2005
Publication #:
Pub Dt:
01/18/2007
Title:
NONVOLATILE SEMICONDUCTOR MEMORY APPARATUS
20
Patent #:
Issue Dt:
10/24/2006
Application #:
11183346
Filing Dt:
07/18/2005
Publication #:
Pub Dt:
09/07/2006
Title:
MULTI-PHASE REALIGNED VOLTAGE-CONTROLLED OSCILLATOR AND PHASE-LOCKED LOOP INCORPORATING THE SAME
21
Patent #:
Issue Dt:
03/06/2007
Application #:
11183640
Filing Dt:
07/18/2005
Publication #:
Pub Dt:
11/10/2005
Title:
HIGH VOLTAGE ESD-PROTECTION STRUCTURE
22
Patent #:
Issue Dt:
05/26/2009
Application #:
11187780
Filing Dt:
07/20/2005
Publication #:
Pub Dt:
06/01/2006
Title:
METHOD AND APPARATUS FOR CONTROLLING OUTPUT CURRENT OF A CASCADED DC/DC CONVERTER
23
Patent #:
Issue Dt:
03/04/2008
Application #:
11187844
Filing Dt:
07/25/2005
Publication #:
Pub Dt:
01/25/2007
Title:
DUAL-BAND ACTIVE FILTER
24
Patent #:
Issue Dt:
06/19/2007
Application #:
11188612
Filing Dt:
07/25/2005
Publication #:
Pub Dt:
01/25/2007
Title:
REDUCTION OF PROGRAMMING TIME IN ELECTRICALLY PROGRAMMABLE DEVICES
25
Patent #:
Issue Dt:
03/25/2008
Application #:
11188921
Filing Dt:
07/25/2005
Publication #:
Pub Dt:
01/25/2007
Title:
METHODS OF FORMING REDUCED ELECTRIC FIELD DMOS USING SELF-ALIGNED TRENCH ISOLATION
26
Patent #:
Issue Dt:
07/08/2008
Application #:
11192187
Filing Dt:
07/29/2005
Publication #:
Pub Dt:
02/02/2006
Title:
METHOD FOR INTEGRATION OF THREE BIPOLAR TRANSISTORS IN A SEMICONDUCTOR BODY, MULTILAYER COMPONENT, AND SEMICONDUCTOR ARRANGEMENT
27
Patent #:
Issue Dt:
10/16/2007
Application #:
11193924
Filing Dt:
07/28/2005
Publication #:
Pub Dt:
12/14/2006
Title:
SYSTEM AND METHOD FOR MATCHING RESISTANCE IN A NON-VOLATILE MEMORY
28
Patent #:
Issue Dt:
02/06/2007
Application #:
11195263
Filing Dt:
08/01/2005
Publication #:
Pub Dt:
02/01/2007
Title:
DIFFERENTIAL AMPLIFIER AND LOW DROP-OUT REGULATOR WITH THEREOF
29
Patent #:
Issue Dt:
09/05/2006
Application #:
11195280
Filing Dt:
08/02/2005
Publication #:
Pub Dt:
03/16/2006
Title:
FIVE-LEVEL FEED-BACK DIGITAL-TO-ANALOG CONVERTER FOR A SWITCHED CAPACITOR SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTER
30
Patent #:
Issue Dt:
01/30/2007
Application #:
11195434
Filing Dt:
08/02/2005
Publication #:
Pub Dt:
12/01/2005
Title:
METHOD AND APPARATUS TO ELIMINATE GALVANIC CORROSION ON COPPER DOPED ALUMINUM BOND PADS ON INTEGRATED CIRCUITS
31
Patent #:
Issue Dt:
11/17/2009
Application #:
11196277
Filing Dt:
08/04/2005
Publication #:
Pub Dt:
02/09/2006
Title:
INTEGRATED CIRCUIT HAVING A PREDEFINED DIELECTRIC STRENGTH
32
Patent #:
Issue Dt:
12/01/2009
Application #:
11196415
Filing Dt:
08/04/2005
Publication #:
Pub Dt:
02/09/2006
Title:
VOLTAGE COMPARATOR UTILIZING VOLTAGE TO CURRENT CONVERSION
33
Patent #:
Issue Dt:
12/15/2009
Application #:
11197358
Filing Dt:
08/05/2005
Publication #:
Pub Dt:
02/09/2006
Title:
SEMICONDUCTOR STRUCTURE
34
Patent #:
Issue Dt:
04/01/2008
Application #:
11198317
Filing Dt:
08/08/2005
Publication #:
Pub Dt:
02/16/2006
Title:
CASCODE, CASCODE CIRCUIT AND METHOD FOR VERTICAL INTEGRATION OF TWO BIPOLAR TRANSISTORS INTO A CASCODE ARRANGEMENT
35
Patent #:
Issue Dt:
02/20/2007
Application #:
11198469
Filing Dt:
08/05/2005
Publication #:
Pub Dt:
02/08/2007
Title:
METHOD OF SENSING AN EEPROM REFERENCE CELL
36
Patent #:
Issue Dt:
01/30/2007
Application #:
11201373
Filing Dt:
08/10/2005
Publication #:
Pub Dt:
01/26/2006
Title:
HIGH VOLTAGE ESD-PROTECTION STRUCTURE
37
Patent #:
Issue Dt:
02/12/2008
Application #:
11203938
Filing Dt:
08/15/2005
Publication #:
Pub Dt:
11/16/2006
Title:
SENSE AMPLIFIER CIRCUIT FOR PARALLEL SENSING OF FOUR CURRENT LEVELS
38
Patent #:
Issue Dt:
12/29/2009
Application #:
11206474
Filing Dt:
08/17/2005
Publication #:
Pub Dt:
02/22/2007
Title:
METHOD AND APPARATUS FOR SYNCHRONIZING DATA BETWEEN DIFFERENT CLOCK DOMAINS IN A MEMORY CONTROLLER
39
Patent #:
Issue Dt:
06/24/2008
Application #:
11207082
Filing Dt:
08/17/2005
Publication #:
Pub Dt:
01/25/2007
Title:
METHOD AND APPARATUS FOR DETERMINING STUCK-AT FAULT LOCATIONS IN CELL CHAINS USING SCAN CHAINS
40
Patent #:
Issue Dt:
05/08/2007
Application #:
11212206
Filing Dt:
08/25/2005
Publication #:
Pub Dt:
03/01/2007
Title:
METHOD AND APPARATUS FOR REDUCING OPERATION DISTURBANCE
41
Patent #:
Issue Dt:
06/12/2007
Application #:
11217250
Filing Dt:
08/31/2005
Publication #:
Pub Dt:
03/01/2007
Title:
REGISTRATION MARK WITHIN AN OVERLAP OF DOPANT REGIONS
42
Patent #:
Issue Dt:
03/15/2011
Application #:
11221008
Filing Dt:
09/07/2005
Publication #:
Pub Dt:
12/07/2006
Title:
OUTPUT LEVEL VOLTAGE REGULATION
43
Patent #:
Issue Dt:
02/03/2009
Application #:
11227884
Filing Dt:
09/15/2005
Publication #:
Pub Dt:
03/15/2007
Title:
PROGRAMMING A DIGITAL PROCESSOR WITH A SINGLE CONNECTION
44
Patent #:
Issue Dt:
02/26/2008
Application #:
11229191
Filing Dt:
09/15/2005
Publication #:
Pub Dt:
03/02/2006
Title:
UNIFIED MULTILEVEL MEMORY SYSTEMS AND METHODS
45
Patent #:
Issue Dt:
08/04/2009
Application #:
11230358
Filing Dt:
09/19/2005
Publication #:
Pub Dt:
11/09/2006
Title:
METHOD AND SYSTEM FOR PROGRAM PULSE GENERATION DURING PROGRAMMING OF NONVOLATILE ELECTRONIC DEVICES
46
Patent #:
Issue Dt:
06/26/2007
Application #:
11231320
Filing Dt:
09/20/2005
Publication #:
Pub Dt:
05/11/2006
Title:
CROSSPOINT SWITCH WITH SWITCH MATRIX MODULE
47
Patent #:
Issue Dt:
01/29/2008
Application #:
11231890
Filing Dt:
09/22/2005
Publication #:
Pub Dt:
05/04/2006
Title:
PLUG CONNECTOR MODULES OF A PLUG CONNECTOR FOR SIMULTANEOUSLY CONNECTING A PLURALITY OF ELECTRICAL CONTACTS
48
Patent #:
Issue Dt:
08/04/2009
Application #:
11233180
Filing Dt:
09/21/2005
Publication #:
Pub Dt:
05/03/2007
Title:
RF POWER TRANSISTOR PACKAGE
49
Patent #:
Issue Dt:
08/03/2010
Application #:
11234623
Filing Dt:
09/22/2005
Title:
AUTOMATIC GENERATORS FOR VERILOG PROGRAMMING
50
Patent #:
Issue Dt:
07/29/2008
Application #:
11235894
Filing Dt:
09/26/2005
Publication #:
Pub Dt:
04/12/2007
Title:
METHOD AND APPARATUS FOR SYSTEMATIC AND RANDOM VARIATION AND MISMATCH COMPENSATION FOR MULTILEVEL FLASH MEMORY OPERATION
51
Patent #:
Issue Dt:
07/28/2009
Application #:
11235901
Filing Dt:
09/26/2005
Publication #:
Pub Dt:
03/29/2007
Title:
FLASH MEMORY ARRAY HAVING CONTROL/DECODE CIRCUITRY FOR DISABLING TOP GATES OF DEFECTIVE MEMORY CELLS
52
Patent #:
Issue Dt:
10/24/2006
Application #:
11236371
Filing Dt:
09/27/2005
Title:
SELECTABLE REAL TIME SAMPLE TRIGGERING FOR A PLURALITY OF INPUTS OF AN ANALOG-TO-DIGITAL CONVERTER
53
Patent #:
Issue Dt:
06/15/2010
Application #:
11237622
Filing Dt:
09/28/2005
Title:
CLOCK AND DATA RECOVERY LOCKING TECHNIQUE FOR LARGE FREQUENCY OFFSETS
54
Patent #:
Issue Dt:
04/15/2008
Application #:
11239791
Filing Dt:
09/29/2005
Publication #:
Pub Dt:
03/29/2007
Title:
BI-DIRECTIONAL READ/PROGRAM NON-VOLATILE FLOATING GATE MEMORY ARRAY, AND METHOD OF FORMATION
55
Patent #:
Issue Dt:
07/22/2008
Application #:
11241582
Filing Dt:
09/30/2005
Publication #:
Pub Dt:
04/05/2007
Title:
WORD LINE VOLTAGE BOOSTING CIRCUIT AND A MEMORY ARRAY INCORPORATING SAME
56
Patent #:
Issue Dt:
07/27/2010
Application #:
11241661
Filing Dt:
09/29/2005
Title:
ASIC FUNCTIONAL SPECIFICATION PARSER
57
Patent #:
Issue Dt:
04/07/2009
Application #:
11243775
Filing Dt:
10/04/2005
Publication #:
Pub Dt:
04/13/2006
Title:
LOW-NOISE ULTRASOUND METHOD AND BEAMFORMER SYSTEM FOR DOPPLER PROCESSING
58
Patent #:
Issue Dt:
09/22/2009
Application #:
11244607
Filing Dt:
10/06/2005
Publication #:
Pub Dt:
04/27/2006
Title:
METHODS AND APPARATUS FOR CIRCULATION TRANSMISSIONS FOR OFDM-BASED MIMO SYSTEMS
59
Patent #:
Issue Dt:
11/03/2009
Application #:
11248633
Filing Dt:
10/11/2005
Publication #:
Pub Dt:
04/12/2007
Title:
ELECTRONIC DEVICE WITH DOPANT DIFFUSION BARRIER AND TUNABLE WORK FUNCTION AND METHODS OF MAKING SAME
60
Patent #:
Issue Dt:
11/04/2008
Application #:
11251721
Filing Dt:
10/17/2005
Publication #:
Pub Dt:
04/19/2007
Title:
ERROR DETECTION AND CORRECTION IN DATA TRANSMISSION PACKETS
61
Patent #:
Issue Dt:
06/26/2007
Application #:
11252180
Filing Dt:
10/17/2005
Publication #:
Pub Dt:
04/19/2007
Title:
ANTIFUSE PROGRAMMING, PROTECTION, AND SENSING DEVICE
62
Patent #:
Issue Dt:
08/10/2010
Application #:
11254359
Filing Dt:
10/20/2005
Publication #:
Pub Dt:
04/27/2006
Title:
SYSTEM AND METHOD FOR PROVIDING 3-DIMENSIONAL JOINT INTERLEAVER AND CIRCULATION TRANSMISSIONS
63
Patent #:
Issue Dt:
07/22/2008
Application #:
11254387
Filing Dt:
10/20/2005
Publication #:
Pub Dt:
05/31/2007
Title:
ELECTROSTATIC DISCHARGE (ESD) PROTECTION STRUCTURE AND A CIRCUIT USING THE SAME
64
Patent #:
Issue Dt:
07/14/2009
Application #:
11254580
Filing Dt:
10/20/2005
Publication #:
Pub Dt:
04/26/2007
Title:
METHOD AND SYSTEM FOR INCORPORATING HIGH VOLTAGE DEVICES IN AN EEPROM
65
Patent #:
Issue Dt:
07/03/2007
Application #:
11255905
Filing Dt:
10/20/2005
Publication #:
Pub Dt:
04/26/2007
Title:
METHOD OF PROGRAMMING A NON-VOLATILE MEMORY CELL
66
Patent #:
Issue Dt:
05/27/2008
Application #:
11260124
Filing Dt:
10/28/2005
Publication #:
Pub Dt:
05/04/2006
Title:
PLANAR MICROWAVE LINE WITH A DIRECTIONAL CHANGE
67
Patent #:
Issue Dt:
02/26/2008
Application #:
11261698
Filing Dt:
10/28/2005
Publication #:
Pub Dt:
05/03/2007
Title:
HIGH VOLTAGE TOLERANT PORT DRIVER
68
Patent #:
Issue Dt:
06/30/2009
Application #:
11265854
Filing Dt:
11/03/2005
Publication #:
Pub Dt:
05/03/2007
Title:
LOW VOLTAGE NON-VOLATILE MEMORY CELL WITH ELECTRICALLY TRANSPARENT CONTROL GATE
69
Patent #:
Issue Dt:
10/13/2009
Application #:
11266210
Filing Dt:
11/04/2005
Publication #:
Pub Dt:
05/11/2006
Title:
SEMICONDUCTOR ARRAY AND METHOD FOR MANUFACTURING A SEMICONDUCTOR ARRAY
70
Patent #:
Issue Dt:
11/27/2007
Application #:
11266501
Filing Dt:
11/03/2005
Publication #:
Pub Dt:
05/03/2007
Title:
COMPACT COLUMN REDUNDANCY CAM ARCHITECTURE FOR CONCURRENT READ AND WRITE OPERATIONS IN MULTI-SEGMENT MEMORY ARRAYS
71
Patent #:
Issue Dt:
11/27/2007
Application #:
11266797
Filing Dt:
11/04/2005
Publication #:
Pub Dt:
05/17/2007
Title:
BANDGAP ENGINEERED MONO-CRYSTALLINE SILICON CAP LAYERS FOR SIGE HBT PERFORMANCE ENHANCEMENT
72
Patent #:
Issue Dt:
10/21/2008
Application #:
11267473
Filing Dt:
11/04/2005
Publication #:
Pub Dt:
05/10/2007
Title:
METHOD AND SYSTEM FOR CONTROLLED OXYGEN INCORPORATION IN COMPOUND SEMICONDUCTOR FILMS FOR DEVICE PERFORMANCE ENHANCEMENT
73
Patent #:
Issue Dt:
01/26/2010
Application #:
11267553
Filing Dt:
11/04/2005
Publication #:
Pub Dt:
05/10/2007
Title:
BANDGAP AND RECOMBINATION ENGINEERED EMITTER LAYERS FOR SIGE HBT PERFORMANCE OPTIMIZATION
74
Patent #:
Issue Dt:
09/10/2013
Application #:
11268008
Filing Dt:
11/07/2005
Publication #:
Pub Dt:
05/10/2007
Title:
ELASTIC SHARED RAM ARRAY INCLUDING CONTIGUOUS INSTRUCTION AND DATA PORTIONS DISTINCT FROM EACH OTHER
75
Patent #:
Issue Dt:
03/11/2008
Application #:
11271094
Filing Dt:
11/10/2005
Publication #:
Pub Dt:
05/10/2007
Title:
SELF-ALIGNED NANOMETER-LEVEL TRANSISTOR DEFINED WITHOUT LITHOGRAPHY
76
Patent #:
Issue Dt:
02/20/2007
Application #:
11272206
Filing Dt:
11/10/2005
Publication #:
Pub Dt:
11/09/2006
Title:
METHOD AND SYSTEM FOR CONFIGURING PARAMETERS FOR FLASH MEMORY
77
Patent #:
Issue Dt:
01/22/2008
Application #:
11273083
Filing Dt:
11/15/2005
Publication #:
Pub Dt:
05/18/2006
Title:
INTEGRATED CIRCUIT AND METHOD FOR MANUFACTURING AN INTEGRATED CIRCUIT ON A SEMICONDUCTOR CHIP
78
Patent #:
Issue Dt:
04/14/2009
Application #:
11278223
Filing Dt:
03/31/2006
Publication #:
Pub Dt:
11/15/2007
Title:
METHOD AND APPARATUS TO TEST THE POWER-ON-RESET TRIP POINT OF AN INTEGRATED CIRCUIT
79
Patent #:
Issue Dt:
10/26/2010
Application #:
11279402
Filing Dt:
04/12/2006
Publication #:
Pub Dt:
08/31/2006
Title:
CAPACITIVE KEYBOARD WITH NON-LOCKING REDUCED KEYING AMBIGUITY
80
Patent #:
Issue Dt:
05/15/2007
Application #:
11281182
Filing Dt:
11/16/2005
Publication #:
Pub Dt:
03/30/2006
Title:
SELF-ALIGNED SPLIT-GATE NAND FLASH MEMORY AND FABRICATION PROCESS
81
Patent #:
Issue Dt:
08/03/2010
Application #:
11281542
Filing Dt:
11/18/2005
Publication #:
Pub Dt:
07/13/2006
Title:
METHOD AND DEVICE FOR DATA TRANSMISSION
82
Patent #:
Issue Dt:
02/27/2007
Application #:
11283195
Filing Dt:
11/18/2005
Publication #:
Pub Dt:
04/06/2006
Title:
HIGH SPEED AND HIGH PRECISION SENSING FOR DIGITAL MULTILEVEL NON-VOLATILE MEMORY SYSTEM
83
Patent #:
Issue Dt:
12/05/2006
Application #:
11284779
Filing Dt:
11/21/2005
Title:
NEGATIVE VOLTAGE REGULATOR
84
Patent #:
Issue Dt:
10/09/2007
Application #:
11284780
Filing Dt:
11/21/2005
Publication #:
Pub Dt:
05/24/2007
Title:
CHARGE PUMP FOR INTERMEDIATE VOLTAGE
85
Patent #:
Issue Dt:
03/04/2008
Application #:
11285089
Filing Dt:
11/21/2005
Publication #:
Pub Dt:
05/24/2007
Title:
ARRAY SOURCE LINE (AVSS) CONTROLLED HIGH VOLTAGE REGULATION FOR PROGRAMMING FLASH OR EE ARRAY
86
Patent #:
Issue Dt:
03/18/2008
Application #:
11285106
Filing Dt:
11/23/2005
Publication #:
Pub Dt:
06/01/2006
Title:
DRIVER CIRCUIT WITH AUTOMATIC OFFSET COMPENSATION OF AN AMPLIFIER AND METHOD FOR OFFSET COMPENSATION OF AN AMPLIFIER OF A DRIVER CIRCUIT
87
Patent #:
Issue Dt:
10/06/2009
Application #:
11288509
Filing Dt:
11/28/2005
Publication #:
Pub Dt:
02/14/2008
Title:
MICROCONTROLLER BASED FLASH MEMORY DIGITAL CONTROLLER SYSTEM
88
Patent #:
Issue Dt:
08/11/2009
Application #:
11288753
Filing Dt:
11/28/2005
Publication #:
Pub Dt:
05/31/2007
Title:
COMMAND DECODER FOR MICROCONTROLLER BASED FLASH MEMORY DIGITAL CONTROLLER SYSTEM
89
Patent #:
Issue Dt:
12/11/2007
Application #:
11291498
Filing Dt:
11/30/2005
Publication #:
Pub Dt:
05/31/2007
Title:
METHOD AND APPARATUS FOR IMPLEMENTING WALKOUT OF DEVICE JUNCTIONS
90
Patent #:
Issue Dt:
03/31/2009
Application #:
11291606
Filing Dt:
11/30/2005
Publication #:
Pub Dt:
05/31/2007
Title:
CIRCUIT TO CONTROL VOLTAGE RAMP RATE
91
Patent #:
Issue Dt:
02/26/2008
Application #:
11295100
Filing Dt:
12/06/2005
Publication #:
Pub Dt:
06/07/2007
Title:
LOW POWER HIGH SIDE CURRENT MONITOR WHICH OPERATES AT HIGH VOLTAGES AND METHOD THEREFOR
92
Patent #:
Issue Dt:
07/06/2010
Application #:
11298155
Filing Dt:
12/09/2005
Publication #:
Pub Dt:
06/14/2007
Title:
STACK UNDERFLOW DEBUG WITH STICKY BASE
93
Patent #:
Issue Dt:
09/06/2011
Application #:
11298697
Filing Dt:
12/12/2005
Publication #:
Pub Dt:
06/15/2006
Title:
METHOD FOR WIRELESS DATA TRANSMISSION
94
Patent #:
Issue Dt:
07/17/2007
Application #:
11301040
Filing Dt:
12/12/2005
Publication #:
Pub Dt:
06/14/2007
Title:
AUTOMATIC ADDRESS TRANSITION DETECTION (ATD) CONTROL FOR REDUCTION OF SENSE AMPLIFIER POWER CONSUMPTION
95
Patent #:
Issue Dt:
12/04/2007
Application #:
11301401
Filing Dt:
12/13/2005
Publication #:
Pub Dt:
07/26/2007
Title:
DOUBLE BYTE SELECT HIGH VOLTAGE LINE FOR EEPROM MEMORY BLOCK
96
Patent #:
Issue Dt:
05/20/2008
Application #:
11301670
Filing Dt:
12/13/2005
Publication #:
Pub Dt:
06/14/2007
Title:
MEMORY USING A SINGLE-NODE DATA, ADDRESS AND CONTROL BUS
97
Patent #:
Issue Dt:
11/10/2009
Application #:
11302228
Filing Dt:
12/14/2005
Publication #:
Pub Dt:
06/15/2006
Title:
POWER SUPPLY CIRCUIT FOR PRODUCING A REFERENCE CURRENT WITH A PRESCRIBABLE TEMPERATURE DEPENDENCE
98
Patent #:
Issue Dt:
12/25/2007
Application #:
11302954
Filing Dt:
12/14/2005
Publication #:
Pub Dt:
08/03/2006
Title:
POWER FAILURE DETECTION CIRCUIT WITH FAST DROP RESPONSE
99
Patent #:
Issue Dt:
11/13/2007
Application #:
11303368
Filing Dt:
12/16/2005
Publication #:
Pub Dt:
06/21/2007
Title:
USE OF RECOVERY TRANSISTORS DURING WRITE OPERATIONS TO PREVENT DISTURBANCE OF UNSELECTED CELLS
100
Patent #:
Issue Dt:
05/24/2011
Application #:
11303398
Filing Dt:
12/16/2005
Publication #:
Pub Dt:
06/21/2007
Title:
FAST SWITCHING BETWEEN TIME DIVISION MULTIPLEXED (TDM) CHANNELS
Assignor
1
Exec Dt:
02/18/2022
Assignees
1
2355 W CHANDLER BLVD
CHANDLER, ARIZONA 85224
2
2355 W CHANDLER BLVD
CHANDLER, ARIZONA 85224
3
2355 W CHANDLER BLVD
CHANDLER, ARIZONA 85224
4
2355 W CHANDLER BLVD
CHANDLER, ARIZONA 85224
5
2355 W CHANDLER BLVD
CHANDLER, ARIZONA 85224
Correspondence name and address
WILSON SONSINI GOODRICH & ROSATI, P.C.
ONE MARKET PLAZA, SPEAR TOWER, SUITE 330
SAN FRANCISCO, CA 94105

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