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Reel/Frame:059333/0222   Pages: 299
Recorded: 02/25/2022
Attorney Dkt #:15286.092
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 3288
Page 7 of 33
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33
1
Patent #:
Issue Dt:
04/17/2007
Application #:
10751210
Filing Dt:
12/31/2003
Publication #:
Pub Dt:
08/12/2004
Title:
MICROCONTROLLER INSTRUCTION SET
2
Patent #:
Issue Dt:
06/14/2005
Application #:
10753273
Filing Dt:
01/07/2004
Publication #:
Pub Dt:
04/07/2005
Title:
HIGH PRECISION DIGITAL-TO-ANALOG CONVERTER WITH OPTIMIZED POWER CONSUMPTION
3
Patent #:
Issue Dt:
09/06/2005
Application #:
10753849
Filing Dt:
01/07/2004
Publication #:
Pub Dt:
08/12/2004
Title:
CIRCUIT ARRANGEMENT AND METHOD FOR DERIVING ELECTRICAL POWER FROM AN ELECTROMAGNETIC FIELD
4
Patent #:
Issue Dt:
12/19/2006
Application #:
10753859
Filing Dt:
01/07/2004
Publication #:
Pub Dt:
07/29/2004
Title:
RECEIVING/BACKSCATTERING ARRANGEMENT AND METHOD WITH TWO MODULATION MODES FOR WIRELESS DATA TRANSMISSION AS WELL AS MODULATION ARRANGEMENT THEREFOR
5
Patent #:
Issue Dt:
07/18/2006
Application #:
10754259
Filing Dt:
01/09/2004
Publication #:
Pub Dt:
07/22/2004
Title:
ANTICOLLISION PROTOCOL WITH FAST READ REQUEST AND ADDITIONAL SCHEMES FOR READING MULTIPLE TRANSPONDERS IN AN RFID SYSTEM
6
Patent #:
Issue Dt:
06/19/2007
Application #:
10755403
Filing Dt:
01/13/2004
Title:
OVERLAPPING JUMPING WINDOW FOR SONET/SDH BIT ERROR RATE MONITORING
7
Patent #:
Issue Dt:
05/10/2005
Application #:
10757830
Filing Dt:
01/13/2004
Publication #:
Pub Dt:
09/23/2004
Title:
METHOD OF PROGRAMMING ELECTRONS ONTO A FLOATING GATE OF A NON-VOLATILE MEMORY CELL
8
Patent #:
Issue Dt:
05/05/2009
Application #:
10758952
Filing Dt:
01/16/2004
Title:
Battery charging and discharging by using a bi-directional transistor
9
Patent #:
Issue Dt:
09/05/2006
Application #:
10760626
Filing Dt:
01/20/2004
Title:
METHOD AND APPARATUS TO SWITCH OPERATING MODES IN A PFM CONVERTER
10
Patent #:
Issue Dt:
09/05/2006
Application #:
10761801
Filing Dt:
01/20/2004
Title:
DUAL-MODE PFM BOOST CONVERTER
11
Patent #:
Issue Dt:
01/25/2005
Application #:
10761876
Filing Dt:
01/21/2004
Title:
VERTICAL GATE CMOS WITH LITHOGRAPHY-INDEPENDENT GATE LENGTH
12
Patent #:
Issue Dt:
12/04/2007
Application #:
10762799
Filing Dt:
01/21/2004
Title:
BOUNDARY SCAN CELL AND METHODS FOR INTEGRATING AND OPERATING THE SAME
13
Patent #:
Issue Dt:
11/29/2005
Application #:
10762807
Filing Dt:
01/21/2004
Publication #:
Pub Dt:
08/05/2004
Title:
METHOD OF PLANARIZING A SEMICONDUCTOR DIE
14
Patent #:
Issue Dt:
03/27/2007
Application #:
10764381
Filing Dt:
01/22/2004
Publication #:
Pub Dt:
08/19/2004
Title:
WIDE DYNAMIC RANGE AND HIGH SPEED VOLTAGE MODE SENSING FOR A MULTILEVEL DIGITAL NON-VOLATILE MEMORY
15
Patent #:
Issue Dt:
07/26/2005
Application #:
10764919
Filing Dt:
01/26/2004
Publication #:
Pub Dt:
12/09/2004
Title:
ULTRA-LOW POWER PROGRAMMABLE TIMER AND LOW VOLTAGE DETECTION CIRCUITS
16
Patent #:
Issue Dt:
10/16/2007
Application #:
10766276
Filing Dt:
01/27/2004
Publication #:
Pub Dt:
08/18/2005
Title:
METHOD AND SYSTEM FOR ROUTING DATA BETWEEN USB PORTS
17
Patent #:
Issue Dt:
06/26/2007
Application #:
10767248
Filing Dt:
01/28/2004
Publication #:
Pub Dt:
07/28/2005
Title:
MULTI-OPERATIONAL AMPLIFIER SYSTEM
18
Patent #:
Issue Dt:
02/17/2009
Application #:
10771268
Filing Dt:
02/03/2004
Title:
METHOD AND APPARATUS FOR PACKET GROOMING AND AGGREGATION
19
Patent #:
Issue Dt:
09/19/2006
Application #:
10773021
Filing Dt:
02/04/2004
Publication #:
Pub Dt:
08/12/2004
Title:
CIRCUIT ARRANGEMENT FOR SIGNAL DETECTION HAVING CURRENT MIRROR WITH CASCODE COUPLED TRANSISTORS
20
Patent #:
Issue Dt:
07/11/2006
Application #:
10776397
Filing Dt:
02/10/2004
Publication #:
Pub Dt:
08/19/2004
Title:
SELF ALIGNED METHOD OF FORMING A SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS WITH BURIED BIT-LINE AND VERTICAL WORD LINE TRANSISTOR
21
Patent #:
Issue Dt:
03/01/2005
Application #:
10779351
Filing Dt:
02/12/2004
Title:
HARDWARE I/O CONTROL BLOCK ARRAY FOR MIRRORED DATA TRANSFERS
22
Patent #:
Issue Dt:
03/22/2005
Application #:
10779416
Filing Dt:
02/12/2004
Title:
METHOD FOR CONFIGURING A SINGLE HARDWARE I/O CONTROL BLOCK ARCHITECTURE FOR USE WITH BOTH MIRRORED AND NON-MIRRORED DATA TRANSFERS
23
Patent #:
Issue Dt:
02/14/2006
Application #:
10785160
Filing Dt:
02/23/2004
Publication #:
Pub Dt:
10/28/2004
Title:
TWIN EEPROM MEMORY TRANSISTORS WITH SUBSURFACE STEPPED FLOATING GATES
24
Patent #:
Issue Dt:
02/21/2006
Application #:
10787387
Filing Dt:
02/26/2004
Publication #:
Pub Dt:
09/01/2005
Title:
LOW CAPACITANCE ESD-PROTECTION STRUCTURE UNDER A BOND PAD
25
Patent #:
Issue Dt:
03/07/2006
Application #:
10788536
Filing Dt:
02/27/2004
Publication #:
Pub Dt:
09/01/2005
Title:
PIN OR NIP LOW CAPACITANCE TRANSIENT VOLTAGE SUPPRESSORS AND STEERING DIODES
26
Patent #:
Issue Dt:
03/04/2008
Application #:
10795027
Filing Dt:
03/04/2004
Publication #:
Pub Dt:
09/08/2005
Title:
METHOD AND APPARATUS OF TEMPERATURE COMPENSATION FOR INTEGRATED CIRCUIT CHIP USING ON-CHIP SENSOR AND COMPUTATION MEANS
27
Patent #:
Issue Dt:
04/15/2008
Application #:
10795183
Filing Dt:
03/03/2004
Title:
METHOD AND APPARATUS FOR HANDLING SAS/SATA COMMUNICATION DEADLOCK
28
Patent #:
Issue Dt:
04/10/2007
Application #:
10796771
Filing Dt:
03/09/2004
Publication #:
Pub Dt:
09/09/2004
Title:
MICROCONTROLLER INSTRUCTION SET
29
Patent #:
Issue Dt:
12/06/2005
Application #:
10797156
Filing Dt:
03/09/2004
Publication #:
Pub Dt:
09/15/2005
Title:
CIRCUIT AND A METHOD TO SCREEN FOR DEFECTS IN AN ADDRESSABLE LINE IN A NON-VOLATILE MEMORY
30
Patent #:
Issue Dt:
05/23/2006
Application #:
10797207
Filing Dt:
03/09/2004
Title:
DIFFERENTIAL NON-VOLATILE CONTENT ADDRESSABLE MEMORY CELL AND ARRAY USING PHASE CHANGING RESISTOR STORAGE ELEMENTS
31
Patent #:
Issue Dt:
12/11/2007
Application #:
10797296
Filing Dt:
03/09/2004
Publication #:
Pub Dt:
12/16/2004
Title:
BURIED BIT LINE NON-VOLATILE FLOATING GATE MEMORY CELL WITH INDEPENDENT CONTROLLABLE CONTROL GATE IN A TRENCH, AND ARRAY THEREOF, AND METHOD OF FORMATION
32
Patent #:
Issue Dt:
02/26/2008
Application #:
10798393
Filing Dt:
03/12/2004
Publication #:
Pub Dt:
09/15/2005
Title:
AUTOMATIC GAIN CONTROL AND ITS CONTROLLING METHOD
33
Patent #:
Issue Dt:
05/13/2008
Application #:
10800048
Filing Dt:
03/11/2004
Title:
ALIGNMENT SIGNAL CONTROL APPARATUS AND METHOD FOR OPERATING THE SAME
34
Patent #:
Issue Dt:
05/16/2006
Application #:
10801435
Filing Dt:
03/15/2004
Publication #:
Pub Dt:
09/15/2005
Title:
SYSTEM, APPARATUS AND METHOD FOR CONTAMINANT REDUCTION IN SEMICONDUCTOR DEVICE FABRICATION EQUIPMENT COMPONENTS
35
Patent #:
Issue Dt:
05/16/2006
Application #:
10802253
Filing Dt:
03/17/2004
Publication #:
Pub Dt:
09/22/2005
Title:
FLASH MEMORY WITH ENHANCED PROGRAM AND ERASE COUPLING AND PROCESS OF FABRICATING THE SAME
36
Patent #:
Issue Dt:
01/31/2006
Application #:
10803183
Filing Dt:
03/17/2004
Publication #:
Pub Dt:
09/22/2005
Title:
SELF-ALIGNED SPLIT-GATE NAND FLASH MEMORY AND FABRICATION PROCESS
37
Patent #:
Issue Dt:
01/06/2009
Application #:
10805441
Filing Dt:
03/22/2004
Title:
MULTI-FUNCTION BYPASS PORT AND PORT BYPASS CIRCUIT
38
Patent #:
Issue Dt:
05/16/2006
Application #:
10806598
Filing Dt:
03/23/2004
Publication #:
Pub Dt:
09/29/2005
Title:
SWITCHED CAPACITOR SIGNAL SCALING CIRCUIT
39
Patent #:
Issue Dt:
01/17/2006
Application #:
10809659
Filing Dt:
03/25/2004
Publication #:
Pub Dt:
09/29/2005
Title:
HIGH VOLTAGE ESD-PROTECTION STRUCTURE
40
Patent #:
Issue Dt:
05/16/2006
Application #:
10810033
Filing Dt:
03/26/2004
Publication #:
Pub Dt:
09/29/2005
Title:
HIGH EFFICIENCY, LOW COST, CHARGE PUMP CIRCUIT
41
Patent #:
Issue Dt:
08/17/2010
Application #:
10810035
Filing Dt:
03/26/2004
Publication #:
Pub Dt:
09/29/2005
Title:
NON-VOLATILE TRANSISTOR MEMORY ARRAY INCORPORATING READ-ONLY ELEMENTS WITH SINGLE MASK SET
42
Patent #:
Issue Dt:
01/02/2007
Application #:
10810271
Filing Dt:
03/26/2004
Publication #:
Pub Dt:
01/13/2005
Title:
METHOD AND APPARATUS FOR IMPROVED HIGH-SPEED FEC ADAPTIVE EQUALIZATION
43
Patent #:
Issue Dt:
02/17/2009
Application #:
10812958
Filing Dt:
03/31/2004
Title:
MEMORY EGRESS SELF SELECTION ARCHITECTURE
44
Patent #:
Issue Dt:
01/09/2007
Application #:
10814443
Filing Dt:
03/30/2004
Publication #:
Pub Dt:
10/06/2005
Title:
METHOD AND APPARATUS FOR COMPENSATING FOR BITLINE LEAKAGE CURRENT
45
Patent #:
Issue Dt:
11/21/2006
Application #:
10814811
Filing Dt:
03/31/2004
Publication #:
Pub Dt:
12/02/2004
Title:
INTEGRATED CIRCUIT DELIVERING LOGIC LEVELS AT A VOLTAGE INDEPENDENT FROM THE MAINS VOLTAGE, WITH NO ATTACHED REGULATOR FOR THE POWER SECTION, AND CORRESPONDING COMMUNICATION MODULE
46
Patent #:
Issue Dt:
02/20/2007
Application #:
10816338
Filing Dt:
03/31/2004
Title:
WIRED ENDIAN METHOD AND APPARATUS FOR PERFORMING THE SAME
47
Patent #:
Issue Dt:
01/24/2006
Application #:
10817619
Filing Dt:
04/01/2004
Publication #:
Pub Dt:
10/13/2005
Title:
METHOD AND APPARATUS TO ELIMINATE GALVANIC CORROSION ON COPPER DOPED ALUMINUM BOND PADS ON INTEGRATED CIRCUITS
48
Patent #:
Issue Dt:
03/04/2008
Application #:
10818189
Filing Dt:
04/05/2004
Title:
IN-PHASE AND QUADRATURE DECISION FEEDBACK EQUALIZER
49
Patent #:
Issue Dt:
12/05/2006
Application #:
10818590
Filing Dt:
04/05/2004
Publication #:
Pub Dt:
09/30/2004
Title:
SELF ALIGNED METHOD OF FORMING A SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS WITH BURIED BIT-LINE AND RAISED SOURCE LINE
50
Patent #:
Issue Dt:
11/08/2005
Application #:
10818865
Filing Dt:
04/06/2004
Publication #:
Pub Dt:
10/06/2005
Title:
ON-CHIP POWER SUPPLY INTERFACE WITH LOAD-INDEPENDENT CURRENT DEMAND
51
Patent #:
Issue Dt:
02/12/2008
Application #:
10819319
Filing Dt:
04/07/2004
Publication #:
Pub Dt:
10/13/2005
Title:
COMPLEMENTARY CODE KEYING (CCK) SEQUENTIALLY DECODING APPARATUS AND PROCESS THEREOF
52
Patent #:
Issue Dt:
04/10/2007
Application #:
10820381
Filing Dt:
04/08/2004
Title:
SYSTEMS AND METHODS FOR ACTIVELY-PEAKED CURRENT-MODE LOGIC
53
Patent #:
Issue Dt:
03/21/2006
Application #:
10822944
Filing Dt:
04/12/2004
Publication #:
Pub Dt:
10/13/2005
Title:
ISOLATION-LESS, CONTACT-LESS ARRAY OF NONVOLATILE MEMORY CELLS EACH HAVING A FLOATING GATE FOR STORAGE OF CHARGES, AND METHODS OF MANUFACTURING, AND OPERATING THEREFOR
54
Patent #:
Issue Dt:
02/27/2007
Application #:
10824016
Filing Dt:
04/13/2004
Publication #:
Pub Dt:
10/07/2004
Title:
METHOD OF MANUFACTURING AN ISOLATION-LESS, CONTACT-LESS ARRAY OF BI-DIRECTIONAL READ/PROGRAM NON-VOLATILE FLOATING GATE MEMORY CELLS WITH INDEPENDENT CONTROLLABLE CONTROL GATES
55
Patent #:
Issue Dt:
04/24/2007
Application #:
10825717
Filing Dt:
04/16/2004
Publication #:
Pub Dt:
10/21/2004
Title:
METHODS OF AND APPARATUS FOR EFFICIENT BUFFER CACHE UTILIZATION
56
Patent #:
Issue Dt:
02/23/2010
Application #:
10830031
Filing Dt:
04/23/2004
Title:
METHOD AND APPARATUS FOR REDUCING CURRENT DEMAND VARIATIONS IN LARGE FAN-OUT TREES
57
Patent #:
Issue Dt:
03/14/2006
Application #:
10831318
Filing Dt:
04/26/2004
Publication #:
Pub Dt:
10/27/2005
Title:
FILTER USING MULTILAYER CERAMIC TECHNOLOGY AND STRUCTURE THEREOF
58
Patent #:
Issue Dt:
07/04/2006
Application #:
10831907
Filing Dt:
04/26/2004
Publication #:
Pub Dt:
10/27/2005
Title:
CHARGE PUMP CLOCK FOR NON-VOLATILE MEMORIES
59
Patent #:
Issue Dt:
12/11/2007
Application #:
10831911
Filing Dt:
04/26/2004
Publication #:
Pub Dt:
10/27/2005
Title:
BI-DIRECTIONAL SERIAL INTERFACE FOR COMMUNICATION CONTROL
60
Patent #:
Issue Dt:
10/31/2006
Application #:
10833418
Filing Dt:
04/27/2004
Publication #:
Pub Dt:
11/25/2004
Title:
METHOD AND APPARATUS FOR DRIVING A DIRECT CURRENT OR VOLTAGE CONTROLLED OSCILLATOR WITH MODULATION SLOPE FEEDBACK
61
Patent #:
Issue Dt:
08/15/2006
Application #:
10835410
Filing Dt:
04/28/2004
Publication #:
Pub Dt:
03/31/2005
Title:
SELECTABLE BLOCK PROTECTION FOR NON-VOLATILE MEMORY
62
Patent #:
Issue Dt:
07/18/2006
Application #:
10836369
Filing Dt:
04/30/2004
Publication #:
Pub Dt:
11/17/2005
Title:
UNIVERSAL INTERCONNECT DIE
63
Patent #:
Issue Dt:
09/05/2006
Application #:
10836703
Filing Dt:
04/29/2004
Publication #:
Pub Dt:
04/14/2005
Title:
DUAL PHASE PULSE MODULATION ENCODER CIRCUIT
64
Patent #:
Issue Dt:
08/09/2005
Application #:
10836704
Filing Dt:
04/29/2004
Publication #:
Pub Dt:
04/14/2005
Title:
CURRENT STARVED DAC-CONTROLLED DELAY LOCKED LOOP
65
Patent #:
Issue Dt:
10/16/2007
Application #:
10836705
Filing Dt:
04/29/2004
Publication #:
Pub Dt:
04/14/2005
Title:
METHOD FOR PERFORMING DUAL PHASE PULSE MODULATION
66
Patent #:
Issue Dt:
09/20/2005
Application #:
10836710
Filing Dt:
04/29/2004
Publication #:
Pub Dt:
04/14/2005
Title:
DUAL PHASE PULSE MODULATION DECODER CIRCUIT
67
Patent #:
Issue Dt:
06/19/2007
Application #:
10837478
Filing Dt:
04/29/2004
Publication #:
Pub Dt:
04/14/2005
Title:
VERNIER CIRCUIT FOR FINE CONTROL OF SAMPLE TIME
68
Patent #:
Issue Dt:
10/25/2005
Application #:
10838820
Filing Dt:
05/04/2004
Publication #:
Pub Dt:
04/07/2005
Title:
SWITCHING POWER CONVERTER AND METHOD OF CONTROLLING OUTPUT VOLTAGE THEREOF USING PREDICTIVE SENSING OF MAGNETIC FLUX
69
Patent #:
Issue Dt:
03/18/2008
Application #:
10838999
Filing Dt:
05/04/2004
Publication #:
Pub Dt:
11/10/2005
Title:
SENSE AMPLIFIER FOR LOW VOLTAGE HIGH SPEED SENSING
70
Patent #:
Issue Dt:
11/07/2006
Application #:
10841744
Filing Dt:
05/07/2004
Publication #:
Pub Dt:
11/10/2005
Title:
SELECTABLE GAIN AMPLIFIER
71
Patent #:
Issue Dt:
12/04/2007
Application #:
10841948
Filing Dt:
05/06/2004
Publication #:
Pub Dt:
03/24/2005
Title:
OPTICAL DISPERSION CORRECTION IN TRANSIMPEDANCE AMPLIFIERS
72
Patent #:
Issue Dt:
12/05/2006
Application #:
10848763
Filing Dt:
05/18/2004
Publication #:
Pub Dt:
11/24/2005
Title:
LOW-VOLTAGE SINGLE-LAYER POLYSILICON EEPROM MEMORY CELL
73
Patent #:
Issue Dt:
03/28/2006
Application #:
10848982
Filing Dt:
05/18/2004
Publication #:
Pub Dt:
10/28/2004
Title:
SELF ALIGNED METHOD OF FORMING A SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS WITH CONTROL GATE SPACERS
74
Patent #:
Issue Dt:
05/23/2006
Application #:
10849086
Filing Dt:
05/18/2004
Publication #:
Pub Dt:
12/09/2004
Title:
INTEGRATED CIRCUIT FOR A TRANSPONDER
75
Patent #:
Issue Dt:
04/19/2005
Application #:
10849975
Filing Dt:
05/19/2004
Publication #:
Pub Dt:
10/28/2004
Title:
A METHOD OF OPERATING A SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS WITH HORIZONTALLY ORIENTED EDGES
76
Patent #:
Issue Dt:
09/30/2014
Application #:
10850161
Filing Dt:
05/19/2004
Title:
METHOD FOR DEDICATED NETBOOT
77
Patent #:
Issue Dt:
07/24/2007
Application #:
10850203
Filing Dt:
05/19/2004
Title:
SINGLE DRIVER FOR MULTIFUNCTIONAL SCSI CHIPS
78
Patent #:
Issue Dt:
08/01/2006
Application #:
10850300
Filing Dt:
05/19/2004
Publication #:
Pub Dt:
10/28/2004
Title:
METHOD OF FORMING DIFFERENT OXIDE THICKNESS FOR HIGH VOLTAGE TRANSISTOR AND MEMORY CELL TUNNEL DIELETRIC
79
Patent #:
Issue Dt:
11/13/2007
Application #:
10851269
Filing Dt:
05/21/2004
Publication #:
Pub Dt:
10/26/2006
Title:
TOUCH SENSITIVE CONTROL PANEL
80
Patent #:
Issue Dt:
11/07/2006
Application #:
10852586
Filing Dt:
05/24/2004
Publication #:
Pub Dt:
07/13/2006
Title:
METHOD AND APPARATUS FOR CONFIGURING THE OPERATION OF AN INTEGRATED CIRCUIT
81
Patent #:
Issue Dt:
04/17/2007
Application #:
10853983
Filing Dt:
05/25/2004
Publication #:
Pub Dt:
10/28/2004
Title:
BATTERY COVER ASSEMBLY HAVING INTEGRATED BATTERY CONDITION MONITORING
82
Patent #:
Issue Dt:
01/02/2007
Application #:
10855865
Filing Dt:
05/26/2004
Publication #:
Pub Dt:
12/23/2004
Title:
CIRCUIT ARRANGEMENT AND METHOD FOR PHASE MODULATION IN A BACKSCATTERING TRANSPONDER
83
Patent #:
Issue Dt:
02/06/2007
Application #:
10855866
Filing Dt:
05/26/2004
Publication #:
Pub Dt:
12/23/2004
Title:
CIRCUIT ARRANGEMENT WITH SIMPLIFIED INPUT CIRCUIT FOR PHASE MODULATION IN A BACKSCATTERING TRANSPONDER
84
Patent #:
Issue Dt:
08/15/2006
Application #:
10857332
Filing Dt:
05/28/2004
Publication #:
Pub Dt:
12/09/2004
Title:
LOAD AND LINE REGULATION USING OPERATIONAL TRANSCONDUCTANCE AMPLIFIER AND OPERATIONAL AMPLIFIER IN TANDEM
85
Patent #:
Issue Dt:
02/09/2010
Application #:
10861682
Filing Dt:
06/04/2004
Publication #:
Pub Dt:
04/28/2005
Title:
METHOD AND APPARATUS FOR A VARIABLE PROCESSING PERIOD IN AN INTEGRATED CIRCUIT
86
Patent #:
Issue Dt:
01/01/2008
Application #:
10863030
Filing Dt:
06/07/2004
Publication #:
Pub Dt:
12/08/2005
Title:
SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS WITH PROGRAM/ERASE AND SELECT GATES
87
Patent #:
Issue Dt:
06/05/2007
Application #:
10865644
Filing Dt:
06/10/2004
Publication #:
Pub Dt:
12/15/2005
Title:
METHOD AND SYSTEM FOR ENHANCED DIMMING RESOLUTION IN A LIGHT BALLAST THROUGH USE OF MULTIPLE CONTROL FREQUENCIES
88
Patent #:
Issue Dt:
04/25/2006
Application #:
10868614
Filing Dt:
06/14/2004
Publication #:
Pub Dt:
11/25/2004
Title:
ARRAY ARCHITECTURE AND OPERATING METHODS FOR DIGITAL MULTILEVEL NONVOLATILE MEMORY INTEGRATED CIRCUIT SYSTEM
89
Patent #:
Issue Dt:
01/12/2010
Application #:
10869475
Filing Dt:
06/15/2004
Publication #:
Pub Dt:
12/15/2005
Title:
NAND FLASH MEMORY WITH NITRIDE CHARGE STORAGE GATES AND FABRICATION PROCESS
90
Patent #:
Issue Dt:
02/20/2007
Application #:
10872052
Filing Dt:
06/17/2004
Publication #:
Pub Dt:
12/02/2004
Title:
SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS WITH BURIED FLOATING GATE, POINTED FLOATING GATE AND POINTED CHANNEL REGION
91
Patent #:
Issue Dt:
12/30/2008
Application #:
10872108
Filing Dt:
06/17/2004
Publication #:
Pub Dt:
12/22/2005
Title:
POWER AND AREA EFFICIENT ADAPTIVE EQUALIZATION
92
Patent #:
Issue Dt:
11/28/2006
Application #:
10872307
Filing Dt:
06/17/2004
Publication #:
Pub Dt:
12/22/2005
Title:
INTEGRATED CIRCUIT IMPLEMENTATION FOR POWER AND AREA EFFICIENT ADAPTIVE EQUALIZATION
93
Patent #:
Issue Dt:
06/21/2005
Application #:
10874606
Filing Dt:
06/23/2004
Title:
FRACTAL SEQUENCING SCHEMES FOR OFFSET CANCELLATION IN SAMPLED DATA ACQUISITION SYSTEMS
94
Patent #:
Issue Dt:
07/17/2007
Application #:
10882215
Filing Dt:
07/02/2004
Publication #:
Pub Dt:
01/05/2006
Title:
BANDPASS AMPLIFIER
95
Patent #:
Issue Dt:
10/11/2005
Application #:
10883203
Filing Dt:
06/30/2004
Publication #:
Pub Dt:
02/03/2005
Title:
METHOD AND APPARATUS FOR SMOOTHING CURRENT CONSUMPTION IN AN INTEGRATED CIRCUIT
96
Patent #:
Issue Dt:
07/05/2005
Application #:
10885923
Filing Dt:
07/06/2004
Publication #:
Pub Dt:
12/09/2004
Title:
NON-VOLATILE FLOATING GATE MEMORY CELL WITH FLOATING GATES FORMED IN CAVITIES, AND ARRAY THEREOF, AND METHOD OF FORMATION
97
Patent #:
Issue Dt:
02/15/2011
Application #:
10886438
Filing Dt:
07/06/2004
Publication #:
Pub Dt:
02/10/2005
Title:
ULTRASOUND TRANSMIT BEAMFORMER INTEGRATED CIRCUIT AND METHOD
98
Patent #:
Issue Dt:
08/07/2007
Application #:
10887702
Filing Dt:
07/09/2004
Publication #:
Pub Dt:
01/12/2006
Title:
RF RECEIVER MISMATCH CALIBRATION SYSTEM AND METHOD
99
Patent #:
Issue Dt:
04/05/2005
Application #:
10888742
Filing Dt:
07/09/2004
Title:
FABRICATION OF AN EEPROM CELL WITH EMITTER-POLYSILICON SOURCE/DRAIN REGIONS
100
Patent #:
Issue Dt:
05/29/2007
Application #:
10888790
Filing Dt:
07/09/2004
Publication #:
Pub Dt:
02/17/2005
Title:
METHOD AND APPARATUS FOR CURRENT LIMITATION IN VOLTAGE REGULATORS
Assignor
1
Exec Dt:
02/18/2022
Assignees
1
2355 W CHANDLER BLVD
CHANDLER, ARIZONA 85224
2
2355 W CHANDLER BLVD
CHANDLER, ARIZONA 85224
3
2355 W CHANDLER BLVD
CHANDLER, ARIZONA 85224
4
2355 W CHANDLER BLVD
CHANDLER, ARIZONA 85224
5
2355 W CHANDLER BLVD
CHANDLER, ARIZONA 85224
Correspondence name and address
WILSON SONSINI GOODRICH & ROSATI, P.C.
ONE MARKET PLAZA, SPEAR TOWER, SUITE 330
SAN FRANCISCO, CA 94105

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