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Reel/Frame:026892/0232   Pages: 3
Recorded: 09/13/2011
Attorney Dkt #:P10H0222/US
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1
1
Patent #:
NONE
Issue Dt:
Application #:
13230931
Filing Dt:
09/13/2011
Publication #:
Pub Dt:
11/29/2012
Title:
METHOD FOR FABRICATING SEMICONDUCTOR DEVICE WITH PARTIALLY OPEN SIDEWALL
Assignors
1
Exec Dt:
08/29/2011
2
Exec Dt:
08/29/2011
3
Exec Dt:
08/29/2011
4
Exec Dt:
08/29/2011
5
Exec Dt:
08/29/2011
Assignee
1
SAN 136-1, AMI-RI, BUBAL-EUP, ICHEON-SI,
GYEONGGI-DO,, KOREA, REPUBLIC OF 467-701
Correspondence name and address
IP & T GROUP LLP
7700 LITTLE RIVER TURNPIKE
SUITE 207
ANNANDALE, VA 22003

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