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Reel/Frame:019048/0233   Pages: 3
Recorded: 02/23/2007
Attorney Dkt #:SEC.1818
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1
1
Patent #:
Issue Dt:
11/24/2009
Application #:
11709689
Filing Dt:
02/23/2007
Publication #:
Pub Dt:
12/13/2007
Title:
PARALLEL BIT TEST CIRCUIT AND METHOD FOR SEMICONDUCTOR MEMORY DEVICE
Assignors
1
Exec Dt:
02/08/2007
2
Exec Dt:
02/08/2007
Assignee
1
416, MAETAN-DONG, YEONGTONG-GU, SUWON-SI
GYEONGGI-DO, KOREA, REPUBLIC OF
Correspondence name and address
BENJAMIN P. WESTOVER
VOLENTINE & WHITT, PLLC
ONE FREEDOM SQUARE
11951 FREEDOM DRIVE, SUITE 1260
RESTON, VA 20190

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