Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 014484/0239 | |
| Pages: | 6 |
| | Recorded: | 09/12/2003 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
14
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Patent #:
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Issue Dt:
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10/05/1993
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Application #:
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07767256
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Filing Dt:
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09/27/1991
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Title:
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LOW POWER MULTIFUNCTION LOGIC ARRAY
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Patent #:
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Issue Dt:
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11/17/1992
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Application #:
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07869616
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Filing Dt:
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04/16/1992
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Title:
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PROGRAMMABLE CMOS FLIP-FLOP EMPLOYING MULTIPLEXERS
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Patent #:
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Issue Dt:
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10/03/1995
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Application #:
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08004797
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Filing Dt:
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01/14/1993
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Title:
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MEMORY SYSTEM FOR LOADING PERIPHERALS ON POWER UP
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Patent #:
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Issue Dt:
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03/29/1994
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Application #:
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08039966
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Filing Dt:
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03/30/1993
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Title:
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WRITE CIRCUIT FOR CMOS LATCH AND MEMORY SYSTEMS
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Patent #:
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Issue Dt:
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08/08/1995
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Application #:
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08066555
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Filing Dt:
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05/26/1993
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Title:
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FAST CMOS LOGIC WITH PROGRAMMABLE LOGIC CONTROL
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Patent #:
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Issue Dt:
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01/30/1996
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Application #:
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08297641
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Filing Dt:
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08/29/1994
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Title:
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DIGITAL INTERFACE CIRCUIT WITH DUAL SWITCHING POINTS FOR INCREASED SPEED
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Patent #:
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Issue Dt:
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06/13/1995
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Application #:
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08310437
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Filing Dt:
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09/22/1994
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Title:
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PROGRAMMABLE MACROCELL CIRCUIT
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Patent #:
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Issue Dt:
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10/22/1996
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Application #:
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08502531
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Filing Dt:
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07/14/1995
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Title:
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LOW NOISE TRI-STATE OUTPUT BUFFER
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Patent #:
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Issue Dt:
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03/10/1998
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Application #:
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08690227
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Filing Dt:
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07/19/1996
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Title:
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PROGRAMMABLE DYNAMIC LINE-TERMINATION CIRCUIT
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Patent #:
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Issue Dt:
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08/18/1998
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Application #:
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08723615
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Filing Dt:
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10/02/1996
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Title:
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PROGRAMMABLE LOGIC DEVICE WITH PARTIAL SWITCH MATRIX AND BYPASS MECHANISM
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Patent #:
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Issue Dt:
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07/06/1999
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Application #:
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08754755
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Filing Dt:
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11/21/1996
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Title:
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INVERTER-CONTROLLED DIGITAL INTERFACE CIRCUIT WITH DUAL SWITCHING POINTS FOR INCREASED SPEED
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Patent #:
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Issue Dt:
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01/26/1999
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Application #:
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08853690
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Filing Dt:
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05/09/1997
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Title:
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TRISTATE BUFFER CIRCUIT WITH TRANSPARENT LATCHING CAPABILITY
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Patent #:
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Issue Dt:
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09/05/2000
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Application #:
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09287446
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Filing Dt:
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04/07/1999
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Title:
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DRIVER CIRCUIT PROVIDING EARLY RELEASE AND QUICK BUS TURN-AROUND
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Patent #:
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Issue Dt:
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02/13/2001
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Application #:
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09434713
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Filing Dt:
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11/05/1999
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Title:
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LOW POWER, STATIC CONTENT ADDRESSABLE MEMORY
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Assignee
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| 250 2-GA, TAEPYUNG-RO, |
| CHUNG-GU |
| SEOUL, KOREA, REPUBLIC OF |
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Correspondence name and address
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AKIN GUMP STRASS ET AL
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JOHN A. TANG
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1900 PENNZOIL PLACE, SOUTH TOWER
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711 LOUISIANA STREET
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HOUSTON, TX 77002
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