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Patent Assignment Details
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Reel/Frame:040417/0248   Pages: 7
Recorded: 10/19/2016
Conveyance: CORRECTIVE ASSIGNMENT TO CORRECT THE RECEIVING PARTY NAME PREVIOUSLY RECORDED AT REEL: 017205 FRAME: 0248. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT.
Total properties: 4
1
Patent #:
Issue Dt:
07/06/2004
Application #:
10004976
Filing Dt:
12/03/2001
Publication #:
Pub Dt:
06/05/2003
Title:
INTEGRATED CIRCUITS WITH SCALABLE DESIGN
2
Patent #:
Issue Dt:
10/12/2004
Application #:
10024943
Filing Dt:
12/18/2001
Publication #:
Pub Dt:
06/19/2003
Title:
DYNAMIC MATCHING IN CASCODE CIRCUITS
3
Patent #:
NONE
Issue Dt:
Application #:
10025437
Filing Dt:
12/18/2001
Publication #:
Pub Dt:
01/22/2004
Title:
Internal impedance match in integrated circuits
4
Patent #:
Issue Dt:
02/15/2005
Application #:
10327512
Filing Dt:
12/19/2002
Publication #:
Pub Dt:
11/20/2003
Title:
COMPACT LAYOUT FOR A SEMICONDUCTOR DEVICE
Assignor
1
Exec Dt:
10/15/2003
Assignee
1
131 MOUNT BETHEL ROAD
WARREN, NEW JERSEY 07059
Correspondence name and address
KELLEY DRYE & WARREN LLP
ONE JEFFERSON ROAD
PARSIPPANY, NJ 07054

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