Patent Assignment Details
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| Reel/Frame: | 024559/0255 | |
| Pages: | 3 |
| | Recorded: | 06/18/2010 | | |
| Attorney Dkt #: | L05-201C2US |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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01/11/2011
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Application #:
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12818544
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Filing Dt:
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06/18/2010
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Title:
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SOFT ERROR UPSET HARDENED INTEGRATED CIRCUIT SYSTEMS AND METHODS
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Assignee
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| 5555 NE MOORE CT. |
| HILLSBORO, OREGON 97124 |
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Correspondence name and address
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LATTICE SEMICONDUCTOR CORPORATION
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5555 NE MOORE COURT
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HILLSBORO, OR 97124-6421
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