Patent Assignment Details
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| Reel/Frame: | 006929/0259 | |
| Pages: | 3 |
| | Recorded: | 03/15/1994 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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08/08/1995
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Application #:
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08213630
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Filing Dt:
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03/15/1994
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Title:
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METHOD OF MAKING TRULY COMPLEMENTARY AND SELF-ALIGNED BIPOLAR AND CMOS TRANSISTOR STRUCTURES WITH MINIMIZED BASE AND GATE RESISTANCES AND PARASITIC CAPACITANCE
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Assignee
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| 2900 SEMICONDUCTOR DRIVE |
| SANTA CLARA, CALIFORNIA 95052-8090 |
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Correspondence name and address
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SHRINATH MALUR
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LIMBACH & LIMBACH
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2001 FERRY BUILDING
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SAN FRANCISCO, CA 94111
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