|
|
Patent #:
|
|
Issue Dt:
|
04/24/2012
|
Application #:
|
12115825
|
Filing Dt:
|
05/06/2008
|
Publication #:
|
|
Pub Dt:
|
11/12/2009
| | | | |
Title:
|
DEVICE AND TECHNIQUE FOR TRANSISTOR WELL BIASING
|
|
|
Patent #:
|
|
Issue Dt:
|
08/17/2010
|
Application #:
|
12117215
|
Filing Dt:
|
05/08/2008
|
Publication #:
|
|
Pub Dt:
|
09/11/2008
| | | | |
Title:
|
DRIVE ARRANGEMENT FOR ACTIVATING A CAR SAFETY DEVICE ACTIVATION ELEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
03/02/2010
|
Application #:
|
12117357
|
Filing Dt:
|
05/08/2008
|
Publication #:
|
|
Pub Dt:
|
11/12/2009
| | | | |
Title:
|
ANALOG-TO-DIGITAL CONVERTER WITH INTEGRATOR CIRCUIT FOR OVERLOAD RECOVERY
|
|
|
Patent #:
|
|
Issue Dt:
|
08/14/2012
|
Application #:
|
12118108
|
Filing Dt:
|
05/09/2008
|
Publication #:
|
|
Pub Dt:
|
11/12/2009
| | | | |
Title:
|
CALIBRATED QUADRATURE GENERATION FOR MULTI-GHZ RECEIVER
|
|
|
Patent #:
|
|
Issue Dt:
|
08/16/2011
|
Application #:
|
12119618
|
Filing Dt:
|
05/13/2008
|
Publication #:
|
|
Pub Dt:
|
11/19/2009
| | | | |
Title:
|
LOOP DELAY AND GAIN CONTROL METHODS IN CLOSED-LOOP TRANSMITTERS AND WIRELESS DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/20/2009
|
Application #:
|
12120246
|
Filing Dt:
|
05/14/2008
|
Publication #:
|
|
Pub Dt:
|
12/11/2008
| | | | |
Title:
|
TEMPERATURE COMPENSATION CIRCUIT, TRIMMING CIRCUIT, AND ACCELERATION DETECTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
11/15/2011
|
Application #:
|
12121608
|
Filing Dt:
|
05/15/2008
|
Publication #:
|
|
Pub Dt:
|
11/19/2009
| | | | |
Title:
|
PACKAGE LEVEL ESD PROTECTION AND METHOD THEREFOR
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12122178
|
Filing Dt:
|
05/16/2008
|
Publication #:
|
|
Pub Dt:
|
11/19/2009
| | | | |
Title:
|
Modulation of Tantalum-Based Electrode Workfunction
|
|
|
Patent #:
|
|
Issue Dt:
|
04/09/2013
|
Application #:
|
12122340
|
Filing Dt:
|
05/16/2008
|
Publication #:
|
|
Pub Dt:
|
11/19/2009
| | | | |
Title:
|
VIRTUAL DIRECT MEMORY ACCESS (DMA) CHANNEL TECHNIQUE WITH MULTIPLE ENGINES FOR DMA CONTROLLER
|
|
|
Patent #:
|
|
Issue Dt:
|
09/21/2010
|
Application #:
|
12122837
|
Filing Dt:
|
05/19/2008
|
Publication #:
|
|
Pub Dt:
|
09/04/2008
| | | | |
Title:
|
METHOD OF FABRICATING A SUBSTRATE FOR A PLANAR, DOUBLE-GATED, TRANSISTOR PROCESS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/27/2009
|
Application #:
|
12125613
|
Filing Dt:
|
05/22/2008
|
Title:
|
ROBUST DEEP TRENCH ISOLATION
|
|
|
Patent #:
|
|
Issue Dt:
|
08/23/2011
|
Application #:
|
12125855
|
Filing Dt:
|
05/22/2008
|
Publication #:
|
|
Pub Dt:
|
11/26/2009
| | | | |
Title:
|
CMOS PROCESS WITH OPTIMIZED PMOS AND NMOS TRANSISTOR DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/31/2011
|
Application #:
|
12125856
|
Filing Dt:
|
05/22/2008
|
Publication #:
|
|
Pub Dt:
|
11/26/2009
| | | | |
Title:
|
METHOD FOR REDUCING PLASMA DISCHARGE DAMAGE DURING PROCESSING
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/2010
|
Application #:
|
12126069
|
Filing Dt:
|
05/23/2008
|
Publication #:
|
|
Pub Dt:
|
11/26/2009
| | | | |
Title:
|
CIRCUIT FOR AND AN ELECTRONIC DEVICE INCLUDING A NONVOLATILE MEMORY CELL AND A PROCESS OF FORMING THE ELECTRONIC DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/25/2010
|
Application #:
|
12126943
|
Filing Dt:
|
05/26/2008
|
Publication #:
|
|
Pub Dt:
|
04/16/2009
| | | | |
Title:
|
METHOD OF FORMING PREMOLDED LEAD FRAME
|
|
|
Patent #:
|
|
Issue Dt:
|
01/17/2012
|
Application #:
|
12129548
|
Filing Dt:
|
05/29/2008
|
Publication #:
|
|
Pub Dt:
|
12/03/2009
| | | | |
Title:
|
CAPACITIVE SENSOR WITH STRESS RELIEF THAT COMPENSATES FOR PACKAGE STRESS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/15/2011
|
Application #:
|
12129686
|
Filing Dt:
|
05/30/2008
|
Publication #:
|
|
Pub Dt:
|
04/30/2009
| | | | |
Title:
|
COATED LEAD FRAME
|
|
|
Patent #:
|
|
Issue Dt:
|
03/05/2013
|
Application #:
|
12129840
|
Filing Dt:
|
05/30/2008
|
Publication #:
|
|
Pub Dt:
|
12/03/2009
| | | | |
Title:
|
RESURF SEMICONDUCTOR DEVICE CHARGE BALANCING
|
|
|
Patent #:
|
|
Issue Dt:
|
11/23/2010
|
Application #:
|
12129846
|
Filing Dt:
|
05/30/2008
|
Publication #:
|
|
Pub Dt:
|
12/03/2009
| | | | |
Title:
|
ENCLOSED VOID CAVITY FOR LOW DIELECTRIC CONSTANT INSULATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
01/19/2010
|
Application #:
|
12129861
|
Filing Dt:
|
05/30/2008
|
Publication #:
|
|
Pub Dt:
|
09/18/2008
| | | | |
Title:
|
SEMICONDUCTOR DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/22/2011
|
Application #:
|
12130158
|
Filing Dt:
|
05/30/2008
|
Publication #:
|
|
Pub Dt:
|
12/03/2009
| | | | |
Title:
|
METHOD OF FORMING A FINFET AND STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/09/2011
|
Application #:
|
12130164
|
Filing Dt:
|
05/30/2008
|
Publication #:
|
|
Pub Dt:
|
12/03/2009
| | | | |
Title:
|
DIFFERENTIAL CURRENT SENSOR DEVICE AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
10/23/2012
|
Application #:
|
12130173
|
Filing Dt:
|
05/30/2008
|
Publication #:
|
|
Pub Dt:
|
12/03/2009
| | | | |
Title:
|
TESTING OF MULTIPLE INTEGRATED CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/04/2011
|
Application #:
|
12130184
|
Filing Dt:
|
05/30/2008
|
Publication #:
|
|
Pub Dt:
|
12/03/2009
| | | | |
Title:
|
MULTIPLE CORE SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
08/24/2010
|
Application #:
|
12130186
|
Filing Dt:
|
05/30/2008
|
Publication #:
|
|
Pub Dt:
|
12/03/2009
| | | | |
Title:
|
METHOD FOR ELECTRICALLY TRIMMING AN NVM REFERENCE CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
06/07/2011
|
Application #:
|
12130197
|
Filing Dt:
|
05/30/2008
|
Publication #:
|
|
Pub Dt:
|
12/03/2009
| | | | |
Title:
|
MEMORY HAVING P-TYPE SPLIT GATE MEMORY CELLS AND METHOD OF OPERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
03/06/2012
|
Application #:
|
12130570
|
Filing Dt:
|
05/30/2008
|
Publication #:
|
|
Pub Dt:
|
12/03/2009
| | | | |
Title:
|
UTILIZATION OF A STORE BUFFER FOR ERROR RECOVERY ON A STORE ALLOCATION CACHE MISS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/25/2012
|
Application #:
|
12130579
|
Filing Dt:
|
05/30/2008
|
Publication #:
|
|
Pub Dt:
|
12/03/2009
| | | | |
Title:
|
HIGH FREQUENCY INTERCONNECT PAD STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/23/2010
|
Application #:
|
12130590
|
Filing Dt:
|
05/30/2008
|
Publication #:
|
|
Pub Dt:
|
12/03/2009
| | | | |
Title:
|
CIRCUITRY AND METHOD FOR BUFFERING A POWER MODE CONTROL SIGNAL
|
|
|
Patent #:
|
|
Issue Dt:
|
11/15/2011
|
Application #:
|
12130702
|
Filing Dt:
|
05/30/2008
|
Publication #:
|
|
Pub Dt:
|
12/03/2009
| | | | |
Title:
|
SEMICONDUCTOR DEVICE WITH REDUCED SENSITIVITY TO PACKAGE STRESS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/19/2010
|
Application #:
|
12130918
|
Filing Dt:
|
05/30/2008
|
Publication #:
|
|
Pub Dt:
|
04/02/2009
| | | | |
Title:
|
SEMICONDUCTOR ARRAY INCLUDING A MATRIX OF CELLS AND A METHOD OF MAKING A SEMICONDUCTOR ARRAY HAVING A MATRIX OF CELLS
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12131691
|
Filing Dt:
|
06/02/2008
|
Publication #:
|
|
Pub Dt:
|
11/27/2008
| | | | |
Title:
|
MULTI-STRAND SUBSTRATE FOR BALL-GRID ARRAY ASSEMBLIES AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
09/13/2011
|
Application #:
|
12133992
|
Filing Dt:
|
06/05/2008
|
Publication #:
|
|
Pub Dt:
|
12/10/2009
| | | | |
Title:
|
PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING A RESISTOR-CAPACITOR FILTER
|
|
|
Patent #:
|
|
Issue Dt:
|
01/29/2013
|
Application #:
|
12134913
|
Filing Dt:
|
06/06/2008
|
Publication #:
|
|
Pub Dt:
|
12/10/2009
| | | | |
Title:
|
DEVICE AND METHOD OF SYNCHRONIZING SIGNALS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/29/2014
|
Application #:
|
12135638
|
Filing Dt:
|
06/09/2008
|
Publication #:
|
|
Pub Dt:
|
12/10/2009
| | | | |
Title:
|
System and Method for Parallel Video Processing in Multicore Devices
|
|
|
Patent #:
|
|
Issue Dt:
|
07/09/2013
|
Application #:
|
12136861
|
Filing Dt:
|
06/11/2008
|
Publication #:
|
|
Pub Dt:
|
12/17/2009
| | | | |
Title:
|
Smart/Active RFID Tag for Use in a WPAN
|
|
|
Patent #:
|
|
Issue Dt:
|
09/14/2010
|
Application #:
|
12138959
|
Filing Dt:
|
06/13/2008
|
Publication #:
|
|
Pub Dt:
|
12/17/2009
| | | | |
Title:
|
POWER AMPLIFIERS HAVING IMPROVED PROTECTION AGAINST AVALANCHE CURRENT
|
|
|
Patent #:
|
|
Issue Dt:
|
08/30/2011
|
Application #:
|
12139106
|
Filing Dt:
|
06/13/2008
|
Publication #:
|
|
Pub Dt:
|
12/17/2009
| | | | |
Title:
|
METHOD AND CIRCUIT FOR EFUSE PROTECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/01/2011
|
Application #:
|
12139208
|
Filing Dt:
|
06/13/2008
|
Publication #:
|
|
Pub Dt:
|
12/17/2009
| | | | |
Title:
|
CIRCULAR BUFFER SUPPORT IN A SINGLE INSTRUCTION MULTIPLE DATA (SIMD) DATA PROCESSSOR
|
|
|
Patent #:
|
|
Issue Dt:
|
09/18/2012
|
Application #:
|
12140890
|
Filing Dt:
|
06/17/2008
|
Publication #:
|
|
Pub Dt:
|
12/17/2009
| | | | |
Title:
|
TECHNIQUES FOR PERFORMING DISCRETE FOURIER TRANSFORMS ON RADIX-2 PLATFORMS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/27/2011
|
Application #:
|
12141213
|
Filing Dt:
|
06/18/2008
|
Publication #:
|
|
Pub Dt:
|
12/24/2009
| | | | |
Title:
|
SYSTEM AND METHOD FOR ESTABLISHING A WPAN WITH PRECISE LOCATIONING CAPABILITY
|
|
|
Patent #:
|
|
Issue Dt:
|
09/13/2011
|
Application #:
|
12141423
|
Filing Dt:
|
06/18/2008
|
Publication #:
|
|
Pub Dt:
|
12/24/2009
| | | | |
Title:
|
VOLTAGE REFERENCE DEVICE AND METHODS THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
09/30/2014
|
Application #:
|
12142028
|
Filing Dt:
|
06/19/2008
|
Publication #:
|
|
Pub Dt:
|
12/24/2009
| | | | |
Title:
|
SYSTEM AND METHOD FOR USING A TASK STARVATION INDICATION TO PREVENT STARVATIONS OF TASKS IN A MULTIPLE PROCESSING ENTITY SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
04/19/2011
|
Application #:
|
12142115
|
Filing Dt:
|
06/19/2008
|
Publication #:
|
|
Pub Dt:
|
12/24/2009
| | | | |
Title:
|
ADJUSTABLE BIPOLAR TRANSISTORS FORMED USING A CMOS PROCESS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/22/2011
|
Application #:
|
12142282
|
Filing Dt:
|
06/19/2008
|
Publication #:
|
|
Pub Dt:
|
12/24/2009
| | | | |
Title:
|
CONTROL AND DATA INFORMATION COMMUNICATION IN A WIRELESS SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
04/19/2011
|
Application #:
|
12142948
|
Filing Dt:
|
06/20/2008
|
Publication #:
|
|
Pub Dt:
|
12/24/2009
| | | | |
Title:
|
LOW DROPOUT VOLTAGE REGULATOR USING MULTI-GATE TRANSISTORS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/20/2010
|
Application #:
|
12144332
|
Filing Dt:
|
06/23/2008
|
Publication #:
|
|
Pub Dt:
|
12/24/2009
| | | | |
Title:
|
MEMORY WITH HIGH SPEED SENSING
|
|
|
Patent #:
|
|
Issue Dt:
|
07/16/2013
|
Application #:
|
12145004
|
Filing Dt:
|
06/24/2008
|
Publication #:
|
|
Pub Dt:
|
12/24/2009
| | | | |
Title:
|
TOUCH SCREEN DETECTION AND DIAGNOSTICS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/05/2010
|
Application #:
|
12146552
|
Filing Dt:
|
06/26/2008
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
Title:
|
TEST INTERPOSER HAVING ACTIVE CIRCUIT COMPONENT AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
10/19/2010
|
Application #:
|
12147230
|
Filing Dt:
|
06/26/2008
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
Title:
|
DIELECTRIC LEDGE FOR HIGH FREQUENCY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/28/2010
|
Application #:
|
12147236
|
Filing Dt:
|
06/26/2008
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
Title:
|
SILICIDED BASE STRUCTURE FOR HIGH FREQUENCY TRANSISTORS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/04/2011
|
Application #:
|
12147313
|
Filing Dt:
|
06/26/2008
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
Title:
|
SEMICONDUCTOR PACKAGE WITH REDUCED INDUCTIVE COUPLING BETWEEN ADJACENT BONDWIRE ARRAYS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/18/2011
|
Application #:
|
12147850
|
Filing Dt:
|
06/27/2008
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
Title:
|
SYSTEM AND METHOD FOR LOAD BALANCING A VIDEO SIGNAL IN A MULTI-CORE PROCESSOR
|
|
|
Patent #:
|
|
Issue Dt:
|
06/08/2010
|
Application #:
|
12154648
|
Filing Dt:
|
05/23/2008
|
Publication #:
|
|
Pub Dt:
|
11/26/2009
| | | | |
Title:
|
AMPLIFIER CIRCUIT HAVING DYNAMICALLY BIASED CONFIGURATION
|
|
|
Patent #:
|
|
Issue Dt:
|
04/13/2010
|
Application #:
|
12155948
|
Filing Dt:
|
06/12/2008
|
Publication #:
|
|
Pub Dt:
|
10/09/2008
| | | | |
Title:
|
ULTRA WIDEBAND COMMUNICATION METHOD WITH LOW NOISE PULSE FORMATION
|
|
|
Patent #:
|
|
Issue Dt:
|
05/15/2012
|
Application #:
|
12157512
|
Filing Dt:
|
06/11/2008
|
Publication #:
|
|
Pub Dt:
|
12/17/2009
| | | | |
Title:
|
ERROR CORRECTING VITERBI DECODER
|
|
|
Patent #:
|
|
Issue Dt:
|
05/24/2011
|
Application #:
|
12158392
|
Filing Dt:
|
06/20/2008
|
Publication #:
|
|
Pub Dt:
|
01/01/2009
| | | | |
Title:
|
IMMERSION LITHOGRAPHY APPARATUS AND METHOD OF PERFORMING IMMERSION LITHOGRAPHY
|
|
|
Patent #:
|
|
Issue Dt:
|
08/23/2011
|
Application #:
|
12158393
|
Filing Dt:
|
06/20/2008
|
Publication #:
|
|
Pub Dt:
|
09/03/2009
| | | | |
Title:
|
IMPROVEMENTS IN OR RELATING TO LEAD FRAME BASED SEMICONDUCTOR PACKAGE AND A METHOD OF MANUFACTURING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
09/07/2010
|
Application #:
|
12160005
|
Filing Dt:
|
07/03/2008
|
Publication #:
|
|
Pub Dt:
|
12/11/2008
| | | | |
Title:
|
METHOD FOR SYNCHRONIZING A TRANSMISSION OF INFORMATION AND A DEVICE HAVING SYNCHRONIZING CAPABILITIES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/19/2011
|
Application #:
|
12160008
|
Filing Dt:
|
07/03/2008
|
Publication #:
|
|
Pub Dt:
|
09/09/2010
| | | | |
Title:
|
DEVICE AND METHOD FOR EVALUATING ELECTROSTATIC DISCHARGE PROTECTION CAPABILITIES
|
|
|
Patent #:
|
|
Issue Dt:
|
08/12/2014
|
Application #:
|
12160470
|
Filing Dt:
|
03/25/2010
|
Publication #:
|
|
Pub Dt:
|
07/22/2010
| | | | |
Title:
|
CONTROLLING THE ACCESS OF MASTER ELEMENTS TO SLAVE ELEMENTS OVER A COMMUNICATION BUS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/23/2012
|
Application #:
|
12161518
|
Filing Dt:
|
07/18/2008
|
Publication #:
|
|
Pub Dt:
|
03/12/2009
| | | | |
Title:
|
DEVICE AND METHOD FOR FINDING EXTREME VALUES IN A DATA BLOCK
|
|
|
Patent #:
|
|
Issue Dt:
|
02/14/2012
|
Application #:
|
12161519
|
Filing Dt:
|
07/18/2008
|
Publication #:
|
|
Pub Dt:
|
11/13/2008
| | | | |
Title:
|
HARDWARE ACCELERATOR BASED METHOD AND DEVICE FOR STRING SEARCHING
|
|
|
Patent #:
|
|
Issue Dt:
|
08/07/2012
|
Application #:
|
12161521
|
Filing Dt:
|
07/18/2008
|
Publication #:
|
|
Pub Dt:
|
11/11/2010
| | | | |
Title:
|
REGULATED VOLTAGE SYSTEM AND METHOD OF PROTECTION THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
08/07/2012
|
Application #:
|
12161524
|
Filing Dt:
|
07/18/2008
|
Publication #:
|
|
Pub Dt:
|
09/09/2010
| | | | |
Title:
|
DEVICE HAVING DATA SHARING CAPABILITIES AND A METHOD FOR SHARING DATA
|
|
|
Patent #:
|
|
Issue Dt:
|
08/28/2012
|
Application #:
|
12161704
|
Filing Dt:
|
07/22/2008
|
Publication #:
|
|
Pub Dt:
|
07/28/2011
| | | | |
Title:
|
METHOD AND APPARATUS FOR CONDITIONING A CMP PAD
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12162174
|
Filing Dt:
|
07/25/2008
|
Publication #:
|
|
Pub Dt:
|
01/01/2009
| | | | |
Title:
|
Device and Method for Adding and Subtracting Two Variables and a Constant
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12162177
|
Filing Dt:
|
07/25/2008
|
Publication #:
|
|
Pub Dt:
|
08/20/2009
| | | | |
Title:
|
BARRIER SLURRY COMPOSITIONS AND BARRIER CMP METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/15/2011
|
Application #:
|
12162179
|
Filing Dt:
|
07/25/2008
|
Publication #:
|
|
Pub Dt:
|
01/01/2009
| | | | |
Title:
|
DEVICE AND A METHOD FOR ESTIMATING TRANSISTOR PARAMETER VARIATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/01/2012
|
Application #:
|
12163610
|
Filing Dt:
|
06/27/2008
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
Title:
|
METHOD FOR PROTECTING A SECURED REAL TIME CLOCK MODULE AND A DEVICE HAVING PROTECTION CAPABILITIES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/02/2010
|
Application #:
|
12163624
|
Filing Dt:
|
06/27/2008
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
Title:
|
DEVICE HAVING CLOCK GENERATING CAPABILITIES AND A METHOD FOR GENERATING A CLOCK SIGNAL
|
|
|
Patent #:
|
|
Issue Dt:
|
12/06/2011
|
Application #:
|
12163633
|
Filing Dt:
|
06/27/2008
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
Title:
|
SYSTEM AND METHOD FOR EVALUATING A DYNAMIC POWER CONSUMPTION OF A BLOCK
|
|
|
Patent #:
|
|
Issue Dt:
|
05/01/2012
|
Application #:
|
12163638
|
Filing Dt:
|
06/27/2008
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
Title:
|
DEVICE HAVING TURBO DECODING CAPABILITIES AND A METHOD FOR TURBO DECODING
|
|
|
Patent #:
|
|
Issue Dt:
|
10/29/2013
|
Application #:
|
12164444
|
Filing Dt:
|
06/30/2008
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
Title:
|
METHOD FOR IMPLEMENTING A BIT-REVERSED INCREMENT IN A DATA PROCESSING SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
03/30/2010
|
Application #:
|
12164622
|
Filing Dt:
|
06/30/2008
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
Title:
|
INTEGRATED CIRCUIT AND A METHOD FOR MEASURING A QUIESCENT CURRENT OF A MODULE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/14/2010
|
Application #:
|
12164755
|
Filing Dt:
|
06/30/2008
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
Title:
|
MEMORY OPERATION TESTING
|
|
|
Patent #:
|
|
Issue Dt:
|
10/18/2011
|
Application #:
|
12164760
|
Filing Dt:
|
06/30/2008
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
Title:
|
CIRCUIT AND METHOD FOR AVOIDING SOFT ERRORS IN STORAGE DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/22/2012
|
Application #:
|
12165073
|
Filing Dt:
|
06/30/2008
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
Title:
|
TECHNIQUES FOR REDUCING JOINT DETECTION COMPLEXITY IN A CHANNEL-CODED MULTIPLE-INPUT MULTIPLE-OUTPUT COMMUNICATION SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
03/01/2011
|
Application #:
|
12167958
|
Filing Dt:
|
07/03/2008
|
Publication #:
|
|
Pub Dt:
|
10/30/2008
| | | | |
Title:
|
VENDOR INDEPENDENT METHOD TO MERGE COVERAGE RESULTS FOR DIFFERENT DESIGNS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/13/2013
|
Application #:
|
12169888
|
Filing Dt:
|
07/09/2008
|
Publication #:
|
|
Pub Dt:
|
01/14/2010
| | | | |
Title:
|
MULTI-EXPOSURE LITHOGRAPHY EMPLOYING A SINGLE ANTI-REFLECTIVE COATING LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
07/19/2011
|
Application #:
|
12169964
|
Filing Dt:
|
07/09/2008
|
Publication #:
|
|
Pub Dt:
|
01/14/2010
| | | | |
Title:
|
INTEGRATED CONFORMAL SHIELDING METHOD AND PROCESS USING REDISTRIBUTED CHIP PACKAGING
|
|
|
Patent #:
|
|
Issue Dt:
|
05/11/2010
|
Application #:
|
12170436
|
Filing Dt:
|
07/10/2008
|
Publication #:
|
|
Pub Dt:
|
01/14/2010
| | | | |
Title:
|
SPOOL BRAKING DEVICE FOR FISHING REEL
|
|
|
Patent #:
|
|
Issue Dt:
|
12/22/2009
|
Application #:
|
12170451
|
Filing Dt:
|
07/10/2008
|
Publication #:
|
|
Pub Dt:
|
01/14/2010
| | | | |
Title:
|
PRE-DRIVER FOR BRIDGE CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
09/21/2010
|
Application #:
|
12174357
|
Filing Dt:
|
07/16/2008
|
Publication #:
|
|
Pub Dt:
|
12/04/2008
| | | | |
Title:
|
ELECTRONIC DEVICE INCLUDING A SEMICONDUCTOR FIN
|
|
|
Patent #:
|
|
Issue Dt:
|
06/29/2010
|
Application #:
|
12175470
|
Filing Dt:
|
07/18/2008
|
Publication #:
|
|
Pub Dt:
|
01/21/2010
| | | | |
Title:
|
AUTHENTICATION SYSTEM INCLUDING ELECTRIC FIELD SENSOR
|
|
|
Patent #:
|
|
Issue Dt:
|
01/11/2011
|
Application #:
|
12176634
|
Filing Dt:
|
07/21/2008
|
Publication #:
|
|
Pub Dt:
|
01/21/2010
| | | | |
Title:
|
METHOD TO REDUCE THRESHOLD VOLTAGE (VT) IN SILICON GERMANIUM (SIGE), HIGH-K DIELECTRIC-METAL GATE, P-TYPE METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTORS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/01/2011
|
Application #:
|
12177986
|
Filing Dt:
|
07/23/2008
|
Publication #:
|
|
Pub Dt:
|
01/28/2010
| | | | |
Title:
|
SEMICONDUCTOR RESISTOR FORMED IN METAL GATE STACK
|
|
|
Patent #:
|
|
Issue Dt:
|
05/25/2010
|
Application #:
|
12178800
|
Filing Dt:
|
07/24/2008
|
Publication #:
|
|
Pub Dt:
|
01/28/2010
| | | | |
Title:
|
BURIED ASYMMETRIC JUNCTION ESD PROTECTION DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/20/2011
|
Application #:
|
12179629
|
Filing Dt:
|
07/25/2008
|
Publication #:
|
|
Pub Dt:
|
01/28/2010
| | | | |
Title:
|
DYNAMIC ADDRESS-TYPE SELECTION CONTROL IN A DATA PROCESSING SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
06/07/2011
|
Application #:
|
12179631
|
Filing Dt:
|
07/25/2008
|
Publication #:
|
|
Pub Dt:
|
01/28/2010
| | | | |
Title:
|
DEBUG TRACE MESSAGING WITH ONE OR MORE CHARACTERISTIC INDICATORS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/19/2013
|
Application #:
|
12179632
|
Filing Dt:
|
07/25/2008
|
Publication #:
|
|
Pub Dt:
|
01/28/2010
| | | | |
Title:
|
DEBUG MESSAGE GENERATION USING A SELECTED ADDRESS TYPE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/11/2012
|
Application #:
|
12179791
|
Filing Dt:
|
07/25/2008
|
Publication #:
|
|
Pub Dt:
|
01/28/2010
| | | | |
Title:
|
SYSTEM, METHOD AND COMPUTER PROGRAM PRODUCT FOR EXECUTING A HIGH LEVEL PROGRAMMING LANGUAGE CONDITIONAL STATEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
02/07/2012
|
Application #:
|
12179792
|
Filing Dt:
|
07/25/2008
|
Publication #:
|
|
Pub Dt:
|
01/28/2010
| | | | |
Title:
|
SYSTEM AND METHOD FOR PROVIDING A BLENDED PICTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/01/2012
|
Application #:
|
12179799
|
Filing Dt:
|
07/25/2008
|
Publication #:
|
|
Pub Dt:
|
01/28/2010
| | | | |
Title:
|
SYSTEM AND METHOD FOR ARBITRATING BETWEEN MEMORY ACCESS REQUESTS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/30/2010
|
Application #:
|
12179826
|
Filing Dt:
|
07/25/2008
|
Publication #:
|
|
Pub Dt:
|
01/28/2010
| | | | |
Title:
|
METHOD FOR GENERATING A OUTPUT CLOCK SIGNAL HAVING A OUTPUT CYCLE AND A DEVICE HAVING A CLOCK SIGNAL GENERATING CAPABILITIES
|
|
|
Patent #:
|
|
Issue Dt:
|
11/23/2010
|
Application #:
|
12179828
|
Filing Dt:
|
07/25/2008
|
Publication #:
|
|
Pub Dt:
|
01/28/2010
| | | | |
Title:
|
INTEGRATED CIRCUIT AND A METHOD FOR RECOVERING FROM A LOW-POWER PERIOD
|
|
|
Patent #:
|
|
Issue Dt:
|
12/06/2011
|
Application #:
|
12179839
|
Filing Dt:
|
07/25/2008
|
Publication #:
|
|
Pub Dt:
|
01/28/2010
| | | | |
Title:
|
DEVICE AND METHOD FOR EVALUATING A TEMPERATURE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/07/2012
|
Application #:
|
12179844
|
Filing Dt:
|
07/25/2008
|
Publication #:
|
|
Pub Dt:
|
01/28/2010
| | | | |
Title:
|
SYSTEM AND METHOD FOR POWER MANAGEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
01/10/2012
|
Application #:
|
12180166
|
Filing Dt:
|
07/25/2008
|
Publication #:
|
|
Pub Dt:
|
01/28/2010
| | | | |
Title:
|
PHASE-LOCKED LOOP SYSTEM WITH A PHASE-ERROR SPREADING CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
05/11/2010
|
Application #:
|
12180818
|
Filing Dt:
|
07/28/2008
|
Publication #:
|
|
Pub Dt:
|
12/04/2008
| | | | |
Title:
|
ELECTRONIC DEVICE INCLUDING A TRANSISTOR STRUCTURE HAVING AN ACTIVE REGION ADJACENT TO A STRESSOR LAYER
|
|