|
|
Patent #:
|
|
Issue Dt:
|
04/30/2013
|
Application #:
|
12727189
|
Filing Dt:
|
03/18/2010
|
Publication #:
|
|
Pub Dt:
|
09/22/2011
| | | | |
Title:
|
DIGITAL ADAPTIVE CHANNEL EQUALIZER
|
|
|
Patent #:
|
|
Issue Dt:
|
02/04/2014
|
Application #:
|
12727258
|
Filing Dt:
|
03/19/2010
|
Publication #:
|
|
Pub Dt:
|
09/30/2010
| | | | |
Title:
|
METHOD OF MAKING CHIP-ON-LEAD PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/09/2013
|
Application #:
|
12729826
|
Filing Dt:
|
03/23/2010
|
Publication #:
|
|
Pub Dt:
|
09/29/2011
| | | | |
Title:
|
SEQUENTIAL DIGITAL CIRCUITRY WITH TEST SCAN
|
|
|
Patent #:
|
|
Issue Dt:
|
04/26/2016
|
Application #:
|
12731510
|
Filing Dt:
|
03/25/2010
|
Publication #:
|
|
Pub Dt:
|
09/29/2011
| | | | |
Title:
|
CAPACITIVE TOUCH PAD WITH ADJACENT TOUCH PAD ELECTRIC FIELD SUPPRESSION
|
|
|
Patent #:
|
|
Issue Dt:
|
02/19/2013
|
Application #:
|
12738409
|
Filing Dt:
|
04/16/2010
|
Publication #:
|
|
Pub Dt:
|
09/02/2010
| | | | |
Title:
|
METHOD FOR MANUFACTURING A NON-VOLATILE MEMORY, NON-VOLATILE MEMORY DEVICE, AND AN INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
03/19/2013
|
Application #:
|
12738421
|
Filing Dt:
|
04/16/2010
|
Publication #:
|
|
Pub Dt:
|
09/09/2010
| | | | |
Title:
|
METHOD, INTEGRATED CIRCUIT, AND COMMUNICATION UNIT FOR SCHEDULING A PROCESSING OF PACKET STREAM CHANNELS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/09/2012
|
Application #:
|
12739084
|
Filing Dt:
|
04/21/2010
|
Publication #:
|
|
Pub Dt:
|
11/03/2011
| | | | |
Title:
|
OVERCURRENT PROTECTION CIRCUIT, INTEGRATED CIRCUIT, APPARATUS AND COMPUTER PROGRAM PRODUCT
|
|
|
Patent #:
|
|
Issue Dt:
|
02/26/2013
|
Application #:
|
12742103
|
Filing Dt:
|
05/10/2010
|
Publication #:
|
|
Pub Dt:
|
09/30/2010
| | | | |
Title:
|
SYSTEM AND METHOD TO IMPROVE SWITCHING IN POWER SWITCHING APPLICATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/09/2013
|
Application #:
|
12742663
|
Filing Dt:
|
05/13/2010
|
Publication #:
|
|
Pub Dt:
|
09/30/2010
| | | | |
Title:
|
AMPLIFIER CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
01/07/2014
|
Application #:
|
12742665
|
Filing Dt:
|
05/13/2010
|
Publication #:
|
|
Pub Dt:
|
10/28/2010
| | | | |
Title:
|
AMPLIFIER CIRCUIT AUDIO CIRCUIT AND ELECTRONIC DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/10/2014
|
Application #:
|
12745966
|
Filing Dt:
|
06/03/2010
|
Publication #:
|
|
Pub Dt:
|
11/04/2010
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND APPARATUS INCLUDING SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/20/2012
|
Application #:
|
12745973
|
Filing Dt:
|
06/03/2010
|
Publication #:
|
|
Pub Dt:
|
10/07/2010
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND APPARATUS INCLUDING SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/25/2014
|
Application #:
|
12746793
|
Filing Dt:
|
07/26/2010
|
Publication #:
|
|
Pub Dt:
|
02/07/2013
| | | | |
Title:
|
RF POWER TRANSISTOR CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
02/11/2014
|
Application #:
|
12747717
|
Filing Dt:
|
06/11/2010
|
Publication #:
|
|
Pub Dt:
|
11/18/2010
| | | | |
Title:
|
AMPLIFIER CIRCUIT, ELECTRONIC DEVICE, METHOD FOR CONFIGURING AN AMPLIFIER CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
12/18/2012
|
Application #:
|
12748096
|
Filing Dt:
|
03/26/2010
|
Publication #:
|
|
Pub Dt:
|
09/29/2011
| | | | |
Title:
|
METHOD AND APPARATUS FOR HANDLING AN INTERRUPT DURING TESTING OF A DATA PROCESSING SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
10/18/2011
|
Application #:
|
12748101
|
Filing Dt:
|
03/26/2010
|
Publication #:
|
|
Pub Dt:
|
09/29/2011
| | | | |
Title:
|
METHOD FOR FORMING A THROUGH SILICON VIA (TSV)
|
|
|
Patent #:
|
|
Issue Dt:
|
05/07/2013
|
Application #:
|
12748108
|
Filing Dt:
|
03/26/2010
|
Publication #:
|
|
Pub Dt:
|
09/29/2011
| | | | |
Title:
|
METHOD AND APPARATUS FOR TESTING A DATA PROCESSING SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
07/23/2013
|
Application #:
|
12748466
|
Filing Dt:
|
03/29/2010
|
Publication #:
|
|
Pub Dt:
|
10/21/2010
| | | | |
Title:
|
CHARGE CONTROL CIRCUIT AND BATTERY CHARGER INCLUDING A CHARGE CONTROL CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
10/29/2013
|
Application #:
|
12748600
|
Filing Dt:
|
03/29/2010
|
Publication #:
|
|
Pub Dt:
|
09/29/2011
| | | | |
Title:
|
ASYNCHRONOUSLY SCHEDULING MEMORY ACCESS REQUESTS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/2013
|
Application #:
|
12748617
|
Filing Dt:
|
03/29/2010
|
Publication #:
|
|
Pub Dt:
|
09/29/2011
| | | | |
Title:
|
SCHEDULING MEMORY ACCESS REQUESTS USING PREDICTED MEMORY TIMING AND STATE INFORMATION
|
|
|
Patent #:
|
|
Issue Dt:
|
10/16/2012
|
Application #:
|
12748892
|
Filing Dt:
|
03/29/2010
|
Publication #:
|
|
Pub Dt:
|
09/29/2011
| | | | |
Title:
|
APPARATUS AND METHOD TO COMPENSATE FOR INJECTION LOCKING
|
|
|
Patent #:
|
|
Issue Dt:
|
12/25/2012
|
Application #:
|
12749621
|
Filing Dt:
|
03/30/2010
|
Publication #:
|
|
Pub Dt:
|
10/06/2011
| | | | |
Title:
|
TEST STRUCTURE ACTIVATED BY PROBE NEEDLE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/01/2013
|
Application #:
|
12750151
|
Filing Dt:
|
03/30/2010
|
Publication #:
|
|
Pub Dt:
|
10/06/2011
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
12/25/2012
|
Application #:
|
12750166
|
Filing Dt:
|
03/30/2010
|
Publication #:
|
|
Pub Dt:
|
10/06/2011
| | | | |
Title:
|
ELECTRONIC DEVICE WITH CAPCITIVELY COUPLED FLOATING BURIED LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
12/13/2011
|
Application #:
|
12750723
|
Filing Dt:
|
03/31/2010
|
Publication #:
|
|
Pub Dt:
|
10/28/2010
| | | | |
Title:
|
SELF-CALIBRATING OSCILLATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
07/26/2011
|
Application #:
|
12750929
|
Filing Dt:
|
03/31/2010
|
Title:
|
SEMICONDUCTOR DEVICE WITH A CONTROLLED CAVITY AND METHOD OF FORMATION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/11/2012
|
Application #:
|
12752717
|
Filing Dt:
|
04/01/2010
|
Publication #:
|
|
Pub Dt:
|
10/06/2011
| | | | |
Title:
|
PACKAGING PROCESS TO CREATE WETTABLE LEAD FLANK DURING BOARD ASSEMBLY
|
|
|
Patent #:
|
|
Issue Dt:
|
05/10/2011
|
Application #:
|
12753226
|
Filing Dt:
|
04/02/2010
|
Publication #:
|
|
Pub Dt:
|
07/29/2010
| | | | |
Title:
|
PROCESS FOR FORMING AN ELECTRONIC DEVICE INCLUDING A FIN-TYPE TRANSISTOR STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/14/2012
|
Application #:
|
12757041
|
Filing Dt:
|
04/09/2010
|
Publication #:
|
|
Pub Dt:
|
11/04/2010
| | | | |
Title:
|
DRIVER CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
10/30/2012
|
Application #:
|
12759306
|
Filing Dt:
|
04/13/2010
|
Publication #:
|
|
Pub Dt:
|
10/13/2011
| | | | |
Title:
|
METHOD AND CIRCUIT FOR CALIBRATING DATA CAPTURE IN A MEMORY CONTROLLER
|
|
|
Patent #:
|
|
Issue Dt:
|
10/09/2012
|
Application #:
|
12760039
|
Filing Dt:
|
04/14/2010
|
Publication #:
|
|
Pub Dt:
|
10/20/2011
| | | | |
Title:
|
MULTI-PORT MEMORY HAVING A VARIABLE NUMBER OF USED WRITE PORTS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/01/2011
|
Application #:
|
12760313
|
Filing Dt:
|
04/14/2010
|
Publication #:
|
|
Pub Dt:
|
10/20/2011
| | | | |
Title:
|
METHOD FOR FORMING A SPLIT GATE DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/25/2014
|
Application #:
|
12762439
|
Filing Dt:
|
04/19/2010
|
Publication #:
|
|
Pub Dt:
|
10/20/2011
| | | | |
Title:
|
INTEGRATED CIRCUIT DEVICE WITH REDUCED LEAKAGE AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/2014
|
Application #:
|
12764689
|
Filing Dt:
|
04/21/2010
|
Publication #:
|
|
Pub Dt:
|
10/27/2011
| | | | |
Title:
|
MONITOR CIRCUIT FOR DETERMINING THE LIFETIME OF A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/20/2012
|
Application #:
|
12766395
|
Filing Dt:
|
04/23/2010
|
Publication #:
|
|
Pub Dt:
|
10/27/2011
| | | | |
Title:
|
METHOD FOR FORMING A SCHOTTKY DIODE HAVING A METAL-SEMICONDUCTOR SCHOTTKY CONTACT
|
|
|
Patent #:
|
|
Issue Dt:
|
08/21/2012
|
Application #:
|
12767492
|
Filing Dt:
|
04/26/2010
|
Publication #:
|
|
Pub Dt:
|
10/27/2011
| | | | |
Title:
|
PROGRAMMABLE DELAY TIMER AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
08/21/2012
|
Application #:
|
12767536
|
Filing Dt:
|
04/26/2010
|
Publication #:
|
|
Pub Dt:
|
10/27/2011
| | | | |
Title:
|
LDMOS TRANSISTORS WITH A SPLIT GATE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2014
|
Application #:
|
12768275
|
Filing Dt:
|
04/27/2010
|
Publication #:
|
|
Pub Dt:
|
10/27/2011
| | | | |
Title:
|
Techniques for Updating Filter Coefficients of an Adaptive Filter
|
|
|
Patent #:
|
|
Issue Dt:
|
01/08/2013
|
Application #:
|
12768283
|
Filing Dt:
|
04/27/2010
|
Publication #:
|
|
Pub Dt:
|
10/27/2011
| | | | |
Title:
|
OPEN CIRCUIT DETECTOR AND METHOD THEREFORE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/22/2014
|
Application #:
|
12768366
|
Filing Dt:
|
04/27/2010
|
Publication #:
|
|
Pub Dt:
|
10/27/2011
| | | | |
Title:
|
Techniques for Implementing Adaptation Control of an Echo Canceller to Facilitate Detection of In-Band Signals
|
|
|
Patent #:
|
|
Issue Dt:
|
08/13/2013
|
Application #:
|
12768391
|
Filing Dt:
|
04/27/2010
|
Publication #:
|
|
Pub Dt:
|
10/27/2011
| | | | |
Title:
|
DATA PROCESSING SYSTEM HAVING PERIPHERAL-PACED DMA TRANSFER AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
06/05/2012
|
Application #:
|
12769046
|
Filing Dt:
|
04/28/2010
|
Publication #:
|
|
Pub Dt:
|
11/03/2011
| | | | |
Title:
|
SWITCHED CAPACITOR CIRCUIT FOR A VOLTAGE CONTROLLED OSCILLATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
12/11/2012
|
Application #:
|
12769779
|
Filing Dt:
|
04/29/2010
|
Publication #:
|
|
Pub Dt:
|
11/03/2011
| | | | |
Title:
|
LDMOS WITH ENHANCED SAFE OPERATING AREA (SOA) AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
06/25/2013
|
Application #:
|
12769786
|
Filing Dt:
|
04/29/2010
|
Publication #:
|
|
Pub Dt:
|
11/03/2011
| | | | |
Title:
|
MULTIPLE PARTITIONED EMULATED ELECTRICALLY ERASABLE (EEE) MEMORY AND METHOD OF OPERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/25/2012
|
Application #:
|
12769795
|
Filing Dt:
|
04/29/2010
|
Publication #:
|
|
Pub Dt:
|
11/03/2011
| | | | |
Title:
|
EMULATED ELECTRICALLY ERASABLE (EEE) MEMORY AND METHOD OF OPERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
07/26/2011
|
Application #:
|
12770463
|
Filing Dt:
|
04/29/2010
|
Title:
|
AMPLIFIER WITH FEEDBACK
|
|
|
Patent #:
|
|
Issue Dt:
|
08/28/2012
|
Application #:
|
12771209
|
Filing Dt:
|
04/30/2010
|
Publication #:
|
|
Pub Dt:
|
11/03/2011
| | | | |
Title:
|
CIRCUIT FOR VERIFYING THE WRITE ENABLE OF A ONE TIME PROGRAMMABLE MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
06/04/2013
|
Application #:
|
12772769
|
Filing Dt:
|
05/03/2010
|
Publication #:
|
|
Pub Dt:
|
11/03/2011
| | | | |
Title:
|
OVERVOLTAGE PROTECTION CIRCUIT FOR AN INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
09/06/2011
|
Application #:
|
12776281
|
Filing Dt:
|
05/07/2010
|
Publication #:
|
|
Pub Dt:
|
09/02/2010
| | | | |
Title:
|
DATA TRANSFER COHERENCY DEVICE AND METHODS THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
03/27/2012
|
Application #:
|
12777066
|
Filing Dt:
|
05/10/2010
|
Publication #:
|
|
Pub Dt:
|
11/10/2011
| | | | |
Title:
|
METHOD FOR FORMING A VERTICAL MOS TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
05/14/2013
|
Application #:
|
12778068
|
Filing Dt:
|
05/11/2010
|
Publication #:
|
|
Pub Dt:
|
11/17/2011
| | | | |
Title:
|
METHOD FOR SYNCHRONIZING REMOTE DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/16/2012
|
Application #:
|
12780943
|
Filing Dt:
|
05/17/2010
|
Publication #:
|
|
Pub Dt:
|
12/02/2010
| | | | |
Title:
|
BATTERY CHARGING CIRCUIT AND BATTERY CHARGER
|
|
|
Patent #:
|
|
Issue Dt:
|
10/09/2012
|
Application #:
|
12780947
|
Filing Dt:
|
05/17/2010
|
Publication #:
|
|
Pub Dt:
|
12/02/2010
| | | | |
Title:
|
BATTERY CHARGING CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
03/19/2013
|
Application #:
|
12781796
|
Filing Dt:
|
05/17/2010
|
Publication #:
|
|
Pub Dt:
|
12/02/2010
| | | | |
Title:
|
SENSOR OUTPUT CIRCUIT
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12784496
|
Filing Dt:
|
05/21/2010
|
Publication #:
|
|
Pub Dt:
|
12/16/2010
| | | | |
Title:
|
RESISTOR TESTING CIRCUIT AND BATTERY CHARGER INCLUDING RESISTOR TESTING CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
01/03/2012
|
Application #:
|
12785829
|
Filing Dt:
|
05/24/2010
|
Publication #:
|
|
Pub Dt:
|
09/16/2010
| | | | |
Title:
|
INTEGRATED CIRCUIT USING FINFETS AND HAVING A STATIC RANDOM ACCESS MEMORY (SRAM)
|
|
|
Patent #:
|
|
Issue Dt:
|
06/11/2013
|
Application #:
|
12786467
|
Filing Dt:
|
05/25/2010
|
Publication #:
|
|
Pub Dt:
|
12/01/2011
| | | | |
Title:
|
SYSTEM FOR TESTING INTEGRATED CIRCUIT WITH ASYNCHRONOUS CLOCK DOMAINS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/21/2012
|
Application #:
|
12786496
|
Filing Dt:
|
05/25/2010
|
Publication #:
|
|
Pub Dt:
|
12/01/2011
| | | | |
Title:
|
DUTY CYCLE CORRECTION CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
07/16/2013
|
Application #:
|
12786916
|
Filing Dt:
|
05/25/2010
|
Publication #:
|
|
Pub Dt:
|
12/01/2011
| | | | |
Title:
|
DATA PROCESSOR HAVING MULTIPLE LOW POWER MODES
|
|
|
Patent #:
|
|
Issue Dt:
|
11/06/2012
|
Application #:
|
12787101
|
Filing Dt:
|
05/25/2010
|
Publication #:
|
|
Pub Dt:
|
12/01/2011
| | | | |
Title:
|
ANGLED ION IMPLANTATION IN A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/09/2013
|
Application #:
|
12787262
|
Filing Dt:
|
05/25/2010
|
Publication #:
|
|
Pub Dt:
|
12/01/2011
| | | | |
Title:
|
DATA PROCESSING SYSTEM HAVING AN OPERATING SYSTEM ADAPTER AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
04/23/2013
|
Application #:
|
12787296
|
Filing Dt:
|
05/25/2010
|
Publication #:
|
|
Pub Dt:
|
12/01/2011
| | | | |
Title:
|
METHOD OF FORMING A SHARED CONTACT IN A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/17/2012
|
Application #:
|
12787402
|
Filing Dt:
|
05/26/2010
|
Publication #:
|
|
Pub Dt:
|
12/01/2011
| | | | |
Title:
|
METHOD AND SYSTEM FOR INTEGRATED CIRCUIT POWER SUPPLY MANAGEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
12/20/2011
|
Application #:
|
12787457
|
Filing Dt:
|
05/26/2010
|
Publication #:
|
|
Pub Dt:
|
12/01/2011
| | | | |
Title:
|
METHOD FOR SUPPLYING AN OUTPUT SUPPLY VOLTAGE TO A POWER GATED CIRCUIT AND AN INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
09/22/2015
|
Application #:
|
12788386
|
Filing Dt:
|
05/27/2010
|
Publication #:
|
|
Pub Dt:
|
12/01/2011
| | | | |
Title:
|
Video processing system, computer program product and method for managing a transfer of information between a memory unit and a decoder
|
|
|
Patent #:
|
|
Issue Dt:
|
02/04/2014
|
Application #:
|
12788769
|
Filing Dt:
|
05/27/2010
|
Publication #:
|
|
Pub Dt:
|
12/01/2011
| | | | |
Title:
|
CLOCK SIMULATION DEVICE AND METHODS THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
08/07/2012
|
Application #:
|
12791794
|
Filing Dt:
|
06/01/2010
|
Publication #:
|
|
Pub Dt:
|
12/01/2011
| | | | |
Title:
|
METHOD OF MAKING ROUTABLE LAYOUT PATTERN USING CONGESTION TABLE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/19/2016
|
Application #:
|
12791996
|
Filing Dt:
|
06/02/2010
|
Publication #:
|
|
Pub Dt:
|
09/16/2010
| | | | |
Title:
|
High Voltage Deep Trench Capacitor
|
|
|
Patent #:
|
|
Issue Dt:
|
11/04/2014
|
Application #:
|
12794591
|
Filing Dt:
|
06/04/2010
|
Publication #:
|
|
Pub Dt:
|
12/08/2011
| | | | |
Title:
|
METHODS AND APPARATUS FOR AN ISFET
|
|
|
Patent #:
|
|
Issue Dt:
|
09/06/2011
|
Application #:
|
12795664
|
Filing Dt:
|
06/08/2010
|
Title:
|
METHOD OF ASSEMBLING SEMICONDUCTOR DEVICE WITH HEAT SPREADER
|
|
|
Patent #:
|
|
Issue Dt:
|
04/24/2012
|
Application #:
|
12801610
|
Filing Dt:
|
06/17/2010
|
Publication #:
|
|
Pub Dt:
|
10/07/2010
| | | | |
Title:
|
METHOD AND SYSTEM FOR GENERATING WAVELETS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/23/2013
|
Application #:
|
12807591
|
Filing Dt:
|
09/09/2010
|
Publication #:
|
|
Pub Dt:
|
03/15/2012
| | | | |
Title:
|
Methods and apparatus for orthogonal modulated signals
|
|
|
Patent #:
|
|
Issue Dt:
|
03/12/2013
|
Application #:
|
12808382
|
Filing Dt:
|
06/16/2010
|
Publication #:
|
|
Pub Dt:
|
10/21/2010
| | | | |
Title:
|
MEMORY MAPPING SYSTEM, REQUEST CONTROLLER, MULTI-PROCESSING ARRANGEMENT, CENTRAL INTERRUPT REQUEST CONTROLLER, APPARATUS, METHOD FOR CONTROLLING MEMORY ACCESS AND COMPUTER PROGRAM PRODUCT
|
|
|
Patent #:
|
|
Issue Dt:
|
05/28/2013
|
Application #:
|
12810172
|
Filing Dt:
|
06/23/2010
|
Publication #:
|
|
Pub Dt:
|
11/11/2010
| | | | |
Title:
|
Performance estimation for adjusting processor parameter to execute a task taking account of resource available task inactive period
|
|
|
Patent #:
|
|
Issue Dt:
|
05/22/2012
|
Application #:
|
12811441
|
Filing Dt:
|
07/01/2010
|
Publication #:
|
|
Pub Dt:
|
11/11/2010
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND DIFFERENTIAL AMPLIFIER CIRCUIT THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
06/03/2014
|
Application #:
|
12811449
|
Filing Dt:
|
07/01/2010
|
Publication #:
|
|
Pub Dt:
|
11/04/2010
| | | | |
Title:
|
SEMICONDUCTOR PROCESSING METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
02/11/2014
|
Application #:
|
12811454
|
Filing Dt:
|
07/01/2010
|
Publication #:
|
|
Pub Dt:
|
11/11/2010
| | | | |
Title:
|
PROCESSOR BASED SYSTEM HAVING ECC BASED CHECK AND ACCESS VALIDATION INFORMATION MEANS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/30/2015
|
Application #:
|
12811804
|
Filing Dt:
|
07/06/2010
|
Publication #:
|
|
Pub Dt:
|
12/27/2012
| | | | |
Title:
|
MOS TRANSISTOR DRAIN-TO-GATE LEAKAGE PROTECTION CIRCUIT AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
02/05/2013
|
Application #:
|
12812031
|
Filing Dt:
|
07/08/2010
|
Publication #:
|
|
Pub Dt:
|
11/04/2010
| | | | |
Title:
|
METHOD AND APPARATUS FOR REGULATING A FIELD CURRENT FOR AN ALTERNATOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/07/2014
|
Application #:
|
12812032
|
Filing Dt:
|
07/08/2010
|
Publication #:
|
|
Pub Dt:
|
11/11/2010
| | | | |
Title:
|
CONTENTION FREE PARALLEL ACCESS SYSTEM AND A METHOD FOR CONTENTION FREE PARALLEL ACCESS TO A GROUP OF MEMORY BANKS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/07/2013
|
Application #:
|
12812035
|
Filing Dt:
|
07/08/2010
|
Publication #:
|
|
Pub Dt:
|
11/18/2010
| | | | |
Title:
|
METHOD OF FORMING OPENINGS IN A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE FABRICATED BY THE METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
02/25/2014
|
Application #:
|
12813903
|
Filing Dt:
|
06/11/2010
|
Publication #:
|
|
Pub Dt:
|
09/23/2010
| | | | |
Title:
|
LEAD FRAME BASED, OVER-MOLDED SEMICONDUCTOR PACKAGE WITH INTEGRATED THROUGH HOLE TECHNOLOGY (THT) HEAT SPREADER PIN(S) AND ASSOCIATED METHOD OF MANUFACTURING
|
|
|
Patent #:
|
|
Issue Dt:
|
09/10/2013
|
Application #:
|
12813974
|
Filing Dt:
|
06/11/2010
|
Publication #:
|
|
Pub Dt:
|
12/15/2011
| | | | |
Title:
|
ERROR DETECTION IN A CONTENT ADDRESSABLE MEMORY (CAM) AND METHOD OF OPERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
01/07/2014
|
Application #:
|
12817805
|
Filing Dt:
|
06/17/2010
|
Publication #:
|
|
Pub Dt:
|
12/22/2011
| | | | |
Title:
|
METHODS OF MAKING LATERALLY DOUBLE DIFFUSED METAL OXIDE SEMICONDUCTOR TRANSISTORS HAVING A REDUCED SURFACE FIELD STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/03/2013
|
Application #:
|
12818235
|
Filing Dt:
|
06/18/2010
|
Publication #:
|
|
Pub Dt:
|
12/22/2011
| | | | |
Title:
|
CIRCUIT HAVING GATE DRIVERS HAVING A LEVEL SHIFTER
|
|
|
Patent #:
|
|
Issue Dt:
|
06/17/2014
|
Application #:
|
12818270
|
Filing Dt:
|
06/18/2010
|
Publication #:
|
|
Pub Dt:
|
12/22/2011
| | | | |
Title:
|
SWITCHING REGULATOR WITH INPUT CURRENT LIMITING CAPABILITIES
|
|
|
Patent #:
|
|
Issue Dt:
|
11/20/2012
|
Application #:
|
12818536
|
Filing Dt:
|
06/18/2010
|
Publication #:
|
|
Pub Dt:
|
12/22/2011
| | | | |
Title:
|
METHOD FOR TESTING A CONTACT STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/02/2012
|
Application #:
|
12823487
|
Filing Dt:
|
06/25/2010
|
Publication #:
|
|
Pub Dt:
|
12/29/2011
| | | | |
Title:
|
REFRESH OPERATION DURING LOW POWER MODE CONFIGURATION
|
|
|
Patent #:
|
|
Issue Dt:
|
07/24/2012
|
Application #:
|
12824991
|
Filing Dt:
|
06/28/2010
|
Publication #:
|
|
Pub Dt:
|
12/29/2011
| | | | |
Title:
|
TRANSMISSION GATE CIRCUITRY FOR HIGH VOLTAGE TERMINAL
|
|
|
Patent #:
|
|
Issue Dt:
|
05/07/2013
|
Application #:
|
12826814
|
Filing Dt:
|
06/30/2010
|
Publication #:
|
|
Pub Dt:
|
01/05/2012
| | | | |
Title:
|
RECOVERY SCHEME FOR AN EMULATED MEMORY SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
11/30/2010
|
Application #:
|
12827211
|
Filing Dt:
|
06/30/2010
|
Publication #:
|
|
Pub Dt:
|
10/21/2010
| | | | |
Title:
|
INTEGRATED CIRCUIT MODULE AND METHOD OF PACKAGING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
06/11/2013
|
Application #:
|
12827848
|
Filing Dt:
|
06/30/2010
|
Publication #:
|
|
Pub Dt:
|
01/05/2012
| | | | |
Title:
|
DEVICE STRUCTURES FOR IN-PLANE AND OUT-OF-PLANE SENSING MICRO-ELECTRO-MECHANICAL SYSTEMS (MEMS)
|
|
|
Patent #:
|
|
Issue Dt:
|
08/30/2011
|
Application #:
|
12828469
|
Filing Dt:
|
07/01/2010
|
Publication #:
|
|
Pub Dt:
|
10/21/2010
| | | | |
Title:
|
DYNAMIC PAD SIZE TO REDUCE SOLDER FATIGUE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/11/2013
|
Application #:
|
12830421
|
Filing Dt:
|
07/05/2010
|
Publication #:
|
|
Pub Dt:
|
05/05/2011
| | | | |
Title:
|
METHOD OF FORMING SEMICONDUCTOR PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/16/2012
|
Application #:
|
12830446
|
Filing Dt:
|
07/06/2010
|
Publication #:
|
|
Pub Dt:
|
07/21/2011
| | | | |
Title:
|
DUAL DIE SEMICONDUCTOR PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/11/2011
|
Application #:
|
12832295
|
Filing Dt:
|
07/08/2010
|
Title:
|
DIFFERENTIAL AMPLIFIER THAT COMPENSATES FOR PROCESS VARIATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/07/2013
|
Application #:
|
12833430
|
Filing Dt:
|
07/09/2010
|
Publication #:
|
|
Pub Dt:
|
01/12/2012
| | | | |
Title:
|
BATTERY CELL EQUALIZER SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
09/11/2012
|
Application #:
|
12833597
|
Filing Dt:
|
07/09/2010
|
Publication #:
|
|
Pub Dt:
|
01/12/2012
| | | | |
Title:
|
CURRENT REDUCTION IN A SINGLE STAGE CYCLIC ANALOG TO DIGITAL CONVERTER WITH VARIABLE RESOLUTION
|
|
|
Patent #:
|
|
Issue Dt:
|
01/08/2013
|
Application #:
|
12835309
|
Filing Dt:
|
07/13/2010
|
Publication #:
|
|
Pub Dt:
|
01/19/2012
| | | | |
Title:
|
SOFT PROGRAM OF A NON-VOLATILE MEMORY BLOCK
|
|
|
Patent #:
|
|
Issue Dt:
|
07/16/2013
|
Application #:
|
12835900
|
Filing Dt:
|
07/14/2010
|
Publication #:
|
|
Pub Dt:
|
01/19/2012
| | | | |
Title:
|
CAPACITOR DEVICE USING AN ISOLATED WELL AND METHOD THEREFOR
|
|