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Reel/Frame:	031591/0266			Pages:	372
		Recorded:	11/06/2013
Attorney Dkt #:	CRS1-39000
Conveyance:	SECURITY AGREEMENT

Total properties: 6045
Page 61 of 61
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61

Patent #:	9024429	Issue Dt:	05/05/2015	Application #:	14013923	Filing Dt:	08/29/2013
Publication #:	US20150061139	Pub Dt:	03/05/2015
Title:	MICROELECTRONIC PACKAGES CONTAINING OPPOSING DEVICES AND METHODS FOR THE FABRICATION THEREOF

Patent #:	9111867	Issue Dt:	08/18/2015	Application #:	14015006	Filing Dt:	08/30/2013
Publication #:	US20150060989	Pub Dt:	03/05/2015
Title:	Split Gate Nanocrystal Memory Integration

Patent #:	9471785	Issue Dt:	10/18/2016	Application #:	14015429	Filing Dt:	08/30/2013
Publication #:	US20150067313	Pub Dt:	03/05/2015
Title:	SYSTEMS AND METHODS FOR SECURE BOOT ROM PATCH

Patent #:	9024663	Issue Dt:	05/05/2015	Application #:	14015519	Filing Dt:	08/30/2013
Publication #:	US20140006841	Pub Dt:	01/02/2014
Title:	CLOCK GLITCH DETECTION CIRCUIT

Patent #:	NONE	Issue Dt:		Application #:	14015889	Filing Dt:	08/30/2013
Publication #:	US20150067314	Pub Dt:	03/05/2015
Title:	SECURE FIRMWARE FLASH CONTROLLER

Patent #:	9172365	Issue Dt:	10/27/2015	Application #:	14016080	Filing Dt:	08/31/2013
Publication #:	US20150061750	Pub Dt:	03/05/2015
Title:	METHOD AND CIRCUIT FOR CONTROLLING TURNOFF OF A SEMICONDUCTOR SWITCHING ELEMENT

Patent #:	9129661	Issue Dt:	09/08/2015	Application #:	14016125	Filing Dt:	09/01/2013
Publication #:	US20150067275	Pub Dt:	03/05/2015
Title:	SINGLE PORT MEMORY THAT EMULATES DUAL PORT MEMORY

Patent #:	9099445	Issue Dt:	08/04/2015	Application #:	14016931	Filing Dt:	09/03/2013
Publication #:	US20140001650	Pub Dt:	01/02/2014
Title:	ELECTRONIC DEVICE INCLUDING INTERCONNECTS WITH A CAVITY THEREBETWEEN AND A PROCESS OF FORMING THE SAME

Patent #:	9322870	Issue Dt:	04/26/2016	Application #:	14016957	Filing Dt:	09/03/2013
Publication #:	US20150067429	Pub Dt:	03/05/2015
Title:	WAFER-LEVEL GATE STRESS TESTING

Patent #:	9087702	Issue Dt:	07/21/2015	Application #:	14017867	Filing Dt:	09/04/2013
Publication #:	US20150061097	Pub Dt:	03/05/2015
Title:	EDGE COUPLING OF SEMICONDUCTOR DIES

Patent #:	9061885	Issue Dt:	06/23/2015	Application #:	14018091	Filing Dt:	09/04/2013
Publication #:	US20140008739	Pub Dt:	01/09/2014
Title:	CAVITY BASED PACKAGING FOR MEMS DEVICES

Patent #:	9360319	Issue Dt:	06/07/2016	Application #:	14019066	Filing Dt:	09/05/2013
Publication #:	US20150059473	Pub Dt:	03/05/2015
Title:	MULTIPLE SENSE AXIS MEMS GYROSCOPE HAVING A SINGLE DRIVE MODE

Patent #:	9093272	Issue Dt:	07/28/2015	Application #:	14020532	Filing Dt:	09/06/2013
Publication #:	US20140011344	Pub Dt:	01/09/2014
Title:	METHODS OF FORMING ELECTRONIC ELEMENTS WITH ESD PROTECTION

Patent #:	NONE	Issue Dt:		Application #:	14020840	Filing Dt:	09/08/2013
Publication #:	US20150069537	Pub Dt:	03/12/2015
Title:	PACKAGE-ON-PACKAGE SEMICONDUCTOR SENSOR DEVICE

Patent #:	9159682	Issue Dt:	10/13/2015	Application #:	14020841	Filing Dt:	09/08/2013
Publication #:	US20150069603	Pub Dt:	03/12/2015
Title:	COPPER PILLAR BUMP AND FLIP CHIP PACKAGE USING SAME

Patent #:	9142566	Issue Dt:	09/22/2015	Application #:	14021485	Filing Dt:	09/09/2013
Publication #:	US20150069524	Pub Dt:	03/12/2015
Title:	Method of Forming Different Voltage Devices with High-K Metal Gate

Patent #:	9054208	Issue Dt:	06/09/2015	Application #:	14022646	Filing Dt:	09/10/2013
Publication #:	US20150069490	Pub Dt:	03/12/2015
Title:	Methods For Forming Contact Landing Regions In Split-Gate Non-Volatile Memory (NVM) Cell Arrays

Patent #:	8908449	Issue Dt:	12/09/2014	Application #:	14022872	Filing Dt:	09/10/2013
Title:	MASTER-SLAVE FLIP-FLOP WITH REDUCED SETUP TIME

Patent #:	9129996	Issue Dt:	09/08/2015	Application #:	14023440	Filing Dt:	09/10/2013
Publication #:	US20150072489	Pub Dt:	03/12/2015
Title:	NON-VOLATILE MEMORY (NVM) CELL AND HIGH-K AND METAL GATE TRANSISTOR INTEGRATION

Patent #:	9658971	Issue Dt:	05/23/2017	Application #:	14023781	Filing Dt:	09/11/2013
Publication #:	US20150074319	Pub Dt:	03/12/2015
Title:	UNIVERSAL SPI (SERIAL PERIPHERAL INTERFACE)

Patent #:	NONE	Issue Dt:		Application #:	14024742	Filing Dt:	09/12/2013
Publication #:	US20150069624	Pub Dt:	03/12/2015
Title:	RECESSED SEMICONDUCTOR DIE STACK

Patent #:	9292456	Issue Dt:	03/22/2016	Application #:	14028489	Filing Dt:	09/16/2013
Publication #:	US20150081934	Pub Dt:	03/19/2015
Title:	SYSTEM AND METHOD FOR DATA SYNCHRONIZATION ACROSS DIGITAL DEVICE INTERFACES

Patent #:	NONE	Issue Dt:		Application #:	14029766	Filing Dt:	09/17/2013
Publication #:	US20150075849	Pub Dt:	03/19/2015
Title:	SEMICONDUCTOR DEVICE AND LEAD FRAME WITH INTERPOSER

Patent #:	9064838	Issue Dt:	06/23/2015	Application #:	14029779	Filing Dt:	09/17/2013
Publication #:	US20150076680	Pub Dt:	03/19/2015
Title:	HEAT SPREADER FOR INTEGRATED CIRCUIT DEVICE

Patent #:	9040335	Issue Dt:	05/26/2015	Application #:	14029783	Filing Dt:	09/17/2013
Publication #:	US20150076630	Pub Dt:	03/19/2015
Title:	SIDE VENTED PRESSURE SENSOR DEVICE

Patent #:	9139155	Issue Dt:	09/22/2015	Application #:	14029976	Filing Dt:	09/18/2013
Publication #:	US20150075401	Pub Dt:	03/19/2015
Title:	SQUIB DRIVER DIAGNOSTIC CIRCUIT AND METHOD

Patent #:	NONE	Issue Dt:		Application #:	14030952	Filing Dt:	09/18/2013
Publication #:	US20150076700	Pub Dt:	03/19/2015
Title:	SYSTEM-IN-PACKAGES CONTAINING EMBEDDED SURFACE MOUNT DEVICES AND METHODS FOR THE FABRICATION THEREOF

Patent #:	8995200	Issue Dt:	03/31/2015	Application #:	14033622	Filing Dt:	09/23/2013
Publication #:	US20150085593	Pub Dt:	03/26/2015
Title:	NON-VOLATILE MEMORY (NVM) WITH DYNAMICALLY ADJUSTED REFERENCE CURRENT

Patent #:	9330961	Issue Dt:	05/03/2016	Application #:	14034213	Filing Dt:	09/23/2013
Publication #:	US20150085407	Pub Dt:	03/26/2015
Title:	STACKED PROTECTION DEVICES AND RELATED FABRICATION METHODS

Patent #:	9110484	Issue Dt:	08/18/2015	Application #:	14035704	Filing Dt:	09/24/2013
Publication #:	US20150084684	Pub Dt:	03/26/2015
Title:	TEMPERATURE DEPENDENT BIASING FOR LEAKAGE POWER REDUCTION

Patent #:	9281256	Issue Dt:	03/08/2016	Application #:	14035999	Filing Dt:	09/25/2013
Publication #:	US20150084168	Pub Dt:	03/26/2015
Title:	PACKAGE ENCAPSULANT RELIEF FEATURE

Patent #:	10127998	Issue Dt:	11/13/2018	Application #:	14038401	Filing Dt:	09/26/2013
Publication #:	US20150085557	Pub Dt:	03/26/2015
Title:	MEMORY HAVING ONE TIME PROGRAMMABLE (OTP) ELEMENTS AND A METHOD OF PROGRAMMING THE MEMORY

Patent #:	9432033	Issue Dt:	08/30/2016	Application #:	14039562	Filing Dt:	09/27/2013
Publication #:	US20150091622	Pub Dt:	04/02/2015
Title:	SYSTEM AND METHOD FOR ENABLING MAXIMUM PERFORMANCE OPERATION WITHIN AN EXTENDED AMBIENT TEMPERATURE RANGE

Patent #:	9508701	Issue Dt:	11/29/2016	Application #:	14039622	Filing Dt:	09/27/2013
Publication #:	US20150091178	Pub Dt:	04/02/2015
Title:	3D DEVICE PACKAGING USING THROUGH-SUBSTRATE PILLARS

Patent #:	9213524	Issue Dt:	12/15/2015	Application #:	14040795	Filing Dt:	09/30/2013
Publication #:	US20150095393	Pub Dt:	04/02/2015
Title:	METHOD AND DEVICE FOR GENERATING FLOATING-POINT VALUES

Patent #:	NONE	Issue Dt:		Application #:	14041449	Filing Dt:	09/30/2013
Publication #:	US20150093863	Pub Dt:	04/02/2015
Title:	METHOD OF MAKING A FLOATING GATE NON-VOLATILE MEMORY (NVM) WITH BREAKDOWN PREVENTION

Patent #:	9136129	Issue Dt:	09/15/2015	Application #:	14041591	Filing Dt:	09/30/2013
Publication #:	US20150093864	Pub Dt:	04/02/2015
Title:	NON-VOLATILE MEMORY (NVM) AND HIGH-K AND METAL GATE INTEGRATION USING GATE-LAST METHODOLOGY

Patent #:	9129855	Issue Dt:	09/08/2015	Application #:	14041647	Filing Dt:	09/30/2013
Publication #:	US20150091079	Pub Dt:	04/02/2015
Title:	NON-VOLATILE MEMORY (NVM) AND HIGH-K AND METAL GATE INTEGRATION USING GATE-FIRST METHODOLOGY

Patent #:	8901632	Issue Dt:	12/02/2014	Application #:	14041662	Filing Dt:	09/30/2013
Title:	NON-VOLATILE MEMORY (NVM) AND HIGH-K AND METAL GATE INTEGRATION USING GATE-LAST METHODOLOGY

Patent #:	8681568	Issue Dt:	03/25/2014	Application #:	14041697	Filing Dt:	09/30/2013
Publication #:	US20140029348	Pub Dt:	01/30/2014
Title:	DYNAMIC PROGRAMMING FOR FLASH MEMORY

Patent #:	9218293	Issue Dt:	12/22/2015	Application #:	14041910	Filing Dt:	09/30/2013
Publication #:	US20150095583	Pub Dt:	04/02/2015
Title:	DATA PROCESSING SYSTEM WITH CACHE LINEFILL BUFFER AND METHOD OF OPERATION

Patent #:	NONE	Issue Dt:		Application #:	14041968	Filing Dt:	09/30/2013
Publication #:	US20150091196	Pub Dt:	04/02/2015
Title:	MOLD LOCKS FOR LAMINATE SUBSTRATES

Patent #:	9036363	Issue Dt:	05/19/2015	Application #:	14042623	Filing Dt:	09/30/2013
Publication #:	US20150092372	Pub Dt:	04/02/2015
Title:	DEVICES AND STACKED MICROELECTRONIC PACKAGES WITH PARALLEL CONDUCTORS AND INTRA-CONDUCTOR ISOLATOR STRUCTURES AND METHODS OF THEIR FABRICATION

Patent #:	9025340	Issue Dt:	05/05/2015	Application #:	14042628	Filing Dt:	09/30/2013
Publication #:	US20150092377	Pub Dt:	04/02/2015
Title:	DEVICES AND STACKED MICROELECTRONIC PACKAGES WITH IN-TRENCH PACKAGE SURFACE CONDUCTORS AND METHODS OF THEIR FABRICATION

Patent #:	9437574	Issue Dt:	09/06/2016	Application #:	14042662	Filing Dt:	09/30/2013
Publication #:	US20150090480	Pub Dt:	04/02/2015
Title:	ELECTRONIC COMPONENT PACKAGE AND METHOD FOR FORMING SAME

Assignor

FREESCALE SEMICONDUCTOR, INC.

Exec Dt:

11/01/2013

Assignee

CITIBANK, N.A., AS NOTES COLLATERAL AGENT

390 GREENWICH STREET

NEW YORK, NEW YORK 10013

Correspondence name and address
	IP RESEARCH PLUS, INC.
	21 TADCASTER CIRCLE
	ATTN: PENELOPE J.A. AGODOA
	WALDORF, MD 20602

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