Patent Assignment Details
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For pending or abandoned applications please consult USPTO staff.
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Reel/Frame: | 045282/0298 | |
| Pages: | 4 |
| | Recorded: | 02/08/2018 | | |
Attorney Dkt #: | 30100-103939PT |
Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
5
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Patent #:
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Issue Dt:
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05/06/2003
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Application #:
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09851096
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Filing Dt:
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05/09/2001
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Publication #:
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Pub Dt:
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11/22/2001
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Title:
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METHOD OF CHECKING PATTERN MEASUREMENT AND IMAGE RECOGNITION ASSISTING PATTERN
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Patent #:
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Issue Dt:
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07/29/2003
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Application #:
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10179205
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Filing Dt:
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06/26/2002
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Publication #:
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Pub Dt:
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11/28/2002
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Title:
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VOLTAGE GENERATING CIRCUIT AND REFERENCE VOLTAGE SOURCE CIRCUIT EMPLOYING FIELD EFFECT TRANSISTORS
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Patent #:
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Issue Dt:
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07/27/2004
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Application #:
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10392886
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Filing Dt:
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03/21/2003
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Publication #:
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Pub Dt:
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07/31/2003
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Title:
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CHARGE/DISCHARGE PROTECTION CIRCUIT WITH LATCH CIRCUIT FOR PROTECTING A CHARGE CONTROL FET FROM OVERHEATING IN A PORTABLE DEVICE
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Patent #:
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Issue Dt:
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07/17/2007
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Application #:
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11234005
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Filing Dt:
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09/23/2005
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Publication #:
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Pub Dt:
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03/30/2006
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Title:
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LEVEL SHIFT CIRCUIT HAVING TIMING ADJUSTMENT CIRCUIT FOR MAINTAINING DUTY RATIO
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Patent #:
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Issue Dt:
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10/25/2011
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Application #:
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12703405
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Filing Dt:
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02/10/2010
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Publication #:
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Pub Dt:
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10/14/2010
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Title:
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EFFICIENT PROVISION OF ALIGNMENT MARKS ON SEMICONDUCTOR WAFER
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Assignee
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13-1, HIMEMURO-CHO, IKEDA-SHI |
OSAKA, JAPAN 563-8501 |
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Correspondence name and address
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ROXANA A. SULLIVAN
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2 NORTH RIVERSIDE PLAZA, SUITE 1500
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CHICAGO, IL 60606
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