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Patent Assignment Details
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Reel/Frame:010584/0305   Pages: 9
Recorded: 02/04/2000
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1
1
Patent #:
Issue Dt:
05/04/2004
Application #:
09333770
Filing Dt:
06/15/1999
Publication #:
Pub Dt:
07/04/2002
Title:
METHODS FOR FORMING WORDLINES, TRANSISTOR GATES, AND CONDUCTIVE INTERCONNECTS, AND WORDLINE, TRANSISTOR GATE, AND CONDUCTIVE INTERCONNECT STRUCTURES
Assignors
1
Exec Dt:
06/08/1999
2
Exec Dt:
05/24/1999
Assignee
1
8000 S. FEDERAL WAY
BOISE, IDAHO 83706
Correspondence name and address
WELLS, ST. JOHN, ROBERTS ET AL.
DAVID G. LATWESEN
601 WEST FIRST AVENUE
SUITE 1300
SPOKANE, WA 99201

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