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Total properties:
30
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Patent #:
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Issue Dt:
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05/19/2009
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Application #:
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10378061
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Filing Dt:
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02/28/2003
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Publication #:
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Pub Dt:
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09/02/2004
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Title:
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SEGMENTED VIRTUAL MACHINE
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Patent #:
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Issue Dt:
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10/03/2006
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Application #:
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10701388
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Filing Dt:
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11/04/2003
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Title:
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MEMORY MANAGEMENT
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Patent #:
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Issue Dt:
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04/10/2007
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Application #:
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10710066
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Filing Dt:
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06/16/2004
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Title:
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ADDRESS ERROR DETECTION BY MERGING A POLYNOMIAL-BASED CRC CODE OF ADDRESS BITS WITH TWO NIBBLES OF DATA OR DATA ECC BITS
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Patent #:
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Issue Dt:
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05/29/2007
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Application #:
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10711387
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Filing Dt:
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09/15/2004
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Title:
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DUPLICATE SNOOP TAGS PARTITIONED ACROSS MULTIPLE PROCESSOR/CACHE CHIPS IN A MULTI-PROCESSOR SYSTEM
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Patent #:
|
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Issue Dt:
|
10/02/2007
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Application #:
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10816471
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Filing Dt:
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04/01/2004
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Title:
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COOPERATIVE MEMORY MANAGEMENT
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Patent #:
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Issue Dt:
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07/15/2008
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Application #:
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10858832
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Filing Dt:
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06/01/2004
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Title:
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EXPANDED MEMORY SPACE IN ENVIRONMENTS INCLUDING VIRTUAL MACHINES
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Patent #:
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Issue Dt:
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05/30/2006
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Application #:
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10906438
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Filing Dt:
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02/19/2005
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Title:
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MULTI-CHIP PACKAGE HAVING REPAIRABLE EMBEDDED MEMORIES ON A SYSTEM CHIP WITH AN EEPROM CHIP STORING REPAIR INFORMATION
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Patent #:
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Issue Dt:
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07/24/2007
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Application #:
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10907662
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Filing Dt:
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04/11/2005
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Title:
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ERROR RECOVERY OF VARIABLE-LENGTH PACKETS WITHOUT SEQUENCE NUMBERS OR SPECIAL SYMBOLS USED FOR SYNCHRONIZING TRANSMIT RETRY-BUFFER POINTER
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Patent #:
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|
Issue Dt:
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10/14/2008
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Application #:
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10908586
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Filing Dt:
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05/18/2005
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Title:
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WRITE-BACK CACHE WITH DIFFERENT ECC CODINGS FOR CLEAN AND DIRTY LINES WITH REFETCHING OF UNCORRECTABLE CLEAN LINES
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Patent #:
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Issue Dt:
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12/23/2008
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Application #:
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11031015
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Filing Dt:
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01/07/2005
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Publication #:
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Pub Dt:
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07/13/2006
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Title:
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SYSTEM AND METHOD FOR CONCURRENT COMPACTING SELF PACING GARBAGE COLLECTION USING LOADED VALUE AND ACCESS BARRIERS
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Patent #:
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Issue Dt:
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05/20/2008
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Application #:
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11117657
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Filing Dt:
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04/27/2005
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Title:
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SPECULATIVE MULTIADDRESS ATOMICITY
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Patent #:
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Issue Dt:
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07/08/2008
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Application #:
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11161042
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Filing Dt:
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07/20/2005
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Title:
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ENCODING 64-BIT DATA NIBBLE ERROR CORRECT AND CYCLIC-REDUNDANCY CODE (CRC) ADDRESS ERROR DETECT FOR USE ON A 76-BIT MEMORY MODULE
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Patent #:
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Issue Dt:
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02/26/2008
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Application #:
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11162578
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Filing Dt:
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09/15/2005
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Title:
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MULTI-LEVEL POWER MONITORING, FILTERING AND THROTTLING AT LOCAL BLOCKS AND GLOBALLY
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|
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Patent #:
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|
Issue Dt:
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08/28/2007
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Application #:
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11162595
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Filing Dt:
|
09/15/2005
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Title:
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TESTING REPLICATED SUB-SYSTEMS IN A YIELD-ENHANCING CHIP-TEST
ENVIRONMENT USING ON-CHIP COMPARE TO EXPECTED RESULTS FOR PARALLEL SCAN CHAINS TESTING CRITICAL AND REPAIRABLE SECTIONS OF EACH SUB-SYSTEM
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|
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Patent #:
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NONE
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Issue Dt:
|
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Application #:
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11164011
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Filing Dt:
|
11/07/2005
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|
Publication #:
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|
Pub Dt:
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05/10/2007
| | | | |
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Title:
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Efficient Streaming of Un-Aligned Load/Store Instructions that Save Unused Non-Aligned Data in a Scratch Register for the Next Instruction
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|
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Patent #:
|
|
Issue Dt:
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01/20/2009
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Application #:
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11165827
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Filing Dt:
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06/24/2005
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|
Title:
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SEGMENTED VIRTUAL MACHINE TRANSPORT MECHANISM
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|
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Patent #:
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|
Issue Dt:
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07/15/2008
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Application #:
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11227423
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Filing Dt:
|
09/14/2005
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Title:
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MEMORY ADDRESSING
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|
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Patent #:
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Issue Dt:
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06/23/2009
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Application #:
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11227448
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Filing Dt:
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09/14/2005
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Title:
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ORDERING OPERATION
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Patent #:
|
|
Issue Dt:
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08/18/2009
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Application #:
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11296191
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Filing Dt:
|
12/06/2005
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Title:
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ARRAY ACCESS
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|
|
|
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Patent #:
|
|
Issue Dt:
|
04/29/2008
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Application #:
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11307413
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Filing Dt:
|
02/06/2006
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|
Publication #:
|
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Pub Dt:
|
08/09/2007
| | | | |
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Title:
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DISTRIBUTED CACHE COHERENCE AT SCALABLE REQUESTOR FILTER PIPES THAT ACCUMULATE INVALIDATION ACKNOWLEDGEMENTS FROM OTHER REQUESTOR FILTER PIPES USING ORDERING MESSAGES FROM CENTRAL SNOOP TAG
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|
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Patent #:
|
|
Issue Dt:
|
01/27/2009
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Application #:
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11308039
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Filing Dt:
|
03/03/2006
|
|
Title:
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SELF-CHECKING TEST GENERATOR FOR PARTIALLY-MODELED PROCESSORS BY PROPAGATING FUZZY STATES
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|
|
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Patent #:
|
|
Issue Dt:
|
02/19/2008
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Application #:
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11308048
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Filing Dt:
|
03/03/2006
|
|
Title:
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WIDE-SCAN ON-CHIP LOGIC ANALYZER WITH GLOBAL TRIGGER AND INTERLEAVED SRAM CAPTURE BUFFERS
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|
|
|
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Patent #:
|
|
Issue Dt:
|
09/16/2014
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Application #:
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11449154
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Filing Dt:
|
06/07/2006
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|
Publication #:
|
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Pub Dt:
|
12/13/2007
| | | | |
|
Title:
|
CPU utilization metering on sytems that include multiple hardware threads per core
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|
|
|
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Patent #:
|
|
Issue Dt:
|
08/14/2007
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Application #:
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11503388
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Filing Dt:
|
08/11/2006
|
|
Publication #:
|
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Pub Dt:
|
03/22/2007
| | | | |
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Title:
|
MEMORY MANAGEMENT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/21/2009
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Application #:
|
11894434
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Filing Dt:
|
08/20/2007
|
|
Publication #:
|
|
Pub Dt:
|
12/20/2007
| | | | |
|
Title:
|
COOPERATIVE MEMORY MANAGEMENT ALLOWING PROGRAM REQUEST AND RELEASE MEMORY AS NEEDED
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/21/2009
|
Application #:
|
11894434
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Filing Dt:
|
08/20/2007
|
|
Publication #:
|
|
Pub Dt:
|
12/20/2007
| | | | |
|
Title:
|
COOPERATIVE MEMORY MANAGEMENT ALLOWING PROGRAM REQUEST AND RELEASE MEMORY AS NEEDED
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/17/2012
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Application #:
|
12132839
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Filing Dt:
|
06/04/2008
|
|
Publication #:
|
|
Pub Dt:
|
09/25/2008
| | | | |
|
Title:
|
SUBSYSTEM AND METHOD FOR ENCODING 64-BIT DATA NIBBLE ERROR CORRECT AND CYCLIC-REDUNDANCY CODE (CRC) ADDRESS ERROR DETECT FOR USE IN A 76-BIT MEMORY MODULE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/05/2011
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Application #:
|
12151430
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Filing Dt:
|
05/05/2008
|
|
Publication #:
|
|
Pub Dt:
|
11/13/2008
| | | | |
|
Title:
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MEMORY MANAGEMENT BASED ON CONCURRENT GARBAGE COLLECTION USING SAFEPOINTS
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|
|
|
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Patent #:
|
|
Issue Dt:
|
09/25/2012
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Application #:
|
12315854
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Filing Dt:
|
12/05/2008
|
|
Publication #:
|
|
Pub Dt:
|
07/09/2009
| | | | |
|
Title:
|
SEGMENTED VIRTUAL MACHINE TRANSPORT MECHANISM
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/18/2012
|
Application #:
|
12315857
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Filing Dt:
|
12/05/2008
|
|
Publication #:
|
|
Pub Dt:
|
07/02/2009
| | | | |
|
Title:
|
REDUCING LATENCY IN A SEGMENTED VIRTUAL MACHINE
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