Total properties:
40
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Patent #:
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Issue Dt:
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07/07/2015
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Application #:
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13555894
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Filing Dt:
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07/23/2012
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Publication #:
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Pub Dt:
|
08/22/2013
| | | | |
Title:
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METHOD AND APPARATUS FOR ENSURING DATA CACHE COHERENCY
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Patent #:
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|
Issue Dt:
|
05/05/2015
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Application #:
|
13772759
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Filing Dt:
|
02/21/2013
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Publication #:
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Pub Dt:
|
08/22/2013
| | | | |
Title:
|
MULTI-THRESHOLD FLASH NCL CIRCUITRY
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Patent #:
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Issue Dt:
|
03/17/2015
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Application #:
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13827902
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Filing Dt:
|
03/14/2013
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Publication #:
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Pub Dt:
|
08/22/2013
| | | | |
Title:
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SELF-READY FLASH NULL CONVENTION LOGIC
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Patent #:
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Issue Dt:
|
12/01/2015
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Application #:
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13894072
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Filing Dt:
|
05/14/2013
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Publication #:
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Pub Dt:
|
09/26/2013
| | | | |
Title:
|
IMPLEMENTATION METHOD FOR FAST NCL DATA PATH
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|
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Patent #:
|
|
Issue Dt:
|
02/10/2015
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Application #:
|
13969675
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Filing Dt:
|
08/19/2013
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Publication #:
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|
Pub Dt:
|
02/20/2014
| | | | |
Title:
|
HUM GENERATION CIRCUITRY
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|
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Patent #:
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|
Issue Dt:
|
02/07/2017
|
Application #:
|
14099949
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Filing Dt:
|
12/07/2013
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Publication #:
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Pub Dt:
|
06/12/2014
| | | | |
Title:
|
EXTENSIBLE ITERATIVE MULTIPLIER
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|
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Patent #:
|
|
Issue Dt:
|
04/03/2018
|
Application #:
|
14136754
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Filing Dt:
|
12/20/2013
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Publication #:
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|
Pub Dt:
|
06/26/2014
| | | | |
Title:
|
SELECTIVELY COMBINABLE SHIFTERS
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|
Patent #:
|
|
Issue Dt:
|
03/07/2017
|
Application #:
|
14149009
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Filing Dt:
|
01/07/2014
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Publication #:
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Pub Dt:
|
07/10/2014
| | | | |
Title:
|
SOFTWARE BASED APPLICATION SPECIFIC INTEGRATED CIRCUIT
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|
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Patent #:
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|
Issue Dt:
|
02/09/2016
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Application #:
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14487678
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Filing Dt:
|
09/16/2014
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Publication #:
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Pub Dt:
|
03/19/2015
| | | | |
Title:
|
MULTI-THRESHOLD CIRCUITRY BASED ON SILICON-ON-INSULATOR TECHNOLOGY
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|
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Patent #:
|
|
Issue Dt:
|
03/07/2017
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Application #:
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14530624
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Filing Dt:
|
10/31/2014
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Publication #:
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|
Pub Dt:
|
05/07/2015
| | | | |
Title:
|
LOGICAL ELEMENTS WITH SWITCHABLE CONNECTIONS
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|
|
Patent #:
|
|
Issue Dt:
|
07/05/2016
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Application #:
|
14703483
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Filing Dt:
|
05/04/2015
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Publication #:
|
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Pub Dt:
|
08/20/2015
| | | | |
Title:
|
MULTI-THRESHOLD FLASH NCL LOGIC CIRCUITRY WITH FLASH RESET
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|
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Patent #:
|
|
Issue Dt:
|
08/07/2018
|
Application #:
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14928314
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Filing Dt:
|
10/30/2015
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Publication #:
|
|
Pub Dt:
|
05/05/2016
| | | | |
Title:
|
COMPUTING RESOURCE ALLOCATION BASED ON FLOW GRAPH TRANSLATION
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|
|
Patent #:
|
|
Issue Dt:
|
06/27/2017
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Application #:
|
14941554
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Filing Dt:
|
11/14/2015
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Publication #:
|
|
Pub Dt:
|
05/19/2016
| | | | |
Title:
|
COMPACT LOGIC EVALUATION GATES USING NULL CONVENTION
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|
|
Patent #:
|
|
Issue Dt:
|
09/11/2018
|
Application #:
|
15048983
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Filing Dt:
|
02/19/2016
|
Publication #:
|
|
Pub Dt:
|
08/25/2016
| | | | |
Title:
|
INSTRUCTION PAGING IN RECONFIGURABLE FABRIC
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|
|
Patent #:
|
|
Issue Dt:
|
12/10/2019
|
Application #:
|
15225768
|
Filing Dt:
|
08/01/2016
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Title:
|
DATA UPLOADING TO ASYNCHRONOUS CIRCUITRY USING CIRCULAR BUFFER CONTROL
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|
|
Patent #:
|
|
Issue Dt:
|
08/06/2019
|
Application #:
|
15226472
|
Filing Dt:
|
08/02/2016
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Title:
|
DATA TRANSFER CIRCUITRY GIVEN MULTIPLE SOURCE ELEMENTS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/26/2019
|
Application #:
|
15443612
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Filing Dt:
|
02/27/2017
|
Publication #:
|
|
Pub Dt:
|
06/22/2017
| | | | |
Title:
|
LOGICAL ELEMENTS WITH SWITCHABLE CONNECTIONS FOR MULTIFUNCTION OPERATION
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|
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Patent #:
|
|
Issue Dt:
|
03/17/2020
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Application #:
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15449852
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Filing Dt:
|
03/03/2017
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Publication #:
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Pub Dt:
|
06/22/2017
| | | | |
Title:
|
RECONFIGURABLE INTERCONNECTED PROGRAMMABLE PROCESSORS
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|
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Patent #:
|
|
Issue Dt:
|
05/01/2018
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Application #:
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15475411
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Filing Dt:
|
03/31/2017
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Publication #:
|
|
Pub Dt:
|
10/05/2017
| | | | |
Title:
|
HUM GENERATION USING REPRESENTATIVE CIRCUITRY
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|
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Patent #:
|
|
Issue Dt:
|
06/11/2019
|
Application #:
|
15628307
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Filing Dt:
|
06/20/2017
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Publication #:
|
|
Pub Dt:
|
12/28/2017
| | | | |
Title:
|
TIMING ANALYSIS AND OPTIMIZATION OF ASYNCHRONOUS CIRCUIT DESIGNS
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|
|
Patent #:
|
|
Issue Dt:
|
02/18/2020
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Application #:
|
15665631
|
Filing Dt:
|
08/01/2017
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Publication #:
|
|
Pub Dt:
|
03/01/2018
| | | | |
Title:
|
COMMUNICATION BETWEEN DATAFLOW PROCESSING UNITS AND MEMORIES
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|
|
Patent #:
|
|
Issue Dt:
|
02/12/2019
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Application #:
|
15667338
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Filing Dt:
|
08/02/2017
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Publication #:
|
|
Pub Dt:
|
12/14/2017
| | | | |
Title:
|
POWER CONTROL WITHIN A DATAFLOW PROCESSOR
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|
|
Patent #:
|
|
Issue Dt:
|
07/21/2020
|
Application #:
|
15712494
|
Filing Dt:
|
09/22/2017
|
Publication #:
|
|
Pub Dt:
|
03/29/2018
| | | | |
Title:
|
RECONFIGURABLE FABRIC DIRECT MEMORY ACCESS WITH MULTIPLE READ OR WRITE ELEMENTS
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|
|
Patent #:
|
|
Issue Dt:
|
05/14/2019
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Application #:
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15941826
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Filing Dt:
|
03/30/2018
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Publication #:
|
|
Pub Dt:
|
08/09/2018
| | | | |
Title:
|
SELECTIVELY COMBINABLE DIRECTIONAL SHIFTERS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/22/2019
|
Application #:
|
15953896
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Filing Dt:
|
04/16/2018
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Publication #:
|
|
Pub Dt:
|
10/18/2018
| | | | |
Title:
|
RECONFIGURABLE PROCESSOR FABRIC IMPLEMENTATION USING SATISFIABILITY ANALYSIS
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|
|
Patent #:
|
|
Issue Dt:
|
05/19/2020
|
Application #:
|
16021840
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Filing Dt:
|
06/28/2018
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Publication #:
|
|
Pub Dt:
|
11/08/2018
| | | | |
Title:
|
JOINING DATA WITHIN A RECONFIGURABLE FABRIC
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|
|
Patent #:
|
|
Issue Dt:
|
10/08/2019
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Application #:
|
16126107
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Filing Dt:
|
09/10/2018
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Publication #:
|
|
Pub Dt:
|
01/03/2019
| | | | |
Title:
|
BRANCHLESS INSTRUCTION PAGING IN RECONFIGURABLE FABRIC
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|
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Patent #:
|
|
Issue Dt:
|
08/06/2019
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Application #:
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16176922
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Filing Dt:
|
10/31/2018
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Publication #:
|
|
Pub Dt:
|
03/07/2019
| | | | |
Title:
|
LOGICAL ELEMENTS WITH SWITCHABLE CONNECTIONS IN A RECONFIGURABLE FABRIC
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|
|
Patent #:
|
|
Issue Dt:
|
05/19/2020
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Application #:
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16272039
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Filing Dt:
|
02/11/2019
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Publication #:
|
|
Pub Dt:
|
06/06/2019
| | | | |
Title:
|
POWER CONTROL FOR A DATAFLOW PROCESSOR
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|
|
Patent #:
|
NONE
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Issue Dt:
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|
Application #:
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16423050
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Filing Dt:
|
05/27/2019
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Publication #:
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|
Pub Dt:
|
09/12/2019
| | | | |
Title:
|
DATA FLOW GRAPH NODE PARALLEL UPDATE FOR MACHINE LEARNING
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|
|
Patent #:
|
NONE
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Issue Dt:
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|
Application #:
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16423051
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Filing Dt:
|
05/27/2019
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Publication #:
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|
Pub Dt:
|
09/12/2019
| | | | |
Title:
|
DATA FLOW GRAPH NODE UPDATE FOR MACHINE LEARNING
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Patent #:
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Issue Dt:
|
08/31/2021
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Application #:
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16459731
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Filing Dt:
|
07/02/2019
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Publication #:
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Pub Dt:
|
10/24/2019
| | | | |
Title:
|
NEURAL NETWORK OUTPUT LAYER FOR MACHINE LEARNING
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Patent #:
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Issue Dt:
|
03/16/2021
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Application #:
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16502110
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Filing Dt:
|
07/03/2019
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Publication #:
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Pub Dt:
|
10/24/2019
| | | | |
Title:
|
DATA FLOW GRAPH COMPUTATION USING EXCEPTIONS
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Patent #:
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Issue Dt:
|
01/18/2022
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Application #:
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16835812
|
Filing Dt:
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03/31/2020
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Publication #:
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Pub Dt:
|
10/01/2020
| | | | |
Title:
|
MATRIX MULTIPLICATION ENGINE USING PIPELINING
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Patent #:
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Issue Dt:
|
10/25/2022
|
Application #:
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16943252
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Filing Dt:
|
07/30/2020
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Publication #:
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Pub Dt:
|
12/10/2020
| | | | |
Title:
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INTEGER MATRIX MULTIPLICATION ENGINE USING PIPELINING
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Patent #:
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Issue Dt:
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05/04/2021
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Application #:
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16991080
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Filing Dt:
|
08/12/2020
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Publication #:
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Pub Dt:
|
11/26/2020
| | | | |
Title:
|
MULTIDIMENSIONAL ADDRESS GENERATION FOR DIRECT MEMORY ACCESS
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Patent #:
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Issue Dt:
|
03/19/2024
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Application #:
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17035869
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Filing Dt:
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09/29/2020
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Publication #:
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Pub Dt:
|
01/14/2021
| | | | |
Title:
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PROCESSOR CLUSTER ADDRESS GENERATION
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Patent #:
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Issue Dt:
|
12/05/2023
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Application #:
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17548463
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Filing Dt:
|
12/10/2021
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Publication #:
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Pub Dt:
|
06/23/2022
| | | | |
Title:
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PROCESSOR GRAPH EXECUTION USING INTERRUPT CONSERVATION
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Patent #:
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Issue Dt:
|
01/23/2024
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Application #:
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17878011
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Filing Dt:
|
07/31/2022
|
Publication #:
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Pub Dt:
|
11/17/2022
| | | | |
Title:
|
INTEGER MATRIX MULTIPLICATION ENGINE USING PIPELINING
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|
Patent #:
|
NONE
|
Issue Dt:
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|
Application #:
|
18385624
|
Filing Dt:
|
10/31/2023
|
Publication #:
|
|
Pub Dt:
|
02/22/2024
| | | | |
Title:
|
PROCESSOR GRAPH EXECUTION USING INTERRUPT CONSERVATION
|
|