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Patent #:
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Issue Dt:
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11/21/2006
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Application #:
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10317433
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Filing Dt:
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12/11/2002
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Publication #:
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Pub Dt:
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06/05/2003
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Title:
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SUB-VOLT SENSING FOR DIGITAL MULTILEVEL FLASH MEMORY
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Patent #:
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Issue Dt:
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10/18/2005
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Application #:
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10317455
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Filing Dt:
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12/11/2002
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Publication #:
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Pub Dt:
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06/05/2003
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Title:
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MULTISTAGE AUTOZERO SENSING FOR A MULTILEVEL NON-VOLATILE MEMORY INTEGRATED CIRCUIT SYSTEM
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Patent #:
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Issue Dt:
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05/17/2005
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Application #:
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10336639
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Filing Dt:
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01/02/2003
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Publication #:
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Pub Dt:
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07/08/2004
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Title:
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FLASH MEMORY WITH TRENCH SELECT GATE AND FABRICATION PROCESS
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Patent #:
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Issue Dt:
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12/26/2006
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Application #:
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10339218
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Filing Dt:
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01/09/2003
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Publication #:
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Pub Dt:
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07/15/2004
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Title:
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METHOD AND APPARATUS FOR DETECTING AN UNUSED STATE IN A SEMICONDUCTOR CIRCUIT
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Patent #:
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Issue Dt:
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06/15/2004
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Application #:
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10351138
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Filing Dt:
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01/24/2003
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Publication #:
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Pub Dt:
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07/31/2003
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Title:
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SELF ALIGNED METHOD OF FORMING A SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS WITH FLOATING GATES HAVING MULTIPLE SHARP EDGES, AND A MEMORY ARRAY MADE THEREBY
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Patent #:
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Issue Dt:
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08/10/2004
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Application #:
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10356783
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Filing Dt:
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01/30/2003
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Publication #:
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Pub Dt:
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08/28/2003
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Title:
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SELF ALIGNED METHOD OF FORMING A SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS WITH CONTROL GATE PROTRUDING PORTIONS
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Patent #:
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Issue Dt:
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08/12/2008
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Application #:
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10358601
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Filing Dt:
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02/04/2003
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Publication #:
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Pub Dt:
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12/11/2003
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Title:
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SELF ALIGNED METHOD OF FORMING A SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS WITH BURIED BIT-LINE AND RAISED SOURCE LINE, AND A MEMORY ARRAY MADE THEREBY
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Patent #:
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Issue Dt:
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10/04/2005
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Application #:
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10358623
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Filing Dt:
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02/04/2003
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Publication #:
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Pub Dt:
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12/04/2003
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Title:
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SELF-ALIGNED METHOD OF FORMING A SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS WITH BURIED SOURCE LINE AND FLOATING GATE, AND A MEMORY ARRAY MADE THEREBY
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Patent #:
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Issue Dt:
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04/18/2006
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Application #:
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10376682
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Filing Dt:
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02/28/2003
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Publication #:
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Pub Dt:
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07/31/2003
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Title:
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SINGLE CHIP EMBEDDED MICROCONTROLLER HAVING MULTIPLE NON-VOLATILE ERASABLE PROMS SHARING A SINGLE HIGH VOLTAGE GENERATOR
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Patent #:
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Issue Dt:
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05/02/2006
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Application #:
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10376989
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Filing Dt:
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02/26/2003
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Publication #:
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Pub Dt:
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07/10/2003
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Title:
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FOLDED CASCODE HIGH VOLTAGE OPERATIONAL AMPLIFIER WITH CLASS AB SOURCE FOLLOWER OUTPUT STAGE
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Patent #:
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Issue Dt:
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11/29/2005
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Application #:
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10378414
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Filing Dt:
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03/03/2003
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Publication #:
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Pub Dt:
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09/09/2004
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Title:
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METHOD AND APPARATUS FOR DETECTING EXPOSURE OF A SEMICONDUCTOR CIRCUIT TO ULTRA-VIOLET LIGHT
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Patent #:
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Issue Dt:
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03/29/2005
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Application #:
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10393896
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Filing Dt:
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03/21/2003
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Publication #:
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Pub Dt:
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09/23/2004
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Title:
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A SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS WITH BURRIED FLOATING GATE AND POINTED CHANNEL REGION
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Patent #:
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Issue Dt:
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10/25/2005
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Application #:
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10394975
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Filing Dt:
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03/21/2003
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Publication #:
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Pub Dt:
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10/07/2004
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Title:
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SELF ALIGNED METHOD OF FORMING A SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS WITH BURIED FLOATING GATE, POINTED FLOATING GATE AND POINTED CHANNEL REGION, AND A MEMORY ARRAY MADE THEREBY
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Patent #:
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Issue Dt:
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08/10/2004
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Application #:
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10406917
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Filing Dt:
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04/04/2003
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Publication #:
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Pub Dt:
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10/09/2003
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Title:
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METHOD OF FORMING A SEMICONDUCTOR ARRAY OF FLOATING GATE MEMORY CELLS AND STRAP REGIONS
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Patent #:
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Issue Dt:
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09/06/2005
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Application #:
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10407627
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Filing Dt:
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04/04/2003
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Publication #:
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Pub Dt:
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02/19/2004
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Title:
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VERTICAL NROM AND METHODS FOR MAKING THEREOF
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Patent #:
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Issue Dt:
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10/19/2004
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Application #:
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10409248
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Filing Dt:
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04/07/2003
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Publication #:
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Pub Dt:
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10/07/2004
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Title:
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A NON-VOLATILE FLOATING GATE MEMORY CELL WITH FLOATING GATES FORMED IN CAVITIES, AND ARRAY THEREOF, AND METHOD OF FORMATION
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Patent #:
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Issue Dt:
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08/30/2005
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Application #:
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10409333
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Filing Dt:
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04/07/2003
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Publication #:
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Pub Dt:
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10/07/2004
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Title:
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BI-DIRECTIONAL READ/PROGRAM NON-VOLATILE FLOATING GATE MEMORY CELL AND ARRAY THEREOF, AND METHOD OF FORMATION
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Patent #:
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Issue Dt:
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03/13/2007
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Application #:
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10409407
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Filing Dt:
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04/07/2003
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Publication #:
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Pub Dt:
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10/07/2004
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Title:
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BI-DIRECTIONAL READ/PROGRAM NON-VOLATILE FLOATING GATE MEMORY CELL WITH INDEPENDENT CONTROLLABLE CONTROL GATES, AND ARRAY THEREOF, AND METHOD OF FORMATION
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Patent #:
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Issue Dt:
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03/07/2006
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Application #:
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10422183
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Filing Dt:
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04/23/2003
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Publication #:
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Pub Dt:
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10/28/2004
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Title:
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NON-VOLATILE FLOATING GATE MEMORY CELL WITH FLOATING GATES FORMED AS SPACERS, AND AN ARRAY THEREOF, AND A METHOD OF MANUFACTURING
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Patent #:
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Issue Dt:
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03/09/2004
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Application #:
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10423270
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Filing Dt:
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04/25/2003
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Title:
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METHOD OF PLANARIZING A SEMICONDUCTOR DIE
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Patent #:
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Issue Dt:
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02/08/2005
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Application #:
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10428742
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Filing Dt:
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05/02/2003
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Publication #:
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Pub Dt:
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11/04/2004
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Title:
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CIRCUIT FOR COMPENSATING PROGRAMMING CURRENT REQUIRED, DEPENDING UPON PROGRAMMING STATE
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Patent #:
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Issue Dt:
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11/23/2004
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Application #:
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10452027
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Filing Dt:
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05/30/2003
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Publication #:
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Pub Dt:
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12/02/2004
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Title:
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ARRAY OF INTEGRATED CIRCUIT UNITS WITH STRAPPING LINES TO PREVENT PUNCH THROUGH
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Patent #:
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Issue Dt:
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10/03/2006
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Application #:
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10457975
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Filing Dt:
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06/09/2003
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Publication #:
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Pub Dt:
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12/09/2004
| | | | |
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Title:
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HIGH VOLTAGE SHUNT REGULATOR FOR FLASH MEMORY
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Patent #:
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Issue Dt:
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01/11/2005
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Application #:
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10458006
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Filing Dt:
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06/09/2003
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Publication #:
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Pub Dt:
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12/09/2004
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Title:
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CURVED FRACTIONAL CMOS BANDGAP REFERENCE
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Patent #:
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Issue Dt:
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01/31/2006
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Application #:
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10628979
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Filing Dt:
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07/28/2003
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Publication #:
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Pub Dt:
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02/03/2005
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Title:
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COLUMN REDUNDANCY FOR DIGITAL MULTILEVEL NONVOLATILE MEMORY
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Patent #:
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Issue Dt:
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03/14/2006
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Application #:
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10641431
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Filing Dt:
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08/14/2003
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Publication #:
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Pub Dt:
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02/17/2005
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Title:
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PHASE CHANGE MEMORY DEVICE EMPLOYING THERMAL-ELECTRICAL CONTACTS WITH NARROWING ELECTRICAL CURRENT PATHS
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Patent #:
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Issue Dt:
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03/01/2005
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Application #:
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10641432
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Filing Dt:
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08/14/2003
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Publication #:
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Pub Dt:
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02/17/2005
| | | | |
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Title:
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METHOD OF MANUFACTURING AN ARRAY OF BI-DIRECTIONAL NONVOLATILE MEMORY CELLS
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Patent #:
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Issue Dt:
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08/17/2004
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Application #:
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10641490
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Filing Dt:
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08/14/2003
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Title:
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METHOD OF MAKING SUB-LITHOGRAPHIC SIZED CONTACT HOLES
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Patent #:
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Issue Dt:
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06/29/2004
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Application #:
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10641609
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Filing Dt:
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08/15/2003
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Title:
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INTEGRATED CIRCUIT WITH A REPROGRAMMABLE NONVOLATILE SWITCH FOR SELECTIVELY CONNECTING A SOURCE FOR A SIGNAL TO A CIRCUIT
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Patent #:
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Issue Dt:
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10/26/2004
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Application #:
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10641610
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Filing Dt:
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08/15/2003
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Title:
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INTEGRATED CIRCUIT WITH A REPROGRAMMABLE NONVOLATILE SWITCH HAVING A DYNAMIC THRESHOLD VOLTAGE (VTH) FOR SELECTIVELY CONNECTING A SOURCE FOR A SIGNAL TO A CIRCUIT
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Patent #:
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Issue Dt:
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12/21/2004
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Application #:
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10641803
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Filing Dt:
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08/15/2003
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Title:
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INTEGRATED CIRCUIT WITH A THREE TRANSISTOR REPROGRAMMABLE NONVOLATILE SWITCH FOR SELECTIVELY CONNECTING A SOURCE FOR A SIGNAL TO A CIRCUIT
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Patent #:
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Issue Dt:
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03/22/2005
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Application #:
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10642077
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Filing Dt:
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08/14/2003
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Publication #:
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Pub Dt:
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02/17/2005
| | | | |
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Title:
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MULTI-BIT ROM CELL WITH BI-DIRECTIONAL READ AND A METHOD FOR MAKING THEREOF
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Patent #:
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Issue Dt:
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03/14/2006
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Application #:
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10642078
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Filing Dt:
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08/14/2003
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Publication #:
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Pub Dt:
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02/17/2005
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Title:
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ARRAY OF MULTI-BIT ROM CELLS WITH EACH CELL HAVING BI-DIRECTIONAL READ AND A METHOD FOR MAKING THE ARRAY
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Patent #:
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Issue Dt:
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08/09/2005
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Application #:
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10642079
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Filing Dt:
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08/14/2003
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Publication #:
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Pub Dt:
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02/17/2005
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Title:
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A MULTI-BIT ROM CELL, FOR STORING ONE OF N>4 POSSIBLE STATES AND HAVING BI-DIRECTIONAL READ, AN ARRAY OF SUCH CELLS.
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Patent #:
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Issue Dt:
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07/24/2007
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Application #:
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10643249
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Filing Dt:
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08/18/2003
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Publication #:
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Pub Dt:
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03/17/2005
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Title:
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MEMORY DEVICE OPERABLE WITH A PLURALITY OF PROTOCOLS WITH CONFIGURATION DATA STORED IN NON-VOLATILE STORAGE ELEMENTS
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Patent #:
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Issue Dt:
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06/14/2005
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Application #:
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10653015
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Filing Dt:
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08/28/2003
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Publication #:
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Pub Dt:
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03/03/2005
| | | | |
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Title:
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SELF-ALIGNED METHOD OF FORMING A SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS WITH BURIED FLOATING GATE, AND A MEMORY ARRAY MADE THEREBY
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Patent #:
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Issue Dt:
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11/09/2004
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Application #:
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10656486
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Filing Dt:
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09/04/2003
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Title:
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PHASE CHANGE MEMORY DEVICE EMPLOYING THERMALLY INSULATING VOIDS, AND A METHOD OF MAKING SAME
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Patent #:
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Issue Dt:
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08/09/2005
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Application #:
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10656668
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Filing Dt:
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09/04/2003
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Publication #:
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Pub Dt:
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03/10/2005
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Title:
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MEMORY DEVICE WITH DISCRETE LAYERS OF PHASE CHANGE MEMORY MATERIAL
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Patent #:
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Issue Dt:
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03/28/2006
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Application #:
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10659226
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Filing Dt:
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09/09/2003
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Publication #:
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Pub Dt:
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03/10/2005
| | | | |
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Title:
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UNIFIED MULTILEVEL CELL MEMORY
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Patent #:
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Issue Dt:
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08/28/2007
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Application #:
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10669040
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Filing Dt:
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09/22/2003
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Publication #:
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Pub Dt:
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06/10/2004
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Title:
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SOURCE SYNCHRONOUS CDMA BUS INTERFACE
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Patent #:
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Issue Dt:
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02/15/2005
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Application #:
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10690204
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Filing Dt:
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10/20/2003
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Publication #:
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Pub Dt:
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05/06/2004
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Title:
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SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS WITH LOW RESISTANCE SOURCE REGIONS AND HIGH SOURCE COUPLING
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Patent #:
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Issue Dt:
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11/01/2005
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Application #:
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10693067
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Filing Dt:
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10/23/2003
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Publication #:
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Pub Dt:
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04/28/2005
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Title:
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LANDING PAD FOR USE AS A CONTACT TO A CONDUCTIVE SPACER
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Patent #:
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Issue Dt:
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07/10/2007
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Application #:
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10714243
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Filing Dt:
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11/13/2003
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Publication #:
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Pub Dt:
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05/19/2005
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Title:
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STACKED GATE MEMORY CELL WITH ERASE TO GATE, ARRAY, AND METHOD OF MANUFACTURING
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Patent #:
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Issue Dt:
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08/30/2005
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Application #:
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10729605
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Filing Dt:
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12/05/2003
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Publication #:
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Pub Dt:
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06/09/2005
| | | | |
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Title:
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MEMORY DEVICE AND METHOD OF OPERATING SAME
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Patent #:
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Issue Dt:
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12/12/2006
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Application #:
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10737689
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Filing Dt:
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12/15/2003
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Publication #:
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Pub Dt:
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07/01/2004
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Title:
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SEEK WINDOW VERIFY PROGRAM SYSTEM AND METHOD FOR A MULTILEVEL NON-VOLATILE MEMORY INTEGRATED CIRCUIT SYSTEM
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Patent #:
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Issue Dt:
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09/13/2005
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Application #:
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10748540
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Filing Dt:
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12/29/2003
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Publication #:
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Pub Dt:
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06/30/2005
| | | | |
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Title:
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LOW VOLTAGE CMOS BANDGAP REFERENCE
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Patent #:
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Issue Dt:
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05/10/2005
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Application #:
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10757830
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Filing Dt:
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01/13/2004
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Publication #:
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Pub Dt:
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09/23/2004
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Title:
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METHOD OF PROGRAMMING ELECTRONS ONTO A FLOATING GATE OF A NON-VOLATILE MEMORY CELL
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Patent #:
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Issue Dt:
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11/29/2005
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Application #:
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10762807
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Filing Dt:
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01/21/2004
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Publication #:
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Pub Dt:
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08/05/2004
| | | | |
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Title:
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METHOD OF PLANARIZING A SEMICONDUCTOR DIE
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Patent #:
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Issue Dt:
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03/27/2007
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Application #:
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10764381
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Filing Dt:
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01/22/2004
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Publication #:
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Pub Dt:
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08/19/2004
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Title:
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WIDE DYNAMIC RANGE AND HIGH SPEED VOLTAGE MODE SENSING FOR A MULTILEVEL DIGITAL NON-VOLATILE MEMORY
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Patent #:
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Issue Dt:
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06/26/2007
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Application #:
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10767248
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Filing Dt:
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01/28/2004
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Publication #:
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Pub Dt:
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07/28/2005
| | | | |
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Title:
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MULTI-OPERATIONAL AMPLIFIER SYSTEM
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Patent #:
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Issue Dt:
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07/11/2006
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Application #:
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10776397
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Filing Dt:
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02/10/2004
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Publication #:
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Pub Dt:
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08/19/2004
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Title:
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SELF ALIGNED METHOD OF FORMING A SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS WITH BURIED BIT-LINE AND VERTICAL WORD LINE TRANSISTOR
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Patent #:
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Issue Dt:
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12/06/2005
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Application #:
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10797156
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Filing Dt:
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03/09/2004
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09/15/2005
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05/23/2006
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10797207
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03/09/2004
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12/11/2007
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03/09/2004
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12/16/2004
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05/16/2006
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03/17/2004
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09/22/2005
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01/31/2006
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10803183
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03/17/2004
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09/22/2005
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01/09/2007
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10814443
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03/30/2004
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10/06/2005
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12/05/2006
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10818590
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04/05/2004
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09/30/2004
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Title:
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SELF ALIGNED METHOD OF FORMING A SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS WITH BURIED BIT-LINE AND RAISED SOURCE LINE
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03/21/2006
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10822944
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04/12/2004
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10/13/2005
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Title:
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02/27/2007
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10824016
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04/13/2004
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10/07/2004
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Title:
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03/18/2008
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05/04/2004
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11/10/2005
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03/28/2006
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05/18/2004
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10/28/2004
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04/19/2005
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05/19/2004
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10/28/2004
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Title:
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08/01/2006
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10850300
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05/19/2004
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10/28/2004
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01/01/2008
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06/07/2004
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12/08/2005
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04/25/2006
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06/14/2004
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11/25/2004
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01/12/2010
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06/15/2004
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12/15/2005
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02/20/2007
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06/17/2004
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12/02/2004
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07/05/2005
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07/06/2004
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12/09/2004
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03/07/2006
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07/19/2004
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02/23/2006
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03/27/2007
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07/19/2004
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01/19/2006
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04/11/2006
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08/17/2004
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02/23/2006
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10/31/2006
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03/02/2006
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09/05/2006
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09/16/2004
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04/14/2005
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10/10/2006
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10/08/2004
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04/13/2006
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07/03/2007
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11/01/2004
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05/04/2006
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04/01/2008
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11/04/2004
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05/04/2006
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11/22/2005
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11/16/2004
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05/05/2005
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06/13/2006
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11/16/2004
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04/28/2005
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01/29/2008
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02/05/2008
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11/23/2004
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05/19/2005
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07/07/2005
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10/07/2008
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02/22/2005
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08/24/2006
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04/24/2007
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03/01/2005
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09/15/2005
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06/05/2007
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02/28/2005
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09/29/2005
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06/15/2010
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03/14/2005
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09/14/2006
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03/14/2005
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09/14/2006
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01/31/2006
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03/15/2005
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09/28/2006
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10/05/2006
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12/19/2006
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10/27/2005
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09/15/2005
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07/10/2007
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05/20/2005
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11/23/2006
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12/07/2006
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10/20/2005
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12/08/2005
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04/12/2007
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