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Total properties:
42
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Patent #:
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Issue Dt:
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06/13/2000
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Application #:
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08992763
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Filing Dt:
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12/17/1997
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Title:
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MULTIPROCESSOR COMPUTER ARCHITECTURE INCORPORTING A PLURALITY OF MEMORY ALGORITHM PROCESSORS IN THE MEMORY SUBSYSTEM
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Patent #:
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|
Issue Dt:
|
02/15/2000
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Application #:
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09018032
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Filing Dt:
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02/03/1998
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|
Title:
|
SYSTEM AND METHOD FOR DYNAMIC PRIORITY CONFLICT RESOLUTION IN A MULTI-PROCESSOR COMPUTER SYSTEM HAVING SHARED MEMORY RESOURCES
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Patent #:
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|
Issue Dt:
|
09/25/2001
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Application #:
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09108088
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Filing Dt:
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06/30/1998
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|
Title:
|
SPLIT DIRECTORY-BASED CACHE COHERENCY TECHNIQUE FOR A MULTI-PROCESSOR COMPUTER SYSTEM
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Patent #:
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|
Issue Dt:
|
06/12/2001
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Application #:
|
09481902
|
Filing Dt:
|
01/12/2000
|
|
Title:
|
MULTIPROCESSOR COMPUTER ARCHITECTURE INCORPORATING A PLURALITY OF MEMORY ALGORITHM PROCESSORS IN THE MEMORY SUBSYSTEM
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|
|
|
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Patent #:
|
|
Issue Dt:
|
01/15/2002
|
Application #:
|
09563561
|
Filing Dt:
|
05/03/2000
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|
Title:
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MULTIPROCESSOR WITH EACH PROCESSOR ELEMENT ACCESSING OPERANDS IN LOADED INPUT BUFFER AND FORWARDING RESULTS TO FIFO OUTPUT BUFFER
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Patent #:
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|
Issue Dt:
|
07/15/2003
|
Application #:
|
09638365
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Filing Dt:
|
08/15/2000
|
|
Title:
|
SYSTEM AND METHOD FOR SEMAPHORE AND ATOMIC OPERATION
MANAGEMENT IN A MULTIPROCESSOR
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|
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Patent #:
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|
Issue Dt:
|
08/13/2002
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Application #:
|
09888276
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Filing Dt:
|
06/22/2001
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Publication #:
|
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Pub Dt:
|
05/09/2002
| | | | |
|
Title:
|
SYSTEM AND METHOD FOR ACCELERATING WEB SITE ACCESS AND PROCESSING UTILIZING A COMPUTER SYSTEM INCORPORATING RECONFIGURABLE PROCESSORS OPERATING UNDER A SINGLE OPERATING SYSTEM IMAGE
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Patent #:
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|
Issue Dt:
|
05/13/2008
|
Application #:
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09932330
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Filing Dt:
|
08/17/2001
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|
Publication #:
|
|
Pub Dt:
|
02/14/2002
| | | | |
|
Title:
|
SWITCH/NETWORK ADAPTER PORT FOR CLUSTERED COMPUTERS EMPLOYING A CHAIN OF MULTI-ADAPTIVE PROCESSORS IN A DUAL IN-LINE MEMORY MODULE FORMAT
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Patent #:
|
|
Issue Dt:
|
12/28/2004
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Application #:
|
10008128
|
Filing Dt:
|
11/05/2001
|
|
Publication #:
|
|
Pub Dt:
|
05/08/2003
| | | | |
|
Title:
|
BANDWIDTH ENHANCEMENT FOR UNCACHED DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/26/2006
|
Application #:
|
10011835
|
Filing Dt:
|
12/05/2001
|
|
Publication #:
|
|
Pub Dt:
|
03/06/2003
| | | | |
|
Title:
|
INTERFACE FOR INTEGRATING RECONFIGURABLE PROCESSORS INTO A GENERAL PURPOSE COMPUTING SYSTEM
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|
|
|
|
Patent #:
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|
Issue Dt:
|
10/17/2006
|
Application #:
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10278345
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Filing Dt:
|
10/23/2002
|
|
Publication #:
|
|
Pub Dt:
|
04/29/2004
| | | | |
|
Title:
|
SYSTEM AND METHOD FOR EXPLICT COMMUNICATION OF MESSAGES BETWEEN PROCESSES RUNNING ON DIFFERENT NODES IN A CLUSTERED MULTIPROCESSOR SYSTEM
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Patent #:
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Issue Dt:
|
02/21/2006
|
Application #:
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10282986
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Filing Dt:
|
10/29/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/27/2003
| | | | |
|
Title:
|
COMPUTER SYSTEM ARCHITECTURE AND MEMORY CONTROLLER FOR CLOSE-COUPLING WITHIN A HYBRID PROCESSING SYSTEM UTILIZING AN ADAPTIVE PROCESSOR INTERFACE PORT
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Patent #:
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|
Issue Dt:
|
02/07/2006
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Application #:
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10284994
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Filing Dt:
|
10/31/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/06/2004
| | | | |
|
Title:
|
SYSTEM AND METHOD FOR PROVIDING AN ARBITRATED MEMORY BUS IN A HYBRID COMPUTING SYSTEM
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|
|
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|
Patent #:
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Issue Dt:
|
11/08/2005
|
Application #:
|
10285298
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Filing Dt:
|
10/31/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/06/2004
| | | | |
|
Title:
|
SYSTEM AND METHOD FOR PARTITIONING CONTROL-DATAFLOW GRAPH REPRESENTATIONS
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|
|
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Patent #:
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|
Issue Dt:
|
01/03/2006
|
Application #:
|
10285299
|
Filing Dt:
|
10/31/2002
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Publication #:
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Pub Dt:
|
05/06/2004
| | | | |
|
Title:
|
PROCESS FOR CONVERTING PROGRAMS IN HIGH-LEVEL PROGRAMMING LANGUAGES TO A UNIFIED EXECUTABLE FOR HYBRID COMPUTING PLATFORMS
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Patent #:
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|
Issue Dt:
|
05/29/2007
|
Application #:
|
10285318
|
Filing Dt:
|
10/31/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/06/2004
| | | | |
|
Title:
|
MULTI-ADAPTIVE PROCESSING SYSTEMS AND TECHNIQUES FOR ENHANCING PARALLELISM AND PERFORMANCE OF COMPUTATIONAL FUNCTIONS
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Patent #:
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|
Issue Dt:
|
12/26/2006
|
Application #:
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10285389
|
Filing Dt:
|
10/31/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/06/2004
| | | | |
|
Title:
|
DEBUGGING AND PERFORMANCE PROFILING USING CONTROL-DATAFLOW GRAPH REPRESENTATIONS WITH RECONFIGURABLE HARDWARE EMULATION
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Patent #:
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|
Issue Dt:
|
11/20/2007
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Application #:
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10285399
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Filing Dt:
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10/31/2002
|
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Publication #:
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|
Pub Dt:
|
05/06/2004
| | | | |
|
Title:
|
SYSTEM AND METHOD FOR CONVERTING CONTROL FLOW GRAPH REPRESENTATIONS TO CONTROL-DATAFLOW GRAPH REPRESENTATIONS
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Patent #:
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|
Issue Dt:
|
09/06/2005
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Application #:
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10285401
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Filing Dt:
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10/31/2002
|
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Publication #:
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|
Pub Dt:
|
08/19/2004
| | | | |
|
Title:
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EFFICIENCY OF RECONFIGURABLE HARDWARE
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Patent #:
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Issue Dt:
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11/01/2005
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Application #:
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10339133
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Filing Dt:
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01/08/2003
|
|
Publication #:
|
|
Pub Dt:
|
05/22/2003
| | | | |
|
Title:
|
MULTIPROCESSOR COMPUTER ARCHITECTURE INCORPORATING A PLURALITY OF MEMORY ALGORITHM PROCESSORS IN THE MEMORY SUBSYSTEM
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Patent #:
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Issue Dt:
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03/27/2007
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Application #:
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10340390
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Filing Dt:
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01/10/2003
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Publication #:
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Pub Dt:
|
04/07/2005
| | | | |
|
Title:
|
SWITCH/NETWORK ADAPTER PORT COUPLING A RECONFIGURABLE PROCESSING ELEMENT TO ONE OR MORE MICROPROCESSORS FOR USE WITH INTERLEAVED MEMORY CONTROLLERS
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Patent #:
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Issue Dt:
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11/07/2006
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Application #:
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10345082
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Filing Dt:
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01/14/2003
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Publication #:
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Pub Dt:
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05/06/2004
| | | | |
|
Title:
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MAP COMPILER PIPELINED LOOP STRUCTURE
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Patent #:
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Issue Dt:
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09/09/2008
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Application #:
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10618041
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Filing Dt:
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07/11/2003
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Publication #:
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Pub Dt:
|
01/29/2004
| | | | |
|
Title:
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SWITCH/NETWORK ADAPTER PORT INCORPORATING SHARED MEMORY RESOURCES SELECTIVELY ACCESSIBLE BY A DIRECT EXECUTION LOGIC ELEMENT AND ONE OR MORE DENSE LOGIC DEVICES
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Patent #:
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Issue Dt:
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12/12/2006
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Application #:
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10869200
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Filing Dt:
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06/16/2004
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Publication #:
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Pub Dt:
|
12/23/2004
| | | | |
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Title:
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SYSTEM AND METHOD OF ENHANCING EFFICIENCY AND UTILIZATION OF MEMORY BANDWIDTH IN RECONFIGURABLE HARDWARE
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Patent #:
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Issue Dt:
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06/26/2007
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Application #:
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10969635
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Filing Dt:
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10/20/2004
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Publication #:
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Pub Dt:
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03/10/2005
| | | | |
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Title:
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MULTIPROCESSOR COMPUTER ARCHITECTURE INCORPORATING A PLURALITY OF MEMORY ALGORITHM PROCESSORS IN THE MEMORY SUBSYSTEM
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Patent #:
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Issue Dt:
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09/02/2008
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Application #:
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10996016
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Filing Dt:
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11/23/2004
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Publication #:
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Pub Dt:
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04/28/2005
| | | | |
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Title:
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SWITCH/NETWORK ADAPTER PORT FOR CLUSTERED COMPUTERS EMPLOYING A CHAIN OF MULTI-ADAPTIVE PROCESSORS IN A DUAL IN-LINE MEMORY MODULE FORMAT
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Patent #:
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Issue Dt:
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01/23/2007
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Application #:
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11140718
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Filing Dt:
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05/31/2005
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Publication #:
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Pub Dt:
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10/06/2005
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Title:
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INTERFACE FOR INTEGRATING RECONFIGURABLE PROCESSORS INTO A GENERAL PURPOSE COMPUTING SYSTEM
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Patent #:
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Issue Dt:
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07/21/2009
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11203983
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08/15/2005
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Pub Dt:
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12/22/2005
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Title:
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SWITCH/NETWORK ADAPTER PORT COUPLING A RECONFIGURABLE PROCESSING ELEMENT TO ONE OR MORE MICROPROCESSORS FOR USE WITH INTERLEAVED MEMORY CONTROLLERS
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07/29/2008
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11222417
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09/08/2005
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Pub Dt:
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01/19/2006
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Title:
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RECONFIGURABLE PROCESSOR ELEMENT UTILIZING BOTH COARSE AND FINE GRAINED RECONFIGURABLE ELEMENTS
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04/20/2010
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11243498
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10/04/2005
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Pub Dt:
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02/23/2006
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Title:
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PROCESS FOR CONVERTING PROGRAMS IN HIGH-LEVEL PROGRAMMING LANGUAGES TO A UNIFIED EXECUTABLE FOR HYBRID COMPUTING PLATFORMS
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02/15/2011
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11252341
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10/17/2005
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Pub Dt:
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04/19/2007
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Title:
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DYNAMIC PRIORITY CONFLICT RESOLUTION IN A MULTI-PROCESSOR COMPUTER SYSTEM HAVING SHARED RESOURCES
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11/19/2013
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11456466
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07/10/2006
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01/10/2008
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Title:
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ELIMINATION OF STREAM CONSUMER LOOP OVERSHOOT EFFECTS
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11/17/2009
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11733064
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04/09/2007
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08/30/2007
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Title:
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MULTI-ADAPTIVE PROCESSING SYSTEMS AND TECHNIQUES FOR ENHANCING PARALLELISM AND PERFORMANCE OF COMPUTATIONAL FUNCTIONS
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03/16/2010
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11834439
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08/06/2007
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12/06/2007
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Title:
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SWITCH/NETWORK ADAPTER PORT INCORPORATING SHARED MEMORY RESOURCES SELECTIVELY ACCESSIBLE BY A DIRECT EXECUTION LOGIC ELEMENT AND ONE OR MORE DENSE LOGIC DEVICES IN A FULLY BUFFERED DUAL IN-LINE MEMORY MODULE FORMAT (FB-DIMM)
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04/29/2014
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13287322
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11/02/2011
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05/10/2012
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Title:
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SYSTEM AND METHOD FOR COMPUTATIONAL UNIFICATION OF HETEROGENEOUS IMPLICIT AND EXPLICIT PROCESSING ELEMENTS
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Patent #:
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NONE
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13365090
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02/02/2012
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Pub Dt:
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06/20/2013
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Title:
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MOBILE ELECTRONIC DEVICES UTILIZING RECONFIGURABLE PROCESSING TECHNIQUES TO ENABLE HIGHER SPEED APPLICATIONS WITH LOWERED POWER CONSUMPTION
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Patent #:
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Issue Dt:
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08/11/2020
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13903720
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05/28/2013
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Publication #:
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Pub Dt:
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12/04/2014
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Title:
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MULTI-PROCESSOR COMPUTER ARCHITECTURE INCORPORATING DISTRIBUTED MULTI-PORTED COMMON MEMORY MODULES
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Patent #:
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Issue Dt:
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01/06/2015
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14203035
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03/10/2014
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Publication #:
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Pub Dt:
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07/10/2014
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Title:
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SYSTEM AND METHOD FOR COMPUTATIONAL UNIFICATION OF HETEROGENEOUS IMPLICIT AND EXPLICIT PROCESSING ELEMENTS
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Patent #:
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Issue Dt:
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12/19/2017
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Application #:
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14284616
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05/22/2014
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Publication #:
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Pub Dt:
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11/26/2015
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Title:
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SYSTEM AND METHOD FOR THERMALLY COUPLING MEMORY DEVICES TO A MEMORY CONTROLLER IN A COMPUTER MEMORY BOARD
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Patent #:
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Issue Dt:
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10/06/2015
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Application #:
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14288094
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Filing Dt:
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05/27/2014
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Title:
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SYSTEM AND METHOD FOR RETAINING DRAM DATA WHEN REPROGRAMMING RECONFIGURABLE DEVICES WITH DRAM MEMORY CONTROLLERS
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Patent #:
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Issue Dt:
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12/27/2016
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Application #:
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14834273
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08/24/2015
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Publication #:
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Pub Dt:
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12/17/2015
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Title:
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SYSTEM AND METHOD FOR RETAINING DRAM DATA WHEN REPROGRAMMING RECONFIGURABLE DEVICES WITH DRAM MEMORY CONTROLLERS INCORPORATING A DATA MAINTENANCE BLOCK COLOCATED WITH A MEMORY MODULE OR SUBSYSTEM
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Patent #:
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08/08/2017
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15389650
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12/23/2016
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Pub Dt:
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04/13/2017
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Title:
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SYSTEM AND METHOD FOR RETAINING DRAM DATA WHEN REPROGRAMMING RECONFIGURABLE DEVICES WITH DRAM MEMORY CONTROLLERS INCORPORATING A DATA MAINTENANCE BLOCK COLOCATED WITH A MEMORY MODULE OR SUBSYSTEM
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|
