Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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Reel/Frame: | 035908/0362 | |
| Pages: | 4 |
| | Recorded: | 06/25/2015 | | |
Attorney Dkt #: | RA247.P1C1C1C2.US +4 |
Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
5
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Patent #:
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Issue Dt:
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06/21/2011
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Application #:
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11855993
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Filing Dt:
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09/14/2007
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Publication #:
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Pub Dt:
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05/28/2009
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Title:
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PHASE ADJUSTMENT APPARATUS AND METHOD FOR A MEMORY DEVICE SIGNALING SYSTEM
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Patent #:
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Issue Dt:
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09/24/2013
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Application #:
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13163618
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Filing Dt:
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06/17/2011
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Publication #:
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Pub Dt:
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10/13/2011
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Title:
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PHASE ADJUSTMENT APPARATUS AND METHOD FOR A MEMORY DEVICE SIGNALING SYSTEM
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Patent #:
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Issue Dt:
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09/01/2015
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Application #:
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13949982
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Filing Dt:
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07/24/2013
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Publication #:
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Pub Dt:
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01/30/2014
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Title:
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Memory Component with Pattern Register Circuitry to Provide Data Patterns for Calibration
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Patent #:
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Issue Dt:
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08/04/2015
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Application #:
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13967245
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Filing Dt:
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08/14/2013
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Publication #:
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Pub Dt:
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12/26/2013
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Title:
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Memory Component with Pattern Register Circuitry to Provide Data Patterns for Calibration
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Patent #:
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Issue Dt:
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06/14/2016
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Application #:
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14745746
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Filing Dt:
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06/22/2015
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Publication #:
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Pub Dt:
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10/08/2015
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Title:
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MEMORY COMPONENT WITH PATTERN REGISTER CIRCUITRY TO PROVIDE DATA PATTERNS FOR CALIBRATION
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Assignee
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1050 ENTERPRISE WAY, SUITE 700 |
SUNNYVALE, CALIFORNIA 94089 |
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Correspondence name and address
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TARISA WAIN
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1050 ENTERPRISE WAY #700
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SUNNYVALE, CA 94089
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