Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
| Reel/Frame: | 013696/0373 | |
| Pages: | 2 |
| | Recorded: | 01/22/2003 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
|
|
Total properties:
1
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/09/2004
|
Application #:
|
10349564
|
Filing Dt:
|
01/22/2003
|
|
Publication #:
|
|
Pub Dt:
|
07/22/2004
| | | | |
|
Title:
|
NET SEGMENT ANALYZER FOR CHIP CAD LAYOUT
|
|
|
Assignee
|
|
|
|
|
| 1551 MCCARTHY BOULEVARD |
| MILPITAS, CALIFORNIA 95035 |
|
|
Correspondence name and address
|
| |
LSI LOGIC CORPORATION
|
| |
ERIC J. WHITESELL
|
| |
1551 MCCARTHY BLVD.
|
| |
MILPITAS, CA 95035
|
Search Results as of:
05/29/2024 11:48 AM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|
