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Patent Assignment Details
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Reel/Frame:041381/0374   Pages: 8
Recorded: 01/17/2017
Attorney Dkt #:00150
Conveyance: CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).
Total properties: 29
1
Patent #:
8883627
Issue Dt:
11/11/2014
Application #:
13883231
Filing Dt:
07/12/2013
Publication #:
US20130280904
Pub Dt:
10/24/2013
Title:
METHOD FOR CHIP PACKAGING
2
Patent #:
9362173
Issue Dt:
06/07/2016
Application #:
13883399
Filing Dt:
05/03/2013
Publication #:
US20130224910
Pub Dt:
08/29/2013
Title:
METHOD FOR CHIP PACKAGE
3
Patent #:
9324583
Issue Dt:
04/26/2016
Application #:
13981116
Filing Dt:
07/23/2013
Publication #:
US20130302947
Pub Dt:
11/14/2013
Title:
PACKAGING METHOD
4
Patent #:
9497862
Issue Dt:
11/15/2016
Application #:
13981123
Filing Dt:
07/23/2013
Publication #:
US20130301228
Pub Dt:
11/14/2013
Title:
PACKAGING STRUCTURE
5
Patent #:
9595490
Issue Dt:
03/14/2017
Application #:
13984876
Filing Dt:
08/12/2013
Publication #:
US20130320533
Pub Dt:
12/05/2013
Title:
3D SYSTEM-LEVEL PACKAGING METHODS AND STRUCTURES
6
Patent #:
9040347
Issue Dt:
05/26/2015
Application #:
13984889
Filing Dt:
08/12/2013
Publication #:
US20130313699
Pub Dt:
11/28/2013
Title:
FAN-OUT HIGH-DENSITY PACKAGING METHODS AND STRUCTURES
7
Patent #:
9543269
Issue Dt:
01/10/2017
Application #:
13984929
Filing Dt:
08/12/2013
Publication #:
US20130320534
Pub Dt:
12/05/2013
Title:
SYSTEM-LEVEL PACKAGING METHODS AND STRUCTURES
8
Patent #:
9099448
Issue Dt:
08/04/2015
Application #:
13984967
Filing Dt:
08/12/2013
Publication #:
US20130320535
Pub Dt:
12/05/2013
Title:
THREE-DIMENSIONAL SYSTEM-LEVEL PACKAGING METHODS AND STRUCTURES
9
Patent #:
9589815
Issue Dt:
03/07/2017
Application #:
14074598
Filing Dt:
11/07/2013
Publication #:
US20140124927
Pub Dt:
05/08/2014
Title:
SEMICONDUCTOR IC PACKAGING METHODS AND STRUCTURES
10
Patent #:
9620468
Issue Dt:
04/11/2017
Application #:
14074637
Filing Dt:
11/07/2013
Publication #:
US20140124928
Pub Dt:
05/08/2014
Title:
SEMICONDUCTOR PACKAGING STRUCTURE AND METHOD FOR FORMING THE SAME
11
Patent #:
9293338
Issue Dt:
03/22/2016
Application #:
14074687
Filing Dt:
11/07/2013
Publication #:
US20140124914
Pub Dt:
05/08/2014
Title:
SEMICONDUCTOR PACKAGING STRUCTURE AND METHOD
12
Patent #:
9761549
Issue Dt:
09/12/2017
Application #:
14074697
Filing Dt:
11/07/2013
Publication #:
US20140124929
Pub Dt:
05/08/2014
Title:
SEMICONDUCTOR DEVICE AND FABRICATION METHOD
13
Patent #:
9379077
Issue Dt:
06/28/2016
Application #:
14440876
Filing Dt:
05/05/2015
Publication #:
US20150303159
Pub Dt:
10/22/2015
Title:
METAL CONTACT FOR SEMICONDUCTOR DEVICE
14
Patent #:
9293432
Issue Dt:
03/22/2016
Application #:
14441477
Filing Dt:
05/07/2015
Publication #:
US20150294949
Pub Dt:
10/15/2015
Title:
METAL CONTACT FOR CHIP PACKAGING STRUCTURE
15
Patent #:
9485868
Issue Dt:
11/01/2016
Application #:
14762671
Filing Dt:
07/22/2015
Publication #:
US20150382467
Pub Dt:
12/31/2015
Title:
PACKAGE STRUCTURE
16
Patent #:
9397070
Issue Dt:
07/19/2016
Application #:
14766504
Filing Dt:
08/07/2015
Publication #:
US20160035696
Pub Dt:
02/04/2016
Title:
METHOD FOR FORMING PACKAGE STRUCTURE
17
Patent #:
9515010
Issue Dt:
12/06/2016
Application #:
14780233
Filing Dt:
09/25/2015
Publication #:
US20160043020
Pub Dt:
02/11/2016
Title:
Semiconductor Packaging Structure And Forming Method Therefor
18
Patent #:
9502337
Issue Dt:
11/22/2016
Application #:
14926649
Filing Dt:
10/29/2015
Publication #:
US20160126166
Pub Dt:
05/05/2016
Title:
FLIP-CHIP ON LEADFRAME SEMICONDUCTOR PACKAGING STRUCTURE AND FABRICATION METHOD THEREOF
19
Patent #:
10119993
Issue Dt:
11/06/2018
Application #:
14926961
Filing Dt:
10/29/2015
Publication #:
US20160124017
Pub Dt:
05/05/2016
Title:
TESTING PROBE AND SEMICONDUCTOR TESTING FIXTURE, AND FABRICATION METHODS THEREOF
20
Patent #:
10006939
Issue Dt:
06/26/2018
Application #:
14927169
Filing Dt:
10/29/2015
Publication #:
US20160124016
Pub Dt:
05/05/2016
Title:
TESTING PROBE AND SEMICONDUCTOR TESTING FIXTURE, AND FABRICATION METHODS THEREOF
21
Patent #:
10067162
Issue Dt:
09/04/2018
Application #:
14927642
Filing Dt:
10/30/2015
Publication #:
US20160124018
Pub Dt:
05/05/2016
Title:
TESTING PROBE, SEMICONDUCTOR TESTING FIXTURE AND FABRICATION METHOD THEREOF
22
Patent #:
10001509
Issue Dt:
06/19/2018
Application #:
14927693
Filing Dt:
10/30/2015
Publication #:
US20160124019
Pub Dt:
05/05/2016
Title:
SEMICONDUCTOR TESTING FIXTURE AND FABRICATION METHOD THEREOF
23
Patent #:
10006943
Issue Dt:
06/26/2018
Application #:
14927749
Filing Dt:
10/30/2015
Publication #:
US20160124020
Pub Dt:
05/05/2016
Title:
SEMICONDUCTOR TESTING FIXTURE AND FABRICATION METHOD THEREOF
24
Patent #:
9437511
Issue Dt:
09/06/2016
Application #:
14964869
Filing Dt:
12/10/2015
Publication #:
US20160172263
Pub Dt:
06/16/2016
Title:
METHOD AND STRUCTURE FOR WAFER-LEVEL PACKAGING
25
Patent #:
NONE
Issue Dt:
Application #:
14967986
Filing Dt:
12/14/2015
Publication #:
US20160172313
Pub Dt:
06/16/2016
Title:
SUBSTRATE WITH A SUPPORTING PLATE AND FABRICATION METHOD THEREOF
26
Patent #:
9666550
Issue Dt:
05/30/2017
Application #:
14971495
Filing Dt:
12/16/2015
Publication #:
US20160172321
Pub Dt:
06/16/2016
Title:
METHOD AND STRUCTURE FOR WAFER-LEVEL PACKAGING
27
Patent #:
NONE
Issue Dt:
Application #:
14975894
Filing Dt:
12/21/2015
Publication #:
US20160189983
Pub Dt:
06/30/2016
Title:
METHOD AND STRUCTURE FOR FAN-OUT WAFER LEVEL PACKAGING
28
Patent #:
NONE
Issue Dt:
Application #:
14975895
Filing Dt:
12/21/2015
Publication #:
US20160190028
Pub Dt:
06/30/2016
Title:
METHOD AND STRUCTURE FOR FAN-OUT WAFER LEVEL PACKAGING
29
Patent #:
9837371
Issue Dt:
12/05/2017
Application #:
15106774
Filing Dt:
06/20/2016
Publication #:
US20170207189
Pub Dt:
07/20/2017
Title:
STRUCTURE AND METHOD OF REINFORCING A CONDUCTOR SOLDERING POINT OF SEMICONDUCTOR DEVICE
Assignor
1
NANTONG FUJITSU MICROELECTRONICS CO., LTD.
Exec Dt:
12/01/2016
Assignee
1
TONGFU MICROELECTRONICS CO., LTD.
NO. 288, CHONGCHUAN ROAD,
NANTONG, CHINA 226006
Correspondence name and address
ANOVA LAW GROUP, PLLC
21351 GENTRY DRIVE, SUITE 150
STERLING, VA 20166

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Web interface last modified: August 25, 2017 v.2.6
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