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02/03/2005
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Title:
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CLOSED-LOOP SYSTEM FOR MASTERING, CERTIFICATION AND PRODUCTION OF COMPACT DISCS
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Patent #:
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Issue Dt:
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01/17/2006
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Application #:
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10633856
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Filing Dt:
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08/04/2003
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Publication #:
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Pub Dt:
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02/10/2005
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Title:
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UNIVERSAL GATES FOR ICS AND TRANSFORMATION OF NETLISTS FOR THEIR IMPLEMENTATION
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Patent #:
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Issue Dt:
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02/20/2007
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Application #:
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10634416
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Filing Dt:
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08/04/2003
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Publication #:
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Pub Dt:
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02/10/2005
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Title:
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METHOD AND APPARATUS FOR INTEGRATING SIX SIGMA METHODOLOGY INTO INSPECTION RECEIVING PROCESS OF OUTSOURCED SUBASSEMBLIES, PARTS, AND MATERIALS: ACCEPTANCE, REJECTION, TRENDING, TRACKING AND CLOSED LOOP CORRECTIVE ACTION
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Patent #:
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Issue Dt:
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05/23/2006
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Application #:
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10634634
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Filing Dt:
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08/04/2003
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Publication #:
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Pub Dt:
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02/10/2005
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Title:
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METHOD AND APPARATUS FOR MAPPING PLATFORM-BASED DESIGN TO MULTIPLE FOUNDRY PROCESSES
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Patent #:
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Issue Dt:
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05/04/2010
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Application #:
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10635015
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Filing Dt:
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08/04/2003
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Publication #:
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Pub Dt:
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02/10/2005
| | | | |
Title:
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3-PRONG SECURITY/RELIABILITY/REAL-TIME DISTRIBUTED ARCHITECTURE OF INFORMATION HANDLING SYSTEM
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Patent #:
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Issue Dt:
|
12/07/2004
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Application #:
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10635276
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Filing Dt:
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08/06/2003
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Title:
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SUBSTRATE VOLTAGE CONNECTION
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Patent #:
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Issue Dt:
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06/27/2006
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Application #:
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10637385
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Filing Dt:
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08/08/2003
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Publication #:
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Pub Dt:
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02/10/2005
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Title:
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METHOD TO IMPROVE THE CONTROL OF ELECTRO-POLISHING BY USE OF A PLATING ELECTRODE AN ELECTROLYTE BATH
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Patent #:
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Issue Dt:
|
02/22/2005
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Application #:
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10638772
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Filing Dt:
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08/11/2003
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Publication #:
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Pub Dt:
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04/08/2004
| | | | |
Title:
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MULTI CHIP MODULE
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Patent #:
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Issue Dt:
|
06/19/2007
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Application #:
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10639338
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Filing Dt:
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08/12/2003
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Publication #:
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Pub Dt:
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02/17/2005
| | | | |
Title:
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REDUCED COMPLEXITY EFFICIENT BINARIZATION METHOD AND/OR CIRCUIT FOR MOTION VECTOR RESIDUALS
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Patent #:
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Issue Dt:
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11/07/2006
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Application #:
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10639701
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Filing Dt:
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08/12/2003
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Publication #:
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Pub Dt:
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02/17/2005
| | | | |
Title:
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STATIC TIMING ANALYSIS APPROACH FOR MULTI-CLOCK DOMAIN DESIGNS
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Patent #:
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Issue Dt:
|
08/02/2005
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Application #:
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10640738
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Filing Dt:
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08/13/2003
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Publication #:
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Pub Dt:
|
02/17/2005
| | | | |
Title:
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METHOD OF ROUTING A REDISTRIBUTION LAYER TRACE IN AN INTEGRATED CIRCUIT DIE
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Patent #:
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Issue Dt:
|
09/13/2005
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Application #:
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10640778
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Filing Dt:
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08/13/2003
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Publication #:
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Pub Dt:
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02/19/2004
| | | | |
Title:
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METHOD OF DETECTING SPATIALLY CORRELATED VARIATIONS IN A PARAMETER OF AN INTEGRATED CIRCUIT DIE
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Patent #:
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Issue Dt:
|
01/17/2006
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Application #:
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10641768
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Filing Dt:
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08/14/2003
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Title:
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METHOD AND STRUCTURE FOR CREATING ULTRA LOW RESISTANCE DAMASCENE COPPER WIRING
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Patent #:
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Issue Dt:
|
11/30/2004
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Application #:
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10641799
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Filing Dt:
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08/15/2003
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Title:
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SYSTEM FOR YIELD ENHANCEMENT IN PROGRAMMABLE LOGIC
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Patent #:
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Issue Dt:
|
01/31/2006
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Application #:
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10642706
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Filing Dt:
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08/18/2003
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Publication #:
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Pub Dt:
|
09/23/2004
| | | | |
Title:
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INSULATED BONDING WIRE TOOL FOR MICROELECTRONIC PACKAGING
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Patent #:
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Issue Dt:
|
05/29/2007
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Application #:
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10642954
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Filing Dt:
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08/18/2003
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Publication #:
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Pub Dt:
|
02/24/2005
| | | | |
Title:
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METHODS AND SYSTEMS FOR END-TO-END DATA PROTECTION IN A MEMORY CONTROLLER
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Patent #:
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Issue Dt:
|
11/28/2006
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Application #:
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10643463
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Filing Dt:
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08/19/2003
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Publication #:
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Pub Dt:
|
02/24/2005
| | | | |
Title:
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TYPE CONFIGURABLE MEMORY METHODOLOGY FOR USE WITH METAL PROGRAMMABLE DEVICES
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Patent #:
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Issue Dt:
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07/19/2005
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Application #:
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10643687
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Filing Dt:
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08/19/2003
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Publication #:
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Pub Dt:
|
05/13/2004
| | | | |
Title:
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HIGH-K DIELECTRIC GATE MATERIAL UNIQUELY FORMED
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Patent #:
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Issue Dt:
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07/17/2007
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Application #:
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10644116
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Filing Dt:
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08/20/2003
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Publication #:
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Pub Dt:
|
02/24/2005
| | | | |
Title:
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WHOLE-WAFER PHOTOEMISSION ANALYSIS
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Patent #:
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Issue Dt:
|
12/19/2006
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Application #:
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10645900
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Filing Dt:
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08/20/2003
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Publication #:
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Pub Dt:
|
02/24/2005
| | | | |
Title:
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METHOD AND CIRCUIT FOR SCAN TESTING LATCH BASED RANDOM ACCESS MEMORY
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Patent #:
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Issue Dt:
|
12/04/2007
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Application #:
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10646535
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Filing Dt:
|
08/22/2003
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Title:
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SYSTEM AND METHOD FOR EFFICIENTLY TESTING A LARGE RANDOM ACCESS MEMORY SPACE
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Patent #:
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Issue Dt:
|
08/31/2004
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Application #:
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10646570
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Filing Dt:
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08/22/2003
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Title:
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MICROCHANNEL FORMATION FOR FUSES, INTERCONNECTS, CAPACITORS, AND INDUCTORS
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Patent #:
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Issue Dt:
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12/12/2006
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Application #:
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10647863
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Filing Dt:
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08/25/2003
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Publication #:
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Pub Dt:
|
03/03/2005
| | | | |
Title:
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ZERO CAPACITANCE BONDPAD UTILIZING ACTIVE NEGATIVE CAPACITANCE
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Patent #:
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Issue Dt:
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05/24/2005
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Application #:
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10647993
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Filing Dt:
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08/26/2003
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Publication #:
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Pub Dt:
|
03/03/2005
| | | | |
Title:
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SHARING FUSE BLOCKS BETWEEN MEMORIES IN HARD-BISR
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Patent #:
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Issue Dt:
|
12/04/2007
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Application #:
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10648038
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Filing Dt:
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08/26/2003
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Publication #:
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Pub Dt:
|
03/03/2005
| | | | |
Title:
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MEMORY MAPPING FOR PARALLEL TURBO DECODING
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Patent #:
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Issue Dt:
|
06/27/2006
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Application #:
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10648054
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Filing Dt:
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08/26/2003
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Publication #:
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Pub Dt:
|
03/03/2005
| | | | |
Title:
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MULTI-LAYER STAGGERED POWER BUS LAYOUT DESIGN
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Patent #:
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Issue Dt:
|
04/26/2005
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Application #:
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10648602
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Filing Dt:
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08/25/2003
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Title:
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FORMING COPPER INTERCONNECTS WITH SN COATINGS
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Patent #:
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Issue Dt:
|
08/01/2006
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Application #:
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10648967
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Filing Dt:
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08/27/2003
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Publication #:
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Pub Dt:
|
03/03/2005
| | | | |
Title:
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MEMORY WINDOW MANAGER FOR CONTROL STRUCTURE ACCESS
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Patent #:
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Issue Dt:
|
07/11/2006
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Application #:
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10649215
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Filing Dt:
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08/26/2003
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Publication #:
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Pub Dt:
|
03/03/2005
| | | | |
Title:
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METHODOLOGY FOR GENERATING A MODIFIED VIEW OF A CIRCUIT LAYOUT
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Patent #:
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Issue Dt:
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02/28/2006
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Application #:
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10650192
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Filing Dt:
|
08/27/2003
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Publication #:
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Pub Dt:
|
03/03/2005
| | | | |
Title:
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DESIGN AND USE OF A SPACER CELL TO SUPPORT RECONFIGURABLE MEMORIES
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Patent #:
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Issue Dt:
|
06/27/2006
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Application #:
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10650395
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Filing Dt:
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08/28/2003
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Publication #:
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Pub Dt:
|
03/03/2005
| | | | |
Title:
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HIGH QUALITY FACTOR SPIRAL INDUCTOR THAT UTILIZES ACTIVE NEGATIVE CAPACITANCE
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Patent #:
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Issue Dt:
|
06/13/2006
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Application #:
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10651742
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Filing Dt:
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08/29/2003
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Publication #:
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Pub Dt:
|
03/17/2005
| | | | |
Title:
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METHODS AND STRUCTURE FOR PCI BUS BROADCAST USING DEVICE ID MESSAGING
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Patent #:
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Issue Dt:
|
03/21/2006
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Application #:
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10652007
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Filing Dt:
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08/29/2003
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Publication #:
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Pub Dt:
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05/12/2005
| | | | |
Title:
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LOW DIELECTRIC CONSTANT FLUORINE AND CARBON-CONTAINING SILICON OXIDE DIELECTRIC MATERIAL CHARACTERIZED BY IMPROVED RESISTANCE TO OXIDATION
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Patent #:
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Issue Dt:
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08/30/2005
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Application #:
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10652369
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Filing Dt:
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08/29/2003
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Publication #:
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Pub Dt:
|
03/03/2005
| | | | |
Title:
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VOLTAGE CONTRAST MONITOR FOR INTEGRATED CIRCUIT DEFECTS
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Patent #:
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Issue Dt:
|
07/11/2006
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Application #:
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10653588
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Filing Dt:
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09/02/2003
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Publication #:
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Pub Dt:
|
03/03/2005
| | | | |
Title:
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WIDELY TUNEABLE AND FULLY DIFFERENTIAL LC OSCILLATOR UTILIZING AN ACTIVE INDUCTOR
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Patent #:
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Issue Dt:
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09/13/2005
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Application #:
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10653593
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Filing Dt:
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09/02/2003
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Publication #:
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Pub Dt:
|
03/03/2005
| | | | |
Title:
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WIDELY TUNABLE RING OSCILLATOR UTILIZING ACTIVE NEGATIVE CAPACITANCE
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Patent #:
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Issue Dt:
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08/23/2005
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Application #:
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10655053
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Filing Dt:
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09/03/2003
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Publication #:
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Pub Dt:
|
03/03/2005
| | | | |
Title:
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RECONFIGURABLE MEMORY ARRAYS
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Patent #:
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Issue Dt:
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06/20/2006
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Application #:
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10655191
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Filing Dt:
|
09/04/2003
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Publication #:
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Pub Dt:
|
03/10/2005
| | | | |
Title:
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CONTROLLER ARCHITECTURE FOR MEMORY MAPPING
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Patent #:
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Issue Dt:
|
12/25/2007
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Application #:
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10656195
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Filing Dt:
|
09/04/2003
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Publication #:
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Pub Dt:
|
03/10/2005
| | | | |
Title:
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DATA STREAM FREQUENCY REDUCTION AND/OR PHASE SHIFT
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Patent #:
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Issue Dt:
|
03/08/2005
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Application #:
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10658017
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Filing Dt:
|
09/08/2003
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Publication #:
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Pub Dt:
|
03/10/2005
| | | | |
Title:
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METHOD OF TRANSLATING A NET DESCRIPTION OF AN INTEGRATED CIRCUIT DIE
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Patent #:
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Issue Dt:
|
07/18/2006
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Application #:
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10658168
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Filing Dt:
|
09/08/2003
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Publication #:
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Pub Dt:
|
03/24/2005
| | | | |
Title:
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METHOD OF QUALIFYING A PROCESS TOOL WITH WAFER DEFECT MAPS
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Patent #:
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Issue Dt:
|
11/21/2006
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Application #:
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10659134
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Filing Dt:
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09/10/2003
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Publication #:
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Pub Dt:
|
03/10/2005
| | | | |
Title:
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APPARATUS AND METHOD OF MANUFACTURE FOR INTEGRATED CIRCUIT AND CMOS DEVICE INCLUDING EPITAXIALLY GROWN DIELECTRIC ON SILICON CARBIDE
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|