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Reel/Frame:025559/0394   Pages: 2
Recorded: 12/30/2010
Attorney Dkt #:P10H0175/US
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1
1
Patent #:
Issue Dt:
04/10/2012
Application #:
12982123
Filing Dt:
12/30/2010
Title:
METHOD FOR FABRICATING SEMICONDUCTOR DEVICE USING SPACER PATTERNING
Assignor
1
Exec Dt:
12/30/2010
Assignee
1
SAN 136-1, AMI-RI, BUBAL-EUP, ICHEON-SI
GYEONGGI-DO, KOREA, REPUBLIC OF 467-701
Correspondence name and address
IP & T GROUP LLP
7700 LITTLE RIVER TURNPIKE
SUITE 207
ANNANDALE, VA 22003

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