|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/28/1998
|
Application #:
|
07840547
|
Filing Dt:
|
02/25/1992
|
|
Title:
|
TELEPHONE SUBSCRIBER LINE CIRCUIT, COMPONENTS AND METHODS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/14/1993
|
Application #:
|
07840548
|
Filing Dt:
|
02/25/1992
|
|
Title:
|
METHOD AND DEVICE IN WHICH BOTTOMING OF A WELL IN A DIELECTRICALLY ISOLATED ISLAND IS ASSURED
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/17/1997
|
Application #:
|
07846286
|
Filing Dt:
|
03/03/1992
|
|
Title:
|
ELECTRICALLY PROGRAMMABLE MEMORY CELL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/27/1994
|
Application #:
|
07847789
|
Filing Dt:
|
03/06/1992
|
|
Title:
|
SEMICONDUCTOR DEVICE WITH IMPROVED TURN-OFF CAPABILITY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/1993
|
Application #:
|
07852541
|
Filing Dt:
|
03/17/1992
|
|
Title:
|
LASER TRIMMED INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/08/1993
|
Application #:
|
07854805
|
Filing Dt:
|
03/19/1992
|
|
Title:
|
METHOD OF FORMING ISLAND WITH POLYSILICON-FILLED TRENCH ISOLATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/08/1994
|
Application #:
|
07855834
|
Filing Dt:
|
03/23/1992
|
|
Title:
|
SOI CMOS DEVICE HAVING DIFFERENTIALLY DOPED BODY EXTENSION FOR PROVIDING IMPROVED BACKSIDE LEAKAGE CHANNEL STOP
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/02/1996
|
Application #:
|
07865868
|
Filing Dt:
|
04/09/1992
|
|
Title:
|
POWER DRIVER CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/21/1994
|
Application #:
|
07882070
|
Filing Dt:
|
05/12/1992
|
|
Title:
|
INTEGRATION OF HIGH VOLTAGE LATERAL MOS DEVICES IN LOW VOLTAGE CMOS ARCHITECTURE USING CMOS-COMPATIBLE PROCESS STEPS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/08/1993
|
Application #:
|
07891052
|
Filing Dt:
|
06/01/1992
|
|
Title:
|
SOI WAFER WITH SIGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/31/1993
|
Application #:
|
07891910
|
Filing Dt:
|
06/01/1992
|
|
Title:
|
METHOD OF FABRICATING SOI WATER WITH SIGE AS AN ETCHBACK FILM IN A BESOI PROCESS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/05/1994
|
Application #:
|
07904848
|
Filing Dt:
|
06/26/1992
|
|
Title:
|
PRECISION VOLTAGE REFERENCE CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/10/1994
|
Application #:
|
07905015
|
Filing Dt:
|
06/26/1992
|
|
Title:
|
SEU-IMMUNE LATCH FOR GATE ARRAY, STANDARD CELL, AND OTHER ASIC APPLICATIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/04/1994
|
Application #:
|
07911902
|
Filing Dt:
|
07/10/1992
|
|
Title:
|
REDUCED TEMPERATURE SUPPRESSION OF VOLATILIZATION OF PHOTOEXCITED HALOGEN REACTION PRODUCTS FROM SURFACE OF SILICON WAFER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/18/1994
|
Application #:
|
07913844
|
Filing Dt:
|
07/15/1992
|
|
Title:
|
GAS PHASE CHEMICAL REDUCTION OF METALLIC BRANDING LAYER OF ELECTRONIC CIRCUIT PACKAGE FOR DEPOSITION OF BRANDING INK
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/01/1994
|
Application #:
|
07916198
|
Filing Dt:
|
07/17/1992
|
|
Title:
|
TRENCH CONDUCTOR AND CROSSUNDER ARCHITECTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/05/1999
|
Application #:
|
07917635
|
Filing Dt:
|
07/20/1992
|
|
Title:
|
BICMOS DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/05/1995
|
Application #:
|
07919001
|
Filing Dt:
|
07/23/1992
|
|
Title:
|
BREAKDOWN DIODE STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/08/1994
|
Application #:
|
07921197
|
Filing Dt:
|
07/28/1992
|
|
Title:
|
BONDED WAFER PROCESSING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/16/1994
|
Application #:
|
07925077
|
Filing Dt:
|
08/05/1992
|
|
Title:
|
FORMATION OF DUAL POLARITY SOURCE/DRAIN EXTENSIONS IN LATERAL COMPLEMENTARY CHANNEL MOS ARCHITECTURES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/21/1993
|
Application #:
|
07928992
|
Filing Dt:
|
08/12/1992
|
|
Title:
|
PROCESS FOR FORMING TWIN WELL CMOS INTEGRATED CIRCUITS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/07/1996
|
Application #:
|
07930072
|
Filing Dt:
|
08/14/1992
|
|
Title:
|
QUADRATURE FILTER WITH REAL CONVERSION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/03/1995
|
Application #:
|
07930169
|
Filing Dt:
|
08/14/1992
|
|
Title:
|
DECIMATION FILTER AND METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/20/1996
|
Application #:
|
07930170
|
Filing Dt:
|
08/14/1992
|
|
Title:
|
DIGITAL DOWN CONVERTER AND METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/27/1995
|
Application #:
|
07930737
|
Filing Dt:
|
08/14/1992
|
|
Title:
|
CURRENT DRIVER HAVING VOLTAGE TRANSITION FAILURE-BASED SHORT CIRCUIT PROTECTON CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/1994
|
Application #:
|
07930926
|
Filing Dt:
|
08/14/1992
|
|
Title:
|
SINE/COSINE GENERATOR AND METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/08/1995
|
Application #:
|
07930930
|
Filing Dt:
|
08/14/1992
|
|
Title:
|
SEMICONDUCTOR ROM DEVICE AND METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/17/1995
|
Application #:
|
07935765
|
Filing Dt:
|
08/26/1992
|
|
Title:
|
METHOD FOR FORMING RECESSED OXIDE ISOLATION CONTAINING DEEP AND SHALLOW TRENCHES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/11/1993
|
Application #:
|
07935805
|
Filing Dt:
|
08/27/1992
|
|
Title:
|
HERMETIC PACKAGE AND PACKAGED SEMICONDUCTOR CHIP HAVING CLOSELY SPACED LEADS EXTENDING THROUGH THE PACKAGE LID
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/02/1994
|
Application #:
|
07935830
|
Filing Dt:
|
08/26/1992
|
|
Title:
|
CIRCUIT FOR PROVIDING A CURRENT PROPORTIONAL TO ABSOLUTE TEMPERATURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/15/1994
|
Application #:
|
07936596
|
Filing Dt:
|
08/27/1992
|
|
Title:
|
COMPARATOR AMPLIFIER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/14/1993
|
Application #:
|
07939115
|
Filing Dt:
|
09/01/1992
|
|
Title:
|
STRESS RELIEF TECHNIQUE OF REMOVING OXIDE FROM SURFACE OF TRENCH- PATTERNED SEMICONDUCTOR-ON-INSULATOR STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/07/1995
|
Application #:
|
07939786
|
Filing Dt:
|
09/03/1992
|
|
Title:
|
BONDED WAFER PROCESSING WITH METAL SILICIDATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/13/1994
|
Application #:
|
07941736
|
Filing Dt:
|
09/08/1992
|
|
Title:
|
INDUCTIVE LOAD DUMP CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/23/1994
|
Application #:
|
07945674
|
Filing Dt:
|
09/15/1992
|
|
Title:
|
DECIMATING FILTER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/24/1994
|
Application #:
|
07947177
|
Filing Dt:
|
09/18/1992
|
|
Title:
|
REDUCTION OF BIPOLAR GAIN AND IMPROVEMENT IN SNAP-BACK SUSTAINING VOLTAGE IN SOI FIELD EFFECT TRANSISTOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/27/1993
|
Application #:
|
07950553
|
Filing Dt:
|
09/25/1992
|
|
Title:
|
METHOD FOR FORMING SEMICONDUCTOR ELECTRICAL CONTACTS USING METAL FOIL AND THERMOCOMPRESSION BONDING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/26/1994
|
Application #:
|
07962309
|
Filing Dt:
|
10/16/1992
|
|
Title:
|
NON-LINEAR OPERATIONAL TRANSCONDUCTANCE AMPLIFIER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/21/1995
|
Application #:
|
07972510
|
Filing Dt:
|
11/06/1992
|
|
Title:
|
RESOURCE ACCESS SECURITY SYSTEM FOR CONTROLLING ACCESS TO RESOURCES OF A DATA PROCESSING SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/08/1994
|
Application #:
|
07973603
|
Filing Dt:
|
11/09/1992
|
|
Title:
|
INTEGRATED HEAT SINK HAVING A SINUOUS FLUID CHANNEL FOR THE THERMAL DISSIPATION OF SEMICONDUCTOR MODULES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/31/1994
|
Application #:
|
07973709
|
Filing Dt:
|
11/09/1992
|
|
Title:
|
DEVICE AND METHOD FOR IMPROVING CURRENT CARRYING CAPABILITY IN A SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/16/1993
|
Application #:
|
07973932
|
Filing Dt:
|
11/09/1992
|
|
Title:
|
PLURAL - BIT RECODING MULTIPLIER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/11/1995
|
Application #:
|
07979209
|
Filing Dt:
|
11/20/1992
|
|
Title:
|
AMPLIFIER SYSTEM FOR LOW LEVEL SENSOR SIGNAL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/15/1994
|
Application #:
|
07980570
|
Filing Dt:
|
11/20/1992
|
|
Title:
|
AMPLIFIER WITH HIGH COMMON MODE REJECTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/22/1994
|
Application #:
|
07984003
|
Filing Dt:
|
12/01/1992
|
|
Title:
|
STATIC ELECTRICITY DISPERSANT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/16/1995
|
Application #:
|
07984187
|
Filing Dt:
|
11/20/1992
|
|
Title:
|
ELECTROSTATIC DISCHARGE PROTECTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/06/1994
|
Application #:
|
07993585
|
Filing Dt:
|
12/21/1992
|
|
Title:
|
IMPROVED SIGMA-DELTA TYPE ANALOG-DIGITAL CONVERTER AND METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/17/1994
|
Application #:
|
07995442
|
Filing Dt:
|
12/23/1992
|
|
Title:
|
DECOUPLING TOOL MECHANISM FOR ELECTRICAL CONNECTORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/17/1995
|
Application #:
|
08001752
|
Filing Dt:
|
01/07/1993
|
|
Title:
|
SPIRAL EDGE PASSIVATION STRUCTURE FOR SEMICONDUCTOR DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/19/1994
|
Application #:
|
08007300
|
Filing Dt:
|
01/21/1993
|
|
Title:
|
DIRECT THERMOCOMPRESSION BONDING FOR THIN ELECTRONIC POWER CHIPS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/12/1994
|
Application #:
|
08018619
|
Filing Dt:
|
02/17/1993
|
|
Title:
|
HIGH SPEED DIFFERENTIAL COMPARATOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/18/1994
|
Application #:
|
08023117
|
Filing Dt:
|
02/26/1993
|
|
Title:
|
CIRCUIT AND METHOD FOR EXTENDING THE SAFE OPERATING AREA OF A BJT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/21/1993
|
Application #:
|
08029860
|
Filing Dt:
|
03/11/1993
|
|
Title:
|
BONDED WAFER PROCESS INCORPORATING DIAMOND INSULATOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/06/1994
|
Application #:
|
08030980
|
Filing Dt:
|
03/12/1993
|
|
Title:
|
CURING OF A TUNGSTEN FILAMENT IN AN ION IMPLANTER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/22/1994
|
Application #:
|
08051832
|
Filing Dt:
|
04/26/1993
|
|
Title:
|
SEMI-CONDUCTOR CHIP PACKAGING METHOD AND SEMI-CONDUCTOR CHIP HAVING INTERDIGITATED GATE RUNNERS WITH GATE BONDING PADS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/31/1995
|
Application #:
|
08051839
|
Filing Dt:
|
04/26/1993
|
|
Title:
|
FAST TURN ON SWITCH CIRCUIT WITH PARALLEL MOS CONTROLLED THYRISTOR AND SILICON CONTROLLED RECTIFIER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/28/1999
|
Application #:
|
08053243
|
Filing Dt:
|
04/28/1993
|
|
Title:
|
SEMICONDCUCTOR DEVICE WITH INCREASED MAXIMUM TERMINAL VOLTAGE VOLTAGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/13/1994
|
Application #:
|
08053244
|
Filing Dt:
|
04/28/1993
|
|
Title:
|
AN INTEGRATED CIRCUIT WITH IMPROVED REVERSE BIAS BREAKDOWN
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/17/1997
|
Application #:
|
08066355
|
Filing Dt:
|
05/21/1993
|
|
Title:
|
METHOD OF MAKING INTERGRATED CIRCUIT STRUCTURE WITH NARROW LINE WIDTHS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/28/1998
|
Application #:
|
08066697
|
Filing Dt:
|
05/24/1993
|
|
Title:
|
BIASING OF ISLAND-SURROUNDING MATERIAL TO SUPPRESS REDUCTION OF BREAKDOWN VOLTAGE DUE TO FIELD PLATE ACTING ON BURIED LAYER/ISLAND JUNCTION BETWEEN HIGH AND LOW IMPURITY CONCENTRATION REGIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/25/1994
|
Application #:
|
08066854
|
Filing Dt:
|
05/25/1993
|
|
Title:
|
INTEGRATED CIRCUIT THERMAL SENSOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/20/1996
|
Application #:
|
08071795
|
Filing Dt:
|
06/04/1993
|
|
Title:
|
VOLTAGE DIVIDER AND USE AS BIAS NETWORK FOR STACKED TRANSISTORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/04/1995
|
Application #:
|
08080744
|
Filing Dt:
|
06/22/1993
|
|
Title:
|
PROCESS FOR FORMING TWIN WELL CMOS INTEGRATED CIRCUITS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/22/1994
|
Application #:
|
08082546
|
Filing Dt:
|
06/28/1993
|
|
Title:
|
DIFFERENTIAL AMPLIFIER WITH HYSTERESIS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/15/1998
|
Application #:
|
08090617
|
Filing Dt:
|
07/12/1993
|
|
Title:
|
LOW VOLTAGE RF AMPLIFIER AND MIXER WITH SINGLE BIAS BLOCK AND METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/23/1994
|
Application #:
|
08090978
|
Filing Dt:
|
07/09/1993
|
|
Title:
|
FAST CHARGING MOS CAPACITOR STRUCTURE FOR HIGH MAGNITUDE VOLTAGE OF EITHER POSITIVE OR NEGATIVE POLARITY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/01/1995
|
Application #:
|
08091819
|
Filing Dt:
|
07/13/1993
|
|
Title:
|
METHOD AND DEVICE IN WHICH BOTTOMING OF A WELL IN A DIELECTRICALLY ISOLATED ISLAND IS ASSURED
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/25/1995
|
Application #:
|
08106160
|
Filing Dt:
|
08/13/1993
|
|
Title:
|
SELF-ALIGNED CHANNEL STOP FOR TRENCH-ISOLATED ISLAND
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/03/1996
|
Application #:
|
08106251
|
Filing Dt:
|
08/13/1993
|
|
Title:
|
METHOD FOR INTERACTIVELY TAILORING TOPOGRAPHY OF INTEGRATED CIRCUIT LAYOUT IN ACCORDANCE WITH ELECTROMIGRATION MODEL-BASED MINIMUM WIDTH METAL AND CONTACT/VIA RULES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/28/1996
|
Application #:
|
08107309
|
Filing Dt:
|
08/17/1993
|
|
Title:
|
SEMICONDUCTOR DEVICE WITH A FOIL SEALED LID
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/17/1996
|
Application #:
|
08108358
|
Filing Dt:
|
08/18/1993
|
|
Title:
|
SUB-MICRON BONDED SOI BY TRENCH PLANARIZATION
|
|
|
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Patent #:
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Issue Dt:
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05/14/1996
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Application #:
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08118063
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Filing Dt:
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09/08/1993
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Title:
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FILL AND ETCHBACK PROCESS USING DUAL PHOTORESIST SACRIFICIAL LAYER AND TWO-STEP ETCHING PROCESS FOR PLANARIZING OXIDE-FILLED SHALLOW TRENCH STRUCTURE
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Patent #:
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Issue Dt:
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03/07/1995
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Application #:
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08123157
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Filing Dt:
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09/07/1993
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Title:
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METHODS FOR FORMING A TRANSISTOR HAVING AN EMITTER WITH ENHANCED EFFICIENCY
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Patent #:
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Issue Dt:
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09/03/1996
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Application #:
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08125411
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Filing Dt:
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09/22/1993
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Title:
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DIE SEPARATION METHOD FOR SILICON ON DIAMOND CIRCUIT STRUCTURES
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Patent #:
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Issue Dt:
|
09/16/1997
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Application #:
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08131369
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Filing Dt:
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10/04/1993
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Title:
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HIGH FREQUENCY ANALOG TRANSISTORS, METHOD OF FABRICATION AND CIRCUIT IMPLEMENTATION
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Patent #:
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Issue Dt:
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11/19/1996
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Application #:
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08135092
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Filing Dt:
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10/12/1993
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Title:
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RESISTANCE-MEASUREMENT BASED ARRANGEMENT FOR MONITORING INTEGRITY OF TRAVEL PATH GROUND LINK IN ELECTRONIC COMPONENTS HANDLING APPARATUS
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Patent #:
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Issue Dt:
|
10/01/1996
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Application #:
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08135093
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Filing Dt:
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10/12/1993
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Title:
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METHOD OF MANUFACTURE OF MULTI-CELL INTEGRATED CIRCUIT ARCHITECTURE
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Patent #:
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Issue Dt:
|
08/02/1994
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Application #:
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08137293
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Filing Dt:
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10/14/1993
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Title:
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WAFER BONDING USING TRAPPED OXIDIZING VAPOR
|
|
|
|
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Patent #:
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Issue Dt:
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03/21/1995
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Application #:
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08158444
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Filing Dt:
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11/29/1993
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Title:
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MESH GEOMETRY FOR MOS-GATED SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
|
02/21/1995
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Application #:
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08171280
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Filing Dt:
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12/21/1993
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Title:
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SELECTIVE RECRYSTALLIZATION TO REDUCE P-CHANNEL TRANSISTOR LEAKAGE IN SILICON-ON-SAPPHIRE CMOS RADIATION HARDENED INTEGRATED CIRCUITS
|
|
|
|
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Patent #:
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Issue Dt:
|
06/13/1995
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Application #:
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08173077
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Filing Dt:
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12/27/1993
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Title:
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APPARATUS AND METHOD FOR INCREASING BREAKDOWN VOLTAGE RUGGEDNESS IN SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
|
12/05/1995
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Application #:
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08177974
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Filing Dt:
|
01/06/1994
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Title:
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PACKAGE FOR PARALLEL SUBELEMENT SEMICONDUCTOR DEVICES
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|
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Patent #:
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Issue Dt:
|
11/12/1996
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Application #:
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08180267
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Filing Dt:
|
01/12/1994
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|
Title:
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FAIL-SAFE MOS SHUTDOWN CIRCUITRY
|
|
|
|
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Patent #:
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Issue Dt:
|
08/29/1995
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Application #:
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08180666
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Filing Dt:
|
01/13/1994
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|
Title:
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VOLTAGE INDEPENDENT SYMMETRICAL CURRENT SOURCE WITH CROSS-COUPLED TRANSISTORS
|
|
|
|
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Patent #:
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Issue Dt:
|
11/14/1995
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Application #:
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08180737
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Filing Dt:
|
01/13/1994
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|
Title:
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TRENCH RESISTOR ARCHITECTURE
|
|
|
|
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Patent #:
|
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Issue Dt:
|
06/18/1996
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Application #:
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08190998
|
Filing Dt:
|
02/03/1994
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Title:
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METHOD FOR PROVIDING A SILICON AND DIAMOND SUBSTRATE HAVING A CARBON TO SILICON TRANSITION LAYER AND APPARATUS THEREOF
|
|
|
|
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Patent #:
|
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Issue Dt:
|
03/14/1995
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Application #:
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08191963
|
Filing Dt:
|
02/03/1994
|
|
Title:
|
METHOD OF MAKING AN IMPROVED GRADED COLLECTOR FOR INDUCTIVE LOADS
|
|
|
|
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Patent #:
|
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Issue Dt:
|
12/10/1996
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Application #:
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08192398
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Filing Dt:
|
02/03/1994
|
|
Title:
|
DIFFERENTIAL VOLTAGE MONITOR USING A BRIDGE CIRCUIT WITH RESISTORS ON AND OFF AN INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/19/1995
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Application #:
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08195667
|
Filing Dt:
|
02/03/1994
|
|
Title:
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PLASMA CLEANING METHOD FOR IMPROVED INK BRAND PERMANENCY ON IC PACKAGES WITH METALLIC PARTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/12/1996
|
Application #:
|
08198002
|
Filing Dt:
|
02/17/1994
|
|
Title:
|
ESD PROTECTION USING SCR CLMAPING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/16/1996
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Application #:
|
08204710
|
Filing Dt:
|
03/02/1994
|
|
Title:
|
CURRENT MIRROR WITH SATURATION LIMITING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/30/1995
|
Application #:
|
08204711
|
Filing Dt:
|
03/02/1994
|
|
Title:
|
CURRENT RISE AND FALL TIME LIMITED VOLTAGE FOLLOWER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/04/1997
|
Application #:
|
08204718
|
Filing Dt:
|
03/02/1994
|
|
Title:
|
REVERSE CURRENT FLOW PREVENTION IN A DIFFUSED RESISTOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/04/1995
|
Application #:
|
08216217
|
Filing Dt:
|
03/21/1994
|
|
Title:
|
SEMICONDUCTOR ACCELEROMETER AND METHOD OF ITS MANUFACTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/29/1995
|
Application #:
|
08217801
|
Filing Dt:
|
01/06/1994
|
|
Title:
|
HERMETIC PACKAGE FOR A HIGH POWER SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/14/1997
|
Application #:
|
08223425
|
Filing Dt:
|
04/05/1994
|
|
Title:
|
DEVICE FOR ISOLATING PARALLEL SUB-ELEMENTS WITH REVERSE CONDUCTING DIODE REGIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/30/1996
|
Application #:
|
08227157
|
Filing Dt:
|
04/13/1994
|
|
Title:
|
INTEGRATION OF HIGH VOLTAGE LATERAL MOS DEVICES IN LOW VOLTAGE CMOS ARCHITECTURE USING CMOS-COMPATIBLE PROCESS STEPS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/21/1996
|
Application #:
|
08235979
|
Filing Dt:
|
05/02/1994
|
|
Title:
|
DIGITAL BASEBAND TO IF CONVERSION IN CELLULAR BASE STATIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/06/1995
|
Application #:
|
08246307
|
Filing Dt:
|
05/19/1994
|
|
Title:
|
METHOD OF DOPING A JFET REGION IN A MOS-GATED SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/01/1996
|
Application #:
|
08248844
|
Filing Dt:
|
05/25/1994
|
|
Title:
|
SILICON ON DIAMOND CIRCUIT STRUCTURE
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|
