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Reel/Frame:	066355/0411			Pages:	27
		Recorded:	01/19/2024
Attorney Dkt #:	850063.001(OTHER LFS-5)
Conveyance:	CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).

Total properties: 21

Patent #:	7598145	Issue Dt:	10/06/2009	Application #:	11761074	Filing Dt:	06/11/2007
Publication #:	US20070287257	Pub Dt:	12/13/2007
Title:	METHOD FOR PRODUCING SI1-YGEY BASED ZONES WITH DIFFERENT CONTENTS IN GE ON A SAME SUBSTRATE BY CONDENSATION OF GERMANIUM

Patent #:	7972971	Issue Dt:	07/05/2011	Application #:	11761122	Filing Dt:	06/11/2007
Publication #:	US20070284625	Pub Dt:	12/13/2007
Title:	METHOD FOR PRODUCING SI1-YGEY BASED ZONES WITH DIFFERENT CONTENTS IN GE ON A SAME SUBSTRATE BY CONDENSATION OF GERMANIUM

Patent #:	8607630	Issue Dt:	12/17/2013	Application #:	12680687	Filing Dt:	05/24/2010
Publication #:	US20100289096	Pub Dt:	11/18/2010
Title:	VIBRATING NANO-SCALE OR MICRO-SCALE ELECTROMECHANICAL COMPONENT WITH ENHANCED DETECTION LEVEL

Patent #:	8962399	Issue Dt:	02/24/2015	Application #:	14177593	Filing Dt:	02/11/2014
Publication #:	US20140370666	Pub Dt:	12/18/2014
Title:	METHOD OF MAKING A SEMICONDUCTOR LAYER HAVING AT LEAST TWO DIFFERENT THICKNESSES

Patent #:	8980702	Issue Dt:	03/17/2015	Application #:	14177614	Filing Dt:	02/11/2014
Publication #:	US20140335663	Pub Dt:	11/13/2014
Title:	METHOD OF MAKING A TRANSISTOR

Patent #:	9276073	Issue Dt:	03/01/2016	Application #:	14266999	Filing Dt:	05/01/2014
Publication #:	US20140326955	Pub Dt:	11/06/2014
Title:	NANOWIRE AND PLANAR TRANSISTORS CO-INTEGRATED ON UTBOX SOI SUBSTRATE

Patent #:	9224708	Issue Dt:	12/29/2015	Application #:	14339630	Filing Dt:	07/24/2014
Publication #:	US20150028488	Pub Dt:	01/29/2015
Title:	METHOD FOR MANUFACTURING A CONDUCTING CONTACT ON A CONDUCTING ELEMENT

Patent #:	9728337	Issue Dt:	08/08/2017	Application #:	14416978	Filing Dt:	01/23/2015
Publication #:	US20150206662	Pub Dt:	07/23/2015
Title:	METHOD FOR PRODUCING A CAPACITOR

Patent #:	9246006	Issue Dt:	01/26/2016	Application #:	14453800	Filing Dt:	08/07/2014
Publication #:	US20150044828	Pub Dt:	02/12/2015
Title:	RECRYSTALLIZATION OF SOURCE AND DRAIN BLOCKS FROM ABOVE

Patent #:	9502558	Issue Dt:	11/22/2016	Application #:	14791713	Filing Dt:	07/06/2015
Publication #:	US20160005862	Pub Dt:	01/07/2016
Title:	LOCAL STRAIN GENERATION IN AN SOI SUBSTRATE

Patent #:	10014660	Issue Dt:	07/03/2018	Application #:	14827429	Filing Dt:	08/17/2015
Publication #:	US20160056612	Pub Dt:	02/25/2016
Title:	LASER DEVICE AND PROCESS FOR FABRICATING SUCH A LASER DEVICE

Patent #:	9543409	Issue Dt:	01/10/2017	Application #:	14855834	Filing Dt:	09/16/2015
Publication #:	US20160079388	Pub Dt:	03/17/2016
Title:	Production of spacers at flanks of a transistor gate

Patent #:	9978602	Issue Dt:	05/22/2018	Application #:	14923176	Filing Dt:	10/26/2015
Publication #:	US20160042955	Pub Dt:	02/11/2016
Title:	METHOD OF MAKING A TRANSISTOR

Patent #:	9425255	Issue Dt:	08/23/2016	Application #:	14982852	Filing Dt:	12/29/2015
Publication #:	US20160133700	Pub Dt:	05/12/2016
Title:	NANOWIRE AND PLANAR TRANSISTORS CO-INTEGRATED ON UTBOX SOI SUBSTRATE

Patent #:	9899800	Issue Dt:	02/20/2018	Application #:	15349515	Filing Dt:	11/11/2016
Publication #:	US20170141541	Pub Dt:	05/18/2017
Title:	LASER DEVICE AND PROCESS FOR FABRICATING SUCH A LASER DEVICE

Patent #:	9911827	Issue Dt:	03/06/2018	Application #:	15372930	Filing Dt:	12/08/2016
Publication #:	US20170162672	Pub Dt:	06/08/2017
Title:	SBFET TRANSISTOR AND CORRESPONDING FABRICATION PROCESS

Patent #:	9831288	Issue Dt:	11/28/2017	Application #:	15387850	Filing Dt:	12/22/2016
Publication #:	US20170179196	Pub Dt:	06/22/2017
Title:	INTEGRATED CIRCUIT COINTEGRATING A FET TRANSISTOR AND A RRAM MEMORY POINT

Patent #:	10658197	Issue Dt:	05/19/2020	Application #:	15390077	Filing Dt:	12/23/2016
Publication #:	US20170186623	Pub Dt:	06/29/2017
Title:	METHOD FOR PRODUCING LOW-PERMITTIVITY SPACERS

Patent #:	9911820	Issue Dt:	03/06/2018	Application #:	15464763	Filing Dt:	03/21/2017
Publication #:	US20170271470	Pub Dt:	09/21/2017
Title:	METHOD FOR FABRICATION OF A FIELD-EFFECT WITH REDUCED STRAY CAPACITANCE

Patent #:	10014183	Issue Dt:	07/03/2018	Application #:	15523742	Filing Dt:	05/02/2017
Publication #:	US20170358459	Pub Dt:	12/14/2017
Title:	METHOD FOR PATTERNING A THIN FILM

Patent #:	10511147	Issue Dt:	12/17/2019	Application #:	15992573	Filing Dt:	05/30/2018
Publication #:	US20180278021	Pub Dt:	09/27/2018
Title:	LASER DEVICE AND PROCESS FOR FABRICATING SUCH A LASER DEVICE

Assignor

Exec Dt:

01/26/2023

Assignee

29 BOULEVARD ROMAIN ROLLAND

MONTROUGE, FRANCE 92120

Correspondence name and address
	SEED INTELLECTUAL PROPERTY LAW GROUP LLP
	701 FIFTH AVENUE
	SUITE 5400
	SEATTLE, WA 98104

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