Total properties:
22
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Patent #:
|
NONE
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Issue Dt:
|
12/30/2008
|
Application #:
|
10496537
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Filing Dt:
|
05/24/2004
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Publication #:
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|
Pub Dt:
|
12/30/2004
| | |
PCT #:
|
IB0204891
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Title:
|
REROUTING VLIW INSTRUCTIONS TO ACCOMMODATE EXECUTION UNITS DEACTIVATED UPON DETECTION BY DISPATCH UNITS OF DEDICATED INSTRUCTION ALERTING MULTIPLE SUCCESSIVE REMOVED NOPS
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|
|
Patent #:
|
NONE
|
Issue Dt:
|
10/23/2007
|
Application #:
|
10509562
|
Filing Dt:
|
09/28/2004
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Publication #:
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|
Pub Dt:
|
09/22/2005
| | |
PCT #:
|
IB0200983
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Title:
|
COMMUNICATION PATH TO EACH PART OF DISTRIBUTED REGISTER FILE FROM FUNCTIONAL UNITS IN ADDITION TO PARTIAL COMMUNICATION NETWORK
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|
|
Patent #:
|
|
Issue Dt:
|
01/10/2012
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Application #:
|
10511512
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Filing Dt:
|
10/14/2004
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Publication #:
|
|
Pub Dt:
|
06/16/2005
| | |
PCT #:
|
IB0301366
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Title:
|
REGISTER SYSTEMS AND METHODS FOR A MULTI-ISSUE PROCESSOR
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|
|
Patent #:
|
|
Issue Dt:
|
01/29/2013
|
Application #:
|
10530495
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Filing Dt:
|
04/06/2005
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Publication #:
|
|
Pub Dt:
|
01/05/2006
| | |
PCT #:
|
IB0304327
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Title:
|
DATA PROCESSING APPARATUS ADDRESS RANGE DEPENDENT PARALLELIZATION OF INSTRUCTIONS
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|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10535591
|
Filing Dt:
|
05/19/2005
|
Publication #:
|
|
Pub Dt:
|
03/16/2006
| | |
PCT #:
|
IB0305165
|
Title:
|
Using a cache miss pattern to address a stride prediction table
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|
|
Patent #:
|
NONE
|
Issue Dt:
|
04/01/2008
|
Application #:
|
10546757
|
Filing Dt:
|
08/24/2005
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Publication #:
|
|
Pub Dt:
|
08/10/2006
| | |
PCT #:
|
IB0400455
|
Title:
|
REDUCING CACHE EFFECTS OF CERTAIN CODE PIECES
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|
|
Patent #:
|
NONE
|
Issue Dt:
|
03/30/2010
|
Application #:
|
10552777
|
Filing Dt:
|
10/12/2005
|
Publication #:
|
|
Pub Dt:
|
03/22/2007
| | |
PCT #:
|
IB0450425
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Title:
|
PROCESSING OF A COMPILEABLE COMPUTER PROGRAM
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
11/02/2010
|
Application #:
|
10570290
|
Filing Dt:
|
02/28/2006
|
Publication #:
|
|
Pub Dt:
|
01/04/2007
| | |
PCT #:
|
IB0451465
|
Title:
|
INTERGRATED CIRCUIT AND A METHOD OF CACHE REMAPPING
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
05/11/2010
|
Application #:
|
10583052
|
Filing Dt:
|
06/14/2006
|
Publication #:
|
|
Pub Dt:
|
07/12/2007
| | |
PCT #:
|
IB0452595
|
Title:
|
MEMORY-EFFICIENT INSTRUCTION PROCESSING SCHEME
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
02/19/2008
|
Application #:
|
10585801
|
Filing Dt:
|
07/12/2006
|
Publication #:
|
|
Pub Dt:
|
07/12/2007
| | |
PCT #:
|
IB0550122
|
Title:
|
METHOD AND RELATED DEVICE FOR USE IN DECODING EXECUTABLE CODE
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11597872
|
Filing Dt:
|
11/27/2006
|
Publication #:
|
|
Pub Dt:
|
01/31/2008
| | |
PCT #:
|
IB0551617
|
Title:
|
Microprocessor and Method of Instruction Alignment
|
|
|
Patent #:
|
|
Issue Dt:
|
09/17/2013
|
Application #:
|
11814801
|
Filing Dt:
|
03/25/2008
|
Publication #:
|
|
Pub Dt:
|
08/14/2008
| | |
PCT #:
|
IB0650167
|
Title:
|
ALLOCATING REGISTERS FOR LOOP VARIABLES IN A MULTI-THREADED PROCESSOR
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11916328
|
Filing Dt:
|
06/22/2010
|
Publication #:
|
|
Pub Dt:
|
10/14/2010
| | |
PCT #:
|
IB0651742
|
Title:
|
DATA PROCESSING SYSTEM AND METHOD FOR SCHEDULING THE USE OF AT LEAST ONE EXCLUSIVE RESOURCE
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11994245
|
Filing Dt:
|
10/24/2008
|
Publication #:
|
|
Pub Dt:
|
07/02/2009
| | |
PCT #:
|
IB0652217
|
Title:
|
MULTI-PHASE FREQUENCY DIVIDER
|
|
|
Patent #:
|
|
Issue Dt:
|
07/17/2012
|
Application #:
|
11995091
|
Filing Dt:
|
10/31/2008
|
Publication #:
|
|
Pub Dt:
|
08/20/2009
| | |
PCT #:
|
IB0652417
|
Title:
|
USING HISTORIC LOAD PROFILES TO DYNAMICALLY ADJUST OPERATING FREQUENCY AND AVAILABLE POWER TO A HANDHELD MULTIMEDIA DEVICE PROCESSOR CORE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/03/2014
|
Application #:
|
12090028
|
Filing Dt:
|
12/30/2008
|
| | | | | |
PCT #:
|
IB0653717
|
Title:
|
PROGRAM EXECUTABLE IMAGE ENCRYPTION
|
|
|
Patent #:
|
|
Issue Dt:
|
07/05/2011
|
Application #:
|
12090689
|
Filing Dt:
|
04/18/2008
|
| | | | | |
PCT #:
|
IB0653847
|
Title:
|
CACHE WITH HIGH ACCESS STORE BANDWIDTH
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12306605
|
Filing Dt:
|
12/24/2008
|
Publication #:
|
|
Pub Dt:
|
12/17/2009
| | |
PCT #:
|
IB0752488
|
Title:
|
DECODING SOUND PARAMETERS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/17/2015
|
Application #:
|
12518485
|
Filing Dt:
|
06/10/2009
|
Publication #:
|
|
Pub Dt:
|
02/25/2010
| | |
PCT #:
|
IB0755014
|
Title:
|
PIPELINED PROCESSOR AND COMPILER/SCHEDULER FOR VARIABLE NUMBER BRANCH DELAY SLOTS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/22/2012
|
Application #:
|
12531726
|
Filing Dt:
|
09/17/2009
|
Publication #:
|
|
Pub Dt:
|
04/08/2010
| | |
PCT #:
|
IB0851124
|
Title:
|
ELECTRONIC DEVICE AND METHOD DETERMINING A WORKLOAD OF AN ELECTRONIC DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/08/2012
|
Application #:
|
12673898
|
Filing Dt:
|
02/17/2010
|
Publication #:
|
|
Pub Dt:
|
03/24/2011
| | |
PCT #:
|
IB0853284
|
Title:
|
DATA PROCESSING WITH PROTECTION AGAINST SOFT ERRORS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/20/2014
|
Application #:
|
12682789
|
Filing Dt:
|
08/09/2010
|
| | | | | |
PCT #:
|
IB0854251
|
Title:
|
CIRCUIT AND METHOD WITH CACHE COHERENCE STRESS CONTROL
|
|