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05/25/2010
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03/15/2007
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03/15/2007
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03/15/2007
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11/04/2008
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03/15/2007
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08/11/2009
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03/22/2007
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04/05/2007
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05/20/2008
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09/23/2005
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03/29/2007
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10/07/2008
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09/27/2005
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03/29/2007
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09/30/2008
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09/27/2005
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03/29/2007
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01/26/2010
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03/29/2007
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04/01/2008
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09/29/2005
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03/29/2007
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08/03/2010
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09/29/2005
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03/29/2007
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03/17/2009
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09/28/2005
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03/29/2007
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07/07/2009
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09/06/2007
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04/14/2009
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09/30/2005
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04/05/2007
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04/13/2010
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09/30/2005
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04/05/2007
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03/10/2009
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09/30/2005
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04/05/2007
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01/05/2010
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09/30/2005
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04/05/2007
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10/28/2008
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09/30/2005
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02/09/2006
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09/04/2007
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09/30/2005
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04/05/2007
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MICROELECTRONIC ASSEMBLY AND METHOD FOR FORMING THE SAME
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09/16/2008
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09/30/2005
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04/05/2007
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11/25/2008
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09/30/2005
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04/05/2007
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05/13/2008
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09/30/2005
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10/04/2007
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04/29/2008
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09/30/2005
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04/05/2007
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09/04/2007
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09/30/2005
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04/05/2007
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01/26/2010
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09/30/2005
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04/05/2007
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12/26/2006
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10/03/2005
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07/10/2007
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04/12/2007
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04/12/2007
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08/18/2009
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10/11/2005
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04/12/2007
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PROGRAMMABLE FUSE WITH SILICON GERMANIUM
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09/05/2006
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10/11/2005
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04/20/2006
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INTEGRATED FAULT DETECTOR CIRCUIT
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06/12/2007
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04/13/2006
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10/14/2005
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04/19/2007
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10/09/2007
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04/19/2007
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08/14/2007
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04/19/2007
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12/11/2007
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10/17/2005
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04/19/2007
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04/19/2007
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04/19/2011
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04/19/2007
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02/16/2010
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10/19/2005
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04/19/2007
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10/18/2005
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08/24/2006
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04/19/2007
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03/29/2011
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04/19/2007
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09/25/2007
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09/30/2008
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04/26/2007
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11/04/2008
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10/24/2005
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04/26/2007
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04/26/2007
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10/24/2005
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04/26/2007
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10/25/2005
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04/26/2007
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11/18/2008
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10/25/2005
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04/26/2007
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MULTIPLE DEVICE TYPES INCLUDING AN INVERTED-T CHANNEL TRANSISTOR AND METHOD THEREFOR
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08/20/2013
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10/25/2005
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04/26/2007
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08/21/2007
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10/26/2005
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04/26/2007
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10/26/2005
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04/26/2007
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03/17/2009
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10/26/2005
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04/26/2007
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PROCESS FOR FORMING AN ELECTRONIC DEVICE INCLUDING TRANSISTOR STRUCTURES WITH SIDEWALL SPACERS
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Patent #:
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Issue Dt:
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02/17/2009
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Application #:
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11258987
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Filing Dt:
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10/26/2005
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Publication #:
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Pub Dt:
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04/26/2007
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Title:
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METHODS OF GENERATING PLANAR DOUBLE GATE TRANSISTOR SHAPES
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Patent #:
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Issue Dt:
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02/10/2009
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Application #:
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11260849
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Filing Dt:
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10/26/2005
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Publication #:
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Pub Dt:
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04/26/2007
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Title:
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SEMICONDUCTOR STRUCTURE WITH REDUCED GATE DOPING AND METHODS FOR FORMING THEREOF
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Patent #:
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Issue Dt:
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06/03/2008
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Application #:
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11261357
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Filing Dt:
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10/28/2005
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Publication #:
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Pub Dt:
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05/03/2007
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Title:
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SYSTEM AND METHOD FOR COOPERATIVE PREFETCHING
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Patent #:
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Issue Dt:
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08/16/2011
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Application #:
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11261480
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Filing Dt:
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10/31/2005
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Publication #:
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Pub Dt:
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05/03/2007
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Title:
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DATA SCAN MECHANISM
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Patent #:
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Issue Dt:
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11/11/2008
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Application #:
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11261643
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Filing Dt:
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10/31/2005
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Publication #:
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Pub Dt:
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03/09/2006
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Title:
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METHOD FOR CONTROLLING OPERATION OF A CHILD OR NEIGHBOR NETWORK
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Patent #:
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Issue Dt:
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02/19/2008
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Application #:
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11261978
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Filing Dt:
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10/28/2005
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Publication #:
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Pub Dt:
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05/03/2007
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Title:
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LOW NOISE REFERENCE OSCILLATOR WITH FAST START-UP
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Patent #:
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Issue Dt:
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08/31/2010
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Application #:
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11262057
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Filing Dt:
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10/28/2005
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Publication #:
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Pub Dt:
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05/03/2007
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Title:
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ELECTRONIC ASSEMBLY HAVING GRADED WIRE BONDING
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11262171
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Filing Dt:
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10/28/2005
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Publication #:
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Pub Dt:
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05/03/2007
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Title:
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System and method for decoupled precomputation prefetching
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Patent #:
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Issue Dt:
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08/28/2007
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Application #:
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11263089
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Filing Dt:
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10/31/2005
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Publication #:
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Pub Dt:
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05/03/2007
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Title:
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METHOD AND APPARATUS FOR TESTING A SEMICONDUCTOR STRUCTURE HAVING TOP-SIDE AND BOTTOM-SIDE CONNECTIONS
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Patent #:
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Issue Dt:
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11/10/2009
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Application #:
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11263119
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Filing Dt:
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10/31/2005
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Publication #:
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Pub Dt:
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05/03/2007
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Title:
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METHOD FOR FORMING A SEMICONDUCTOR STRUCTURE AND STRUCTURE THEREOF
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Patent #:
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Issue Dt:
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08/18/2009
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Application #:
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11263120
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Filing Dt:
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10/31/2005
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Publication #:
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Pub Dt:
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05/03/2007
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Title:
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METHOD FOR FORMING A PLANAR AND VERTICAL SEMICONDUCTOR STRUCTURE HAVING A STRAINED SEMICONDUTOR LAYER
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Patent #:
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Issue Dt:
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10/09/2007
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Application #:
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11263440
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Filing Dt:
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10/31/2005
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Publication #:
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Pub Dt:
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05/03/2007
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Title:
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METHOD FOR FORMING MULTI-LAYER BUMPS ON A SUBSTRATE
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Patent #:
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Issue Dt:
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10/02/2007
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Application #:
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11264068
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Filing Dt:
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10/31/2005
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Publication #:
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Pub Dt:
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05/03/2007
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Title:
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SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME
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Patent #:
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Issue Dt:
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07/11/2006
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Application #:
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11264185
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Filing Dt:
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11/01/2005
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Title:
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POLISHING CARRIER HEAD WITH A MODIFIED PRESSURE PROFILE
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Patent #:
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Issue Dt:
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09/22/2009
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Application #:
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11264557
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Filing Dt:
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11/01/2005
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Publication #:
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Pub Dt:
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05/03/2007
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Title:
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ELECTROSTATIC DISCHARGE (ESD) PROTECTION CIRCUIT FOR MULTIPLE POWER DOMAIN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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02/24/2009
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Application #:
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11265869
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Filing Dt:
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11/03/2005
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Publication #:
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Pub Dt:
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05/11/2006
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Title:
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MEDIA-INDEPENDENT HANDOVER (MIH) METHOD FEATURING A SIMPLIFIED BEACON
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Patent #:
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Issue Dt:
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02/17/2009
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Application #:
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11267442
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Filing Dt:
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11/04/2005
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Publication #:
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Pub Dt:
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05/10/2007
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Title:
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NANOCRYSTAL BITCELL PROCESS INTEGRATION FOR HIGH DENSITY APPLICATION
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Patent #:
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Issue Dt:
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02/21/2012
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Application #:
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11267537
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Filing Dt:
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11/04/2005
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Publication #:
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Pub Dt:
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05/10/2007
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Title:
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DETECTING A DATA FRAME
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Patent #:
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Issue Dt:
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05/05/2009
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Application #:
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11267975
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Filing Dt:
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11/07/2005
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Publication #:
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Pub Dt:
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05/10/2007
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Title:
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FINE PITCH INTERCONNECT AND METHOD OF MAKING
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Patent #:
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Issue Dt:
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05/27/2008
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Application #:
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11267983
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Filing Dt:
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11/07/2005
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Publication #:
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Pub Dt:
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03/16/2006
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Title:
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METHOD OF PATTERNING PHOTORESIST ON A WAFER USING A REFLECTIVE MASK WITH A MULTI-LAYER ARC
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Patent #:
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Issue Dt:
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09/02/2008
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Application #:
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11269303
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Filing Dt:
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11/08/2005
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Publication #:
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Pub Dt:
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05/10/2007
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Title:
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ELECTRONIC DEVICE INCLUDING A TRANSISTOR STRUCTURE HAVING AN ACTIVE REGION ADJACENT TO A STRESSOR LAYER AND A PROCESS FOR FORMING THE ELECTRONIC DEVICE
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Patent #:
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Issue Dt:
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05/23/2006
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Application #:
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11270300
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Filing Dt:
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11/09/2005
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Publication #:
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Pub Dt:
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03/30/2006
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Title:
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SEMICONDUCTOR PACKAGE WITH CROSSING CONDUCTOR ASSEMBLY AND METHOD OF MANUFACTURE
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Patent #:
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Issue Dt:
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04/13/2010
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11270457
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11/10/2005
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Publication #:
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Pub Dt:
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05/10/2007
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Title:
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SYSTEM AND METHOD FOR CONTROLLING THE TRANSMIT POWER OF A WIRELESS MODULE
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Patent #:
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Issue Dt:
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10/25/2016
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Application #:
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11271693
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Filing Dt:
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11/10/2005
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Publication #:
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Pub Dt:
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05/10/2007
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Title:
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Resource efficient video processing via prediction error computational adjustments
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Patent #:
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Issue Dt:
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09/04/2007
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11273092
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11/14/2005
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Publication #:
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Pub Dt:
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05/17/2007
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Title:
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ELECTRONIC DEVICES INCLUDING A SEMICONDUCTOR LAYER AND A PROCESS FOR FORMING THE SAME
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Patent #:
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06/05/2007
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11273286
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11/14/2005
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Pub Dt:
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05/17/2007
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Title:
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DIGITAL SATURATION HANDLING IN INTEGRAL NOISE SHAPING OF PULSE WIDTH MODULATION
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09/01/2009
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11277694
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03/28/2006
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10/18/2007
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Title:
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MEMORY WITH CHARGE STORAGE LOCATIONS
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05/27/2008
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11278042
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03/30/2006
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Pub Dt:
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10/04/2007
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Title:
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BARRIER FOR USE IN 3-D INTEGRATION OF CIRCUITS
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09/23/2008
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11278180
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03/31/2006
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Pub Dt:
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10/11/2007
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Title:
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METHOD OF SEPARATING A STRUCTURE IN A SEMICONDUCTOR DEVICE
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11/06/2012
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11278725
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04/05/2006
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10/11/2007
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DATA PROCESSING SYSTEM HAVING BIT EXACT INSTRUCTIONS AND METHODS THEREFOR
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04/29/2008
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11279018
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04/07/2006
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10/11/2007
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Title:
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CONTENTION-FREE KEEPER CIRCUIT AND A METHOD FOR CONTENTION ELIMINATION
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10/23/2007
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11284566
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11/21/2005
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05/24/2007
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RF CARRIER GENERATOR AND METHOD THEREOF
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02/05/2008
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11290286
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11/30/2005
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05/31/2007
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LOW VOLTAGE LOW POWER CLASS A/B OUTPUT STAGE
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03/18/2008
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11290300
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11/30/2005
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05/31/2007
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Title:
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METHOD FOR PACKAGING A SEMICONDUCTOR DEVICE
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11/17/2009
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11290320
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11/30/2005
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05/31/2007
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Title:
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PLASMA TREATMENT OF A SEMICONDUCTOR SURFACE FOR ENHANCED NUCLEATION OF A METAL-CONTAINING LAYER
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06/26/2007
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11290321
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11/30/2005
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05/31/2007
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METHOD AND APPARATUS FOR PROGRAMMING/ERASING A NON-VOLATILE MEMORY
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10/14/2008
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11290368
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11/30/2005
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05/31/2007
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Title:
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METHOD AND PROGRAM PRODUCT FOR PROTECTING INFORMATION IN EDA TOOL DESIGN VIEWS
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10/16/2007
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11297103
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12/07/2005
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06/07/2007
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Title:
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METHOD OF MAKING EXPOSED PAD BALL GRID ARRAY PACKAGE
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06/26/2007
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11297191
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12/07/2005
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06/07/2007
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Title:
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CIRCUIT AND METHOD FOR PEAK DETECTION OF AN ANALOG SIGNAL
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04/22/2008
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11297884
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12/09/2005
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06/14/2007
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Title:
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OSCILLATOR CIRCUIT WITH HIGH PASS FILTER AND LOW PASDS FILTER IN OUTPUT STAGE
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09/22/2009
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11298148
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12/09/2005
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06/04/2009
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METHOD OF FORMING SEMICONDUCTOR DEVICE HAVING NANOTUBE STRUCTURES
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10/03/2006
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11300075
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12/14/2005
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06/22/2006
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SURGE CURRENT PREVENTION CIRCUIT AND DC POWER SUPPLY
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03/04/2008
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11300076
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12/14/2005
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06/22/2006
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OVERCURRENT PROTECTION CIRCUIT AND DC POWER SUPPLY
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03/16/2010
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11300077
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12/14/2005
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06/14/2007
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BACK-GATED SEMICONDUCTOR DEVICE WITH A STORAGE LAYER AND METHODS FOR FORMING THEREOF
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03/31/2009
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11300091
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12/14/2005
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06/14/2007
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SEMICONDUCTOR DEVICE HAVING STRESSORS AND METHOD FOR FORMING
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02/26/2008
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11300710
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12/14/2005
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06/14/2007
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Title:
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ESD PROTECTION FOR PASSIVE INTEGRATED DEVICES
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